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Fri, 20 Jun 2025 05:10:57 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 3/3] arm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2H EVK Date: Fri, 20 Jun 2025 13:10:45 +0100 Message-ID: <20250620121045.56114-4-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250620121045.56114-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20250620121045.56114-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar Introduce device tree overlays to support the eMMC (RTK0EF0186B02000BJ) and microSD (RTK0EF0186B01000BJ) sub-boards via the CN15 connector on the RZ/V2H EVK. These overlays make use of shared DTSI fragments (`rzv2-evk-cn15-emmc-common.dtsi` and `rzv2-evk-cn15-sd-common.dtsi`) that encapsulate common CN15-specific configurations, including pinctrl settings, SDHI0 setup, and required regulators. Additionally, the base board DTS is updated to define an `mmc0` alias pointing to `&sdhi0`, and to add a fixed 1.8V regulator node (`reg_1p8v`) intended for use by the optional eMMC sub-board and, in the future, the ADV7535 HDMI encoder (not yet enabled in the DTS). Signed-off-by: Lad Prabhakar --- arch/arm64/boot/dts/renesas/Makefile | 4 ++++ .../r9a09g057h44-rzv2h-evk-cn15-emmc.dtso | 15 +++++++++++++++ .../renesas/r9a09g057h44-rzv2h-evk-cn15-sd.dtso | 16 ++++++++++++++++ .../boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts | 10 ++++++++++ 4 files changed, 45 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk-cn15= -emmc.dtso create mode 100644 arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk-cn15= -sd.dtso diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/ren= esas/Makefile index 130ef8f34d52..8fa93ca8204e 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -167,6 +167,10 @@ dtb-$(CONFIG_ARCH_R9A09G056) +=3D r9a09g056n48-rzv2n-e= vk-cn15-sd.dtbo r9a09g056n48-rzv2n-evk-cn15-sd.dts :=3D r9a09g056n48-rzv2n-evk.dtb r9a09g0= 56n48-rzv2n-evk-cn15-sd.dtbo =20 dtb-$(CONFIG_ARCH_R9A09G057) +=3D r9a09g057h44-rzv2h-evk.dtb +dtb-$(CONFIG_ARCH_R9A09G057) +=3D r9a09g057h44-rzv2h-evk-cn15-emmc.dtbo +r9a09g057h44-rzv2h-evk-cn15-emmc.dts :=3D r9a09g057h44-rzv2h-evk.dtb r9a09= g057h44-rzv2h-evk-cn15-emmc.dtbo +dtb-$(CONFIG_ARCH_R9A09G057) +=3D r9a09g057h44-rzv2h-evk-cn15-sd.dtbo +r9a09g057h44-rzv2h-evk-cn15-sd.dts :=3D r9a09g057h44-rzv2h-evk.dtb r9a09g0= 57h44-rzv2h-evk-cn15-sd.dtbo dtb-$(CONFIG_ARCH_R9A09G057) +=3D r9a09g057h48-kakip.dtb =20 dtb-$(CONFIG_ARCH_RCAR_GEN3) +=3D draak-ebisu-panel-aa104xd12.dtbo diff --git a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk-cn15-emmc.d= tso b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk-cn15-emmc.dtso new file mode 100644 index 000000000000..b9a17f505efd --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk-cn15-emmc.dtso @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree overlay for the RZ/V2H EVK with the eMMC sub-board + * (RTK0EF0186802000BJ) connected to the CN15 connector. + * + * Copyright (C) 2025 Renesas Electronics Corp. + */ + +/dts-v1/; +/plugin/; + +#define RZV2H_PA 10 +#define EMMC_GPIO(port, pin) RZG2L_GPIO(RZV2H_P##port, pin) + +#include "rzv2-evk-cn15-emmc-common.dtsi" diff --git a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk-cn15-sd.dts= o b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk-cn15-sd.dtso new file mode 100644 index 000000000000..47cb581c1add --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk-cn15-sd.dtso @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree overlay for the RZ/V2H EVK with the SD sub-board + * (RTK0EF0186B01000BJ) connected to the CN15 connector. + * + * Copyright (C) 2025 Renesas Electronics Corp. + */ + +/dts-v1/; +/plugin/; + +#define RZV2H_PA 10 +#define SD_GPIO(port, pin) RZG2L_GPIO(RZV2H_P##port, pin) +#define SD_PORT_PINMUX(b, p, f) RZG2L_PORT_PINMUX(RZV2H_P##b, p, f) + +#include "rzv2-evk-cn15-sd-common.dtsi" diff --git a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts b/arch/= arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts index 01b2e0c7c7db..219347d73753 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts @@ -25,6 +25,7 @@ aliases { i2c6 =3D &i2c6; i2c7 =3D &i2c7; i2c8 =3D &i2c8; + mmc0 =3D &sdhi0; mmc1 =3D &sdhi1; serial0 =3D &scif; }; @@ -55,6 +56,15 @@ reg_0p8v: regulator-0p8v { regulator-always-on; }; =20 + reg_1p8v: regulator-1p8v { + compatible =3D "regulator-fixed"; + regulator-name =3D "fixed-1.8V"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + reg_3p3v: regulator-3p3v { compatible =3D "regulator-fixed"; =20 --=20 2.49.0