From nobody Thu Oct 9 06:11:32 2025 Received: from szxga05-in.huawei.com (szxga05-in.huawei.com [45.249.212.191]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EED7227CCF0 for ; Fri, 20 Jun 2025 09:40:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.191 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750412440; cv=none; b=m7tAqHN+a7JgxKnoktPWZANYCuyYU3ZFJ2BzPUXBMQQP0VBpgNk42Ki1l9UPYnSf9ZOA4J4oYm17vWBRVsfc4Eg01JGl7DyBKKAGrGSKc853Jq6dZUQiwko6D3Rwy+G9J9KqkxP2sybF526HQQZ2oLD9IkO22mVDKeNkTXTE1jA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750412440; c=relaxed/simple; bh=XOH54/zjPvf9VfACbhCE8L/pumAVzyXtBKoFSLujQhc=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=DUKLJYBANHhC+M41MjCTD7rY5BnO1H8fYEcc8atRaUGB1cUzMKmPpctw/blO4otA+sCmCQFVzj8Wfp7yNgZ9niKzcFPGgJ9I8rVHoOFGmbkOZUp+QxFZWykg/rO/DwD4JPsiC1MWDUYnPYHjsg0yF0A6fQLU89/w1GrY1lnvi5w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=45.249.212.191 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.19.163.17]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4bNsqt2h70z2BdXF; Fri, 20 Jun 2025 17:39:06 +0800 (CST) Received: from dggemv705-chm.china.huawei.com (unknown [10.3.19.32]) by mail.maildlp.com (Postfix) with ESMTPS id C7BF21A0188; Fri, 20 Jun 2025 17:40:36 +0800 (CST) Received: from kwepemq100007.china.huawei.com (7.202.195.175) by dggemv705-chm.china.huawei.com (10.3.19.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Fri, 20 Jun 2025 17:40:36 +0800 Received: from localhost.huawei.com (10.169.71.169) by kwepemq100007.china.huawei.com (7.202.195.175) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Fri, 20 Jun 2025 17:40:33 +0800 From: Yongbang Shi To: , , , , , , , , CC: , , , , , , , , , Subject: [PATCH v2 drm-dp 10/10] drm/hisilicon/hibmc: adapting modification for the former commit Date: Fri, 20 Jun 2025 17:31:04 +0800 Message-ID: <20250620093104.2016196-11-shiyongbang@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20250620093104.2016196-1-shiyongbang@huawei.com> References: <20250620093104.2016196-1-shiyongbang@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems100002.china.huawei.com (7.221.188.206) To kwepemq100007.china.huawei.com (7.202.195.175) Content-Type: text/plain; charset="utf-8" From: Baihan Li Add colorbar disable operation and move hdcp opreation behind the reset controller operation. Fixes: 3c7623fb5bb6 ("drm/hisilicon/hibmc: Enable this hot plug detect of i= rq feature") Fixes: 94ee73ee3020 ("drm/hisilicon/hibmc: add dp hw moduel in hibmc driver= ") Signed-off-by: Baihan Li Signed-off-by: Yongbang Shi --- ChangeLog: v1 -> v2: - separate the patch, suggested by Dmitry Baryshkov. --- drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c b/drivers/gpu/drm/h= isilicon/hibmc/dp/dp_hw.c index edb7539d830e..bb19636caf77 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c +++ b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c @@ -172,15 +172,17 @@ int hibmc_dp_hw_init(struct hibmc_dp *dp) dp_dev->link.cap.lanes =3D 0x2; dp_dev->link.cap.link_rate =3D DP_LINK_BW_8_1; =20 - /* hdcp data */ - writel(HIBMC_DP_HDCP, dp_dev->base + HIBMC_DP_HDCP_CFG); /* int init */ writel(0, dp_dev->base + HIBMC_DP_INTR_ENABLE); writel(HIBMC_DP_INT_RST, dp_dev->base + HIBMC_DP_INTR_ORIGINAL_STATUS); + /* clr colorbar */ + writel(0, dp_dev->base + HIBMC_DP_COLOR_BAR_CTRL); /* rst */ writel(0, dp_dev->base + HIBMC_DP_DPTX_RST_CTRL); usleep_range(30, 50); writel(HIBMC_DP_DPTX_RST, dp_dev->base + HIBMC_DP_DPTX_RST_CTRL); + /* hdcp data */ + writel(HIBMC_DP_HDCP, dp_dev->base + HIBMC_DP_HDCP_CFG); /* clock enable */ writel(HIBMC_DP_CLK_EN, dp_dev->base + HIBMC_DP_DPTX_CLK_CTRL); =20 --=20 2.33.0