From nobody Thu Oct 9 10:12:47 2025 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CEF287494; Thu, 19 Jun 2025 03:11:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750302720; cv=none; b=Nke/EpzLaFVmB1KzgzraQIGZ8orxuBkjpBNXZiwHCcmgPxdRiZj0q8p00+FREbNgvk3zsrKciPt7hHLT8jmovX0iyPbonXXwmSRiiqVUbP9esC+sHm7Pkd94jP3STzmfcZzE3u60mlx0MXeKRm55LsFAFHYx3A+X/hslwB9T2iY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750302720; c=relaxed/simple; bh=lKbu/Cr1fdopKcrVrBR1dDuKrwEs7fso9LhUYkSTEfY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=B/QexhLX/njv6bRjkk0ZZU1EivRpBUAYOGMz3IuD/JCq14SVn6YJpHvVElOVNWOCOMNAcV03cORv8B1YoSEgbQBQDWJJroVUUVwz4dghAH5VntaTMoXWjWsvrMsw4jLKh5l4heZpiQGTiW0AydDaKACBkH8XOGm0hVeunBJyK6s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=VGeL/y5+; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="VGeL/y5+" X-UUID: 253dac9c4cbb11f0b910cdf5d4d8066a-20250619 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=ruxJVekaFRByl5HYviVetA19Plr/hVRCaBN2bA/zgYs=; b=VGeL/y5+RFBoqZKD7UxCtU+vQygvqVJbj9HqfKvvV8QQu9ycJztjTKyy6E9oQGS+LkB8HR1naUAvl7GjFpgqITjLM0QfS5voyfHOKAe5kHG8iujbMRx30TF2IHxT5h7Tw0vLYvu7TaGLkzVh3CEB4o1lHzEwmXikSir9Vm6RBzc=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.2.3,REQID:2118f7fa-5f95-4d2b-9a03-3dcee7ea7648,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:09905cf,CLOUDID:8433c483-db76-4e00-9dd0-5c1455b2676b,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:nil,Content:0|50,EDM:-3 ,IP:nil,URL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV :0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 253dac9c4cbb11f0b910cdf5d4d8066a-20250619 Received: from mtkmbs14n1.mediatek.inc [(172.21.101.75)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1212898892; Thu, 19 Jun 2025 11:11:51 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Thu, 19 Jun 2025 11:11:48 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Thu, 19 Jun 2025 11:11:48 +0800 From: Kyrie Wu To: Hans Verkuil , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , , , , , CC: Subject: [PATCH v6 01/12] media: mediatek: jpeg: fix jpeg hw count setting Date: Thu, 19 Jun 2025 11:11:29 +0800 Message-ID: <20250619031142.27180-2-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250619031142.27180-1-kyrie.wu@mediatek.com> References: <20250619031142.27180-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" Different ICs have different amounts of hardware, use a variable to set the amount of hardware. Fixes: 934e8bccac95 ("mtk-jpegenc: support jpegenc multi-hardware") Fixes: 0fa49df4222f ("media: mtk-jpegdec: support jpegdec multi-hardware") Signed-off-by: Kyrie Wu --- drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 8 ++++---- drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h | 2 ++ drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 1 + drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 1 + 4 files changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.c index 7eb12449b63a..c4fef74dab96 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -1468,7 +1468,7 @@ static int mtk_jpegenc_get_hw(struct mtk_jpeg_ctx *ct= x) int i; =20 spin_lock_irqsave(&jpeg->hw_lock, flags); - for (i =3D 0; i < MTK_JPEGENC_HW_MAX; i++) { + for (i =3D 0; i < jpeg->max_hw_count; i++) { comp_jpeg =3D jpeg->enc_hw_dev[i]; if (comp_jpeg->hw_state =3D=3D MTK_JPEG_HW_IDLE) { hw_id =3D i; @@ -1515,7 +1515,7 @@ static int mtk_jpegdec_get_hw(struct mtk_jpeg_ctx *ct= x) int i; =20 spin_lock_irqsave(&jpeg->hw_lock, flags); - for (i =3D 0; i < MTK_JPEGDEC_HW_MAX; i++) { + for (i =3D 0; i < jpeg->max_hw_count; i++) { comp_jpeg =3D jpeg->dec_hw_dev[i]; if (comp_jpeg->hw_state =3D=3D MTK_JPEG_HW_IDLE) { hw_id =3D i; @@ -1598,7 +1598,7 @@ static void mtk_jpegenc_worker(struct work_struct *wo= rk) jpeg_work); struct mtk_jpeg_dev *jpeg =3D ctx->jpeg; =20 - for (i =3D 0; i < MTK_JPEGENC_HW_MAX; i++) + for (i =3D 0; i < jpeg->max_hw_count; i++) comp_jpeg[i] =3D jpeg->enc_hw_dev[i]; i =3D 0; =20 @@ -1693,7 +1693,7 @@ static void mtk_jpegdec_worker(struct work_struct *wo= rk) struct mtk_jpeg_fb fb; unsigned long flags; =20 - for (i =3D 0; i < MTK_JPEGDEC_HW_MAX; i++) + for (i =3D 0; i < jpeg->max_hw_count; i++) comp_jpeg[i] =3D jpeg->dec_hw_dev[i]; i =3D 0; =20 diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.h index 02ed0ed5b736..6be5cf30dea1 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h @@ -212,6 +212,7 @@ struct mtk_jpegdec_comp_dev { * @reg_decbase: jpg decode register base addr * @dec_hw_dev: jpg decode hardware device * @hw_index: jpg hw index + * @max_hw_count: jpeg hw-core count */ struct mtk_jpeg_dev { struct mutex lock; @@ -234,6 +235,7 @@ struct mtk_jpeg_dev { void __iomem *reg_decbase[MTK_JPEGDEC_HW_MAX]; struct mtk_jpegdec_comp_dev *dec_hw_dev[MTK_JPEGDEC_HW_MAX]; atomic_t hw_index; + u32 max_hw_count; }; =20 /** diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drive= rs/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c index e78e1d11093c..a1e54715cb7e 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c @@ -664,6 +664,7 @@ static int mtk_jpegdec_hw_probe(struct platform_device = *pdev) master_dev->dec_hw_dev[i] =3D dev; master_dev->reg_decbase[i] =3D dev->reg_base; dev->master_dev =3D master_dev; + master_dev->max_hw_count++; =20 platform_set_drvdata(pdev, dev); pm_runtime_enable(&pdev->dev); diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drive= rs/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c index 9ab27aee302a..28d05909c96f 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c @@ -386,6 +386,7 @@ static int mtk_jpegenc_hw_probe(struct platform_device = *pdev) master_dev->enc_hw_dev[i] =3D dev; master_dev->reg_encbase[i] =3D dev->reg_base; dev->master_dev =3D master_dev; + master_dev->max_hw_count++; =20 platform_set_drvdata(pdev, dev); pm_runtime_enable(&pdev->dev); --=20 2.46.0