From nobody Thu Oct 9 04:49:02 2025 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9341430E85B; Thu, 19 Jun 2025 18:37:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750358247; cv=pass; b=UXUmMLzD2VkMeV/4fl/8xSsawyXnZCidnlqUoAbX3iIIZVyEtwr3M2OxHto3n4AD2UfJiXOPyZWWRFXsCtyjh0hH9V92CVIwI09YIg+jsCxN0vSgAtyWL2chczRsXmZfVWabka4hNKe9CxOYZq8+YE4+jkBs1CDzW3AfSXwa3IY= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750358247; c=relaxed/simple; bh=oaURp9ZaqyFJzGcpscC8fs9pmcxaLXtuuhr8dLyMgUk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=towsY8o1INnwbZZhgyN3rpS0OLE/PTOS+6F0oDEd1d9NjEgX8Cvt/D3VmR/I652q+JgfSwaK7Uujv2YT/M6Mcd/FYKmJPdzfKnvteL/Lva8t1hDES95u3XDdO9dIAcrwyPrIbHHvMI8BmyT3Xr2Rs7yU6yyyR23j9GWy+YkTrwk= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b=abZwYV+C; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b="abZwYV+C" ARC-Seal: i=1; a=rsa-sha256; t=1750358214; cv=none; d=zohomail.com; s=zohoarc; b=X7OaDQZj9RwQRcDiWEwetQS5+qf2CgKktlSI8t202Hu/AssRWlPh029kUhRBRGnv7k4iZx+2XIIxQjOL1BgpL/DHZAlIbt3WU0aWGPLdqq4gjTGil2OOeF1gT+GcS8sbLTJisQM2WUfo/tCD7Y9HecrbrIAlOsxsR1TtIBZA2VA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1750358214; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=84SwQNFg910/eDR0PWci4rXWu4NhRGZ9vuNnT3tcdCo=; b=gF/4EdyiKt+Sol2VYSzKg0WJ24q/vSWEsgh09gNCptAh6bbyn0LvyFJnd73g2nFhuZwBiiHJyZe32errMEopKQUCuVZfzdMrSrEjzM0hPVQ4Qo+gYBWCsfXYFUk5Om3DAOawZ4/wJNRWexEXiq/hYMoQ5RQZLT+RrFNLyYL9qlU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1750358214; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:References:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=84SwQNFg910/eDR0PWci4rXWu4NhRGZ9vuNnT3tcdCo=; b=abZwYV+CC76/5/nnyDeE19j8TD1MAWcjVCtBtpEDEc/UVIHQJ/yiDfag6g36M5pC BOKxrvko3BJz8BG51v+sCFbVoe1Y0Beza8BIr7IA4ejYxrUJeudBL4+Ly/OlcbxVRMS EuJsPzom9i+eiMhffkcCWBrYEy9Hz/gYOIt8D7/U= Received: by mx.zohomail.com with SMTPS id 1750358212038804.751877293923; Thu, 19 Jun 2025 11:36:52 -0700 (PDT) From: Nicolas Frattaroli Date: Thu, 19 Jun 2025 20:36:36 +0200 Subject: [PATCH v5 1/2] phy: rockchip: inno-usb2: add soft vbusvalid control Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250619-rk3576-sige5-usb-v5-1-9069a7e750e1@collabora.com> References: <20250619-rk3576-sige5-usb-v5-0-9069a7e750e1@collabora.com> In-Reply-To: <20250619-rk3576-sige5-usb-v5-0-9069a7e750e1@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Frank Wang , Neil Armstrong Cc: Alexey Charkov , Sebastian Reichel , kernel@collabora.com, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Nicolas Frattaroli X-Mailer: b4 0.14.2 With USB type C connectors, the vbus detect pin of the OTG controller attached to it is pulled high by a USB Type C controller chip such as the fusb302. This means USB enumeration on Type-C ports never works, as the vbus is always seen as high. Rockchip added some GRF register flags to deal with this situation. The RK3576 TRM calls these "soft_vbusvalid_bvalid" (con0 bit index 15) and "soft_vbusvalid_bvalid_sel" (con0 bit index 14). Downstream introduces a new vendor property which tells the USB 2 PHY that it's connected to a type C port, but we can do better. Since in such an arrangement, we'll have an OF graph connection from the USB controller to the USB connector anyway, we can walk said OF graph and check the connector's compatible to determine this without adding any further vendor properties. Do keep in mind that the usbdp PHY driver seemingly fiddles with these register fields as well, but what it does doesn't appear to be enough for us to get working USB enumeration, presumably because the whole vbus_attach logic needs to be adjusted as well either way. Signed-off-by: Nicolas Frattaroli --- drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 108 ++++++++++++++++++++++= +++- 1 file changed, 104 insertions(+), 4 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/ro= ckchip/phy-rockchip-inno-usb2.c index b0f23690ec3002202c0f33a6988f5509622fa10e..71810c07e4150ea81f65a8a9325= 41b144e95a137 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -114,6 +115,8 @@ struct rockchip_chg_det_reg { /** * struct rockchip_usb2phy_port_cfg - usb-phy port configuration. * @phy_sus: phy suspend register. + * @svbus_en: soft vbus bvalid enable register. + * @svbus_sel: soft vbus bvalid selection register. * @bvalid_det_en: vbus valid rise detection enable register. * @bvalid_det_st: vbus valid rise detection status register. * @bvalid_det_clr: vbus valid rise detection clear register. @@ -140,6 +143,8 @@ struct rockchip_chg_det_reg { */ struct rockchip_usb2phy_port_cfg { struct usb2phy_reg phy_sus; + struct usb2phy_reg svbus_en; + struct usb2phy_reg svbus_sel; struct usb2phy_reg bvalid_det_en; struct usb2phy_reg bvalid_det_st; struct usb2phy_reg bvalid_det_clr; @@ -203,6 +208,7 @@ struct rockchip_usb2phy_cfg { * @event_nb: hold event notification callback. * @state: define OTG enumeration states before device reset. * @mode: the dr_mode of the controller. + * @typec_vbus_det: whether to apply Type C logic to OTG vbus detection. */ struct rockchip_usb2phy_port { struct phy *phy; @@ -222,6 +228,7 @@ struct rockchip_usb2phy_port { struct notifier_block event_nb; enum usb_otg_state state; enum usb_dr_mode mode; + bool typec_vbus_det; }; =20 /** @@ -495,6 +502,13 @@ static int rockchip_usb2phy_init(struct phy *phy) mutex_lock(&rport->mutex); =20 if (rport->port_id =3D=3D USB2PHY_PORT_OTG) { + if (rport->typec_vbus_det) { + if (rport->port_cfg->svbus_en.enable && + rport->port_cfg->svbus_sel.enable) { + property_enable(rphy->grf, &rport->port_cfg->svbus_en, true); + property_enable(rphy->grf, &rport->port_cfg->svbus_sel, true); + } + } if (rport->mode !=3D USB_DR_MODE_HOST && rport->mode !=3D USB_DR_MODE_UNKNOWN) { /* clear bvalid status and enable bvalid detect irq */ @@ -535,8 +549,7 @@ static int rockchip_usb2phy_init(struct phy *phy) if (ret) goto out; =20 - schedule_delayed_work(&rport->otg_sm_work, - OTG_SCHEDULE_DELAY * 3); + schedule_delayed_work(&rport->otg_sm_work, 0); } else { /* If OTG works in host only mode, do nothing. */ dev_dbg(&rport->phy->dev, "mode %d\n", rport->mode); @@ -666,8 +679,12 @@ static void rockchip_usb2phy_otg_sm_work(struct work_s= truct *work) unsigned long delay; bool vbus_attach, sch_work, notify_charger; =20 - vbus_attach =3D property_enabled(rphy->grf, - &rport->port_cfg->utmi_bvalid); + if (rport->port_cfg->svbus_en.enable && rport->typec_vbus_det) { + vbus_attach =3D true; + } else { + vbus_attach =3D property_enabled(rphy->grf, + &rport->port_cfg->utmi_bvalid); + } =20 sch_work =3D false; notify_charger =3D false; @@ -1276,6 +1293,83 @@ static int rockchip_otg_event(struct notifier_block = *nb, return NOTIFY_DONE; } =20 +static const char *const rockchip_usb2phy_typec_cons[] =3D { + "usb-c-connector", + NULL, +}; + +static struct device_node *rockchip_usb2phy_to_controller(struct rockchip_= usb2phy *rphy) +{ + struct device_node *np; + struct device_node *parent; + + for_each_node_with_property(np, "phys") { + struct of_phandle_iterator it; + int ret; + + of_for_each_phandle(&it, ret, np, "phys", NULL, 0) { + parent =3D of_get_parent(it.node); + if (it.node !=3D rphy->dev->of_node && rphy->dev->of_node !=3D parent) { + if (parent) + of_node_put(parent); + continue; + } + + /* + * Either the PHY phandle we're iterating or its parent + * matched, we don't care about which out of the two in + * particular as we just need to know it's the right + * USB controller for this PHY. + */ + of_node_put(it.node); + of_node_put(parent); + return np; + } + } + + return NULL; +} + +static bool rockchip_usb2phy_otg_is_type_c(struct rockchip_usb2phy *rphy) +{ + struct device_node *controller =3D rockchip_usb2phy_to_controller(rphy); + struct device_node *ports; + struct device_node *ep =3D NULL; + struct device_node *parent; + + if (!controller) + return false; + + ports =3D of_get_child_by_name(controller, "ports"); + if (ports) { + of_node_put(controller); + controller =3D ports; + } + + for_each_of_graph_port(controller, port) { + ep =3D of_get_child_by_name(port, "endpoint"); + if (!ep) + continue; + + parent =3D of_graph_get_remote_port_parent(ep); + of_node_put(ep); + if (!parent) + continue; + + if (of_device_compatible_match(parent, rockchip_usb2phy_typec_cons)) { + of_node_put(parent); + of_node_put(controller); + return true; + } + + of_node_put(parent); + } + + of_node_put(controller); + + return false; +} + static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy, struct rockchip_usb2phy_port *rport, struct device_node *child_np) @@ -1297,6 +1391,8 @@ static int rockchip_usb2phy_otg_port_init(struct rock= chip_usb2phy *rphy, =20 mutex_init(&rport->mutex); =20 + rport->typec_vbus_det =3D rockchip_usb2phy_otg_is_type_c(rphy); + rport->mode =3D of_usb_get_dr_mode_by_phy(child_np, -1); if (rport->mode =3D=3D USB_DR_MODE_HOST || rport->mode =3D=3D USB_DR_MODE_UNKNOWN) { @@ -2050,6 +2146,8 @@ static const struct rockchip_usb2phy_cfg rk3576_phy_c= fgs[] =3D { .port_cfgs =3D { [USB2PHY_PORT_OTG] =3D { .phy_sus =3D { 0x0000, 8, 0, 0, 0x1d1 }, + .svbus_en =3D { 0x0000, 15, 15, 0, 1 }, + .svbus_sel =3D { 0x0000, 14, 14, 0, 1 }, .bvalid_det_en =3D { 0x00c0, 1, 1, 0, 1 }, .bvalid_det_st =3D { 0x00c4, 1, 1, 0, 1 }, .bvalid_det_clr =3D { 0x00c8, 1, 1, 0, 1 }, @@ -2087,6 +2185,8 @@ static const struct rockchip_usb2phy_cfg rk3576_phy_c= fgs[] =3D { .port_cfgs =3D { [USB2PHY_PORT_OTG] =3D { .phy_sus =3D { 0x2000, 8, 0, 0, 0x1d1 }, + .svbus_en =3D { 0x2000, 15, 15, 0, 1 }, + .svbus_sel =3D { 0x2000, 14, 14, 0, 1 }, .bvalid_det_en =3D { 0x20c0, 1, 1, 0, 1 }, .bvalid_det_st =3D { 0x20c4, 1, 1, 0, 1 }, .bvalid_det_clr =3D { 0x20c8, 1, 1, 0, 1 }, --=20 2.49.0 From nobody Thu Oct 9 04:49:02 2025 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9E8EA28CF6B; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250619-rk3576-sige5-usb-v5-2-9069a7e750e1@collabora.com> References: <20250619-rk3576-sige5-usb-v5-0-9069a7e750e1@collabora.com> In-Reply-To: <20250619-rk3576-sige5-usb-v5-0-9069a7e750e1@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Frank Wang , Neil Armstrong Cc: Alexey Charkov , Sebastian Reichel , kernel@collabora.com, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Nicolas Frattaroli X-Mailer: b4 0.14.2 The ArmSoM Sige5 has several USB ports: a Type-A USB 3 port (USB2 lines going through a hub), a Type-A USB 2.0 port (also going through a hub), a Type-C DC input port that has absolutely no USB data connection and a Type-C port with USB3.2 Gen1x1 that's also the maskrom programming port. Enable these ports, and set the device role to be host for the host ports. The data capable Type-C USB port uses a fusb302 for data role switching. Signed-off-by: Nicolas Frattaroli --- .../boot/dts/rockchip/rk3576-armsom-sige5.dts | 160 +++++++++++++++++= ++++ 1 file changed, 160 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts b/arch/ar= m64/boot/dts/rockchip/rk3576-armsom-sige5.dts index 34e51cd71eac0395c7f36c892fc0711f6c324aea..b52646d76454671d83e7d684f67= c2186f8b8c3d7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts @@ -205,6 +205,33 @@ vcc_3v3_ufs_s0: regulator-vcc-ufs-s0 { regulator-max-microvolt =3D <3300000>; vin-supply =3D <&vcc_5v0_sys>; }; + + vcc_5v0_typec0: regulator-vcc-5v0-typec0 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_otg0_pwren>; + regulator-name =3D "vcc_5v0_typec0"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc_5v0_device>; + }; + vcc_5v0_usbhost: regulator-vcc-5v0-usbhost { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_host_pwren>; + regulator-name =3D "vcc_5v0_usbhost"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc_5v0_device>; + }; +}; + +&combphy1_psu { + status =3D "okay"; }; =20 &combphy0_ps { @@ -631,6 +658,58 @@ regulator-state-mem { &i2c2 { status =3D "okay"; =20 + usbc0: typec-portc@22 { + compatible =3D "fcs,fusb302"; + reg =3D <0x22>; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usbc0_interrupt>; + vbus-supply =3D <&vcc_5v0_typec0>; + + connector { + compatible =3D "usb-c-connector"; + label =3D "USB-C"; + data-role =3D "dual"; + /* fusb302 supports PD Rev 2.0 Ver 1.2 */ + pd-revision =3D /bits/ 8 <0x2 0x0 0x1 0x2>; + power-role =3D "source"; + source-pdos =3D ; + + altmodes { + displayport { + svid =3D /bits/ 16 <0xff01>; + vdo =3D <0xffffffff>; + }; + }; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + usbc0_hs_ep: endpoint { + remote-endpoint =3D <&usb_drd0_hs_ep>; + }; + }; + port@1 { + reg =3D <1>; + usbc0_ss_ep: endpoint { + remote-endpoint =3D <&usb_drd0_ss_ep>; + }; + }; + port@2 { + reg =3D <2>; + usbc0_dp_ep: endpoint { + remote-endpoint =3D <&usbdp_phy_ep>; + }; + }; + }; + }; + }; + hym8563: rtc@51 { compatible =3D "haoyu,hym8563"; reg =3D <0x51>; @@ -736,6 +815,24 @@ pcie_reset: pcie-reset { rockchip,pins =3D <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; }; }; + + usb { + usb_host_pwren: usb-host-pwren { + rockchip,pins =3D <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + usb_otg0_pwren: usb-otg0-pwren { + rockchip,pins =3D <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + usbc0_interrupt: usbc0-interrupt { + rockchip,pins =3D <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + usbc0_sbu1: usbc0-sbu1 { + rockchip,pins =3D <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + usbc0_sbu2: usbc0-sbu2 { + rockchip,pins =3D <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; }; =20 &sai1 { @@ -777,11 +874,74 @@ &sdmmc { status =3D "okay"; }; =20 +&u2phy0 { + status =3D "okay"; +}; + +&u2phy0_otg { + status =3D "okay"; +}; + +&u2phy1 { + status =3D "okay"; +}; + +&u2phy1_otg { + phy-supply =3D <&vcc_5v0_usbhost>; + status =3D "okay"; +}; + &uart0 { pinctrl-0 =3D <&uart0m0_xfer>; status =3D "okay"; }; =20 +&usb_drd0_dwc3 { + usb-role-switch; + dr_mode =3D "otg"; + status =3D "okay"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + usb_drd0_hs_ep: endpoint { + remote-endpoint =3D <&usbc0_hs_ep>; + }; + }; + + port@1 { + reg =3D <1>; + usb_drd0_ss_ep: endpoint { + remote-endpoint =3D <&usbc0_ss_ep>; + }; + }; + }; +}; + +&usb_drd1_dwc3 { + dr_mode =3D "host"; + status =3D "okay"; +}; + +&usbdp_phy { + mode-switch; + orientation-switch; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usbc0_sbu1 &usbc0_sbu2>; + sbu1-dc-gpios =3D <&gpio2 RK_PA6 GPIO_ACTIVE_HIGH>; + sbu2-dc-gpios =3D <&gpio2 RK_PA7 GPIO_ACTIVE_HIGH>; + status =3D "okay"; + + port { + usbdp_phy_ep: endpoint { + remote-endpoint =3D <&usbc0_dp_ep>; + }; + }; +}; + &vop { status =3D "okay"; }; --=20 2.49.0