From nobody Thu Oct 9 09:07:03 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E37D52DE1EC; Wed, 18 Jun 2025 12:43:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750250606; cv=none; b=H2EbACU8/2C+dwHw6046qte71j5bu9PWLNZ4635/jQ5T8IcxaKQPoLfAxhYNQHRq/DWV+TRE1fatkwBMyp2MJ3zTu6Mqu/GrGju/HRfnjHTcfBgeu9vAMP8RyxTv7pTSTqoCDvAi8BL1oyvLt629aJ5NMlDtyZpW5Ir/FKl1U1s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750250606; c=relaxed/simple; bh=sEwTFjUCiBVe4R3iljd5w8GSzTd/qtNXrriFMn9qrO0=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version:Content-Type; b=SyiwhGzGGhSrCL81eJh2cnAvS+9z3WZ5VkGj+fGgpQTrZaN4RoCuacAS5AqL0lUZHoxVrJ/LD6elWtwjItOaPI+LUkW2xXL3KNWq2ZiYeY0sdGsVgp6dRqyXSzrz5aoEPbE+8XBDoDNFOzGp4mt9ToPoC0lxdAgyN/jH+j8miLw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=QgFQjueK; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="QgFQjueK" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C75A8C4CEF2; Wed, 18 Jun 2025 12:43:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1750250605; bh=sEwTFjUCiBVe4R3iljd5w8GSzTd/qtNXrriFMn9qrO0=; h=From:To:Cc:Subject:Date:From; b=QgFQjueKKcZsRqeXF7t+tyGl+x6nLtDn14B49OhBEA55yl8XHJDZaL2HnyuxqQ+/X VvW7RehI4AsLyDQ0HQV6ZaxSICG7HVCR5mSoXxY5p1vrcSzVcJd6CNNsWfOXJZVtlM 6kaviF1wY2vRe3kXwu3UjqXz4jFa/9+nZ2S+kZPpv+wxC2xwK42PvOm7oWpXXaXUtZ s7HdFaEzhAmPuLWIZEwVbO1OnJme5EDlnRGY2+pO4pqcKIQcs2ISoMdKnnv2l/U1dI 5ISwor4hZfuWh+lotKpcPWwXbLXpejpdnFdPVE5Di9OZYOAeS0YpGgWD0HJkNgNqSi RL2nwSFyXIehQ== From: =?UTF-8?q?Marek=20Beh=C3=BAn?= To: linux-gpio@vger.kernel.org Cc: =?UTF-8?q?Marek=20Beh=C3=BAn?= , Linus Walleij , Bartosz Golaszewski , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Andy Shevchenko Subject: [PATCH] platform: cznic: turris-omnia-mcu: Use new GPIO line value setter callbacks Date: Wed, 18 Jun 2025 14:43:19 +0200 Message-ID: <20250618124319.19220-1-kabel@kernel.org> X-Mailer: git-send-email 2.49.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Signed-off-by: Marek Beh=C3=BAn --- .../platform/cznic/turris-omnia-mcu-gpio.c | 35 ++++++++++++------- 1 file changed, 22 insertions(+), 13 deletions(-) diff --git a/drivers/platform/cznic/turris-omnia-mcu-gpio.c b/drivers/platf= orm/cznic/turris-omnia-mcu-gpio.c index c2df24ea8686..57c229d70ead 100644 --- a/drivers/platform/cznic/turris-omnia-mcu-gpio.c +++ b/drivers/platform/cznic/turris-omnia-mcu-gpio.c @@ -439,27 +439,28 @@ static int omnia_gpio_get_multiple(struct gpio_chip *= gc, unsigned long *mask, return 0; } =20 -static void omnia_gpio_set(struct gpio_chip *gc, unsigned int offset, int = value) +static int omnia_gpio_set(struct gpio_chip *gc, unsigned int offset, int v= alue) { const struct omnia_gpio *gpio =3D &omnia_gpios[offset]; struct omnia_mcu *mcu =3D gpiochip_get_data(gc); u16 val, mask; =20 if (!gpio->ctl_cmd) - return; + return -ENOTSUPP; =20 mask =3D BIT(gpio->ctl_bit); val =3D value ? mask : 0; =20 - omnia_ctl_cmd(mcu, gpio->ctl_cmd, val, mask); + return omnia_ctl_cmd(mcu, gpio->ctl_cmd, val, mask); } =20 -static void omnia_gpio_set_multiple(struct gpio_chip *gc, unsigned long *m= ask, - unsigned long *bits) +static int omnia_gpio_set_multiple(struct gpio_chip *gc, unsigned long *ma= sk, + unsigned long *bits) { unsigned long ctl =3D 0, ctl_mask =3D 0, ext_ctl =3D 0, ext_ctl_mask =3D = 0; struct omnia_mcu *mcu =3D gpiochip_get_data(gc); unsigned int i; + int err; =20 for_each_set_bit(i, mask, ARRAY_SIZE(omnia_gpios)) { unsigned long *field, *field_mask; @@ -488,13 +489,21 @@ static void omnia_gpio_set_multiple(struct gpio_chip = *gc, unsigned long *mask, =20 guard(mutex)(&mcu->lock); =20 - if (ctl_mask) - omnia_ctl_cmd_locked(mcu, OMNIA_CMD_GENERAL_CONTROL, - ctl, ctl_mask); + if (ctl_mask) { + err =3D omnia_ctl_cmd_locked(mcu, OMNIA_CMD_GENERAL_CONTROL, + ctl, ctl_mask); + if (err) + return err; + } + + if (ext_ctl_mask) { + err =3D omnia_ctl_cmd_locked(mcu, OMNIA_CMD_EXT_CONTROL, + ext_ctl, ext_ctl_mask); + if (err) + return err; + } =20 - if (ext_ctl_mask) - omnia_ctl_cmd_locked(mcu, OMNIA_CMD_EXT_CONTROL, - ext_ctl, ext_ctl_mask); + return 0; } =20 static bool omnia_gpio_available(struct omnia_mcu *mcu, @@ -1015,8 +1024,8 @@ int omnia_mcu_register_gpiochip(struct omnia_mcu *mcu) mcu->gc.direction_output =3D omnia_gpio_direction_output; mcu->gc.get =3D omnia_gpio_get; mcu->gc.get_multiple =3D omnia_gpio_get_multiple; - mcu->gc.set =3D omnia_gpio_set; - mcu->gc.set_multiple =3D omnia_gpio_set_multiple; + mcu->gc.set_rv =3D omnia_gpio_set; + mcu->gc.set_multiple_rv =3D omnia_gpio_set_multiple; mcu->gc.init_valid_mask =3D omnia_gpio_init_valid_mask; mcu->gc.can_sleep =3D true; mcu->gc.names =3D omnia_mcu_gpio_names; --=20 2.49.0