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charset="utf-8" Add FEAT_MTE_TAGGED_FAR cpucap which makes FAR_ELx report all non-address bits on a synchronous MTE tag check fault since Armv8.9 Signed-off-by: Yeoreum Yun Acked-by: Yury Khrustalev --- arch/arm64/kernel/cpufeature.c | 8 ++++++++ arch/arm64/tools/cpucaps | 1 + 2 files changed, 9 insertions(+) diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index b34044e20128..af6a6924a3e8 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -320,6 +320,7 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr1[] = =3D { =20 static const struct arm64_ftr_bits ftr_id_aa64pfr2[] =3D { ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR2_EL1_F= PMR_SHIFT, 4, 0), + ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR2_EL= 1_MTEFAR_SHIFT, 4, ID_AA64PFR2_EL1_MTEFAR_NI), ARM64_FTR_END, }; =20 @@ -2874,6 +2875,13 @@ static const struct arm64_cpu_capabilities arm64_fea= tures[] =3D { .matches =3D has_cpuid_feature, ARM64_CPUID_FIELDS(ID_AA64PFR1_EL1, MTE, MTE3) }, + { + .desc =3D "FAR on MTE Tag Check Fault", + .capability =3D ARM64_MTE_FAR, + .type =3D ARM64_CPUCAP_SYSTEM_FEATURE, + .matches =3D has_cpuid_feature, + ARM64_CPUID_FIELDS(ID_AA64PFR2_EL1, MTEFAR, IMP) + }, #endif /* CONFIG_ARM64_MTE */ { .desc =3D "RCpc load-acquire (LDAPR)", diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index 10effd4cff6b..fe8f4f8ce95c 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -68,6 +68,7 @@ MPAM MPAM_HCR MTE MTE_ASYMM +MTE_FAR SME SME_FA64 SME2 --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Thu Oct 9 10:02:56 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A81AC28000E; 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dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 688B914BF; Wed, 18 Jun 2025 01:45:02 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C36A83F66E; Wed, 18 Jun 2025 01:45:20 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, pcc@google.com, will@kernel.org, broonie@kernel.org, anshuman.khandual@arm.com, joey.gouly@arm.com, yury.khrustalev@arm.com, maz@kernel.org, oliver.upton@linux.dev, frederic@kernel.org, akpm@linux-foundation.org, surenb@google.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Yeoreum Yun Subject: [PATCH v9 02/10] arm64: report address tag when FEAT_MTE_TAGGED_FAR is supported Date: Wed, 18 Jun 2025 09:45:05 +0100 Message-Id: <20250618084513.1761345-3-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250618084513.1761345-1-yeoreum.yun@arm.com> References: <20250618084513.1761345-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" If FEAT_MTE_TAGGED_FAR (Armv8.9) is supported, bits 63:60 of the fault addr= ess are preserved in response to synchronous tag check faults (SEGV_MTESERR). This patch modifies below to support this feature: - Use the original FAR_EL1 value when an MTE tag check fault occurs, if ARM64_MTE_FAR is supported so that not only logical tag (bits 59:56) but also address tag (bits 63:60] being reported too. - Add HWCAP for mtefar to let user know bits 63:60 includes address tag information when when FEAT_MTE_TAGGED_FAR is supported. Applications that require this information should install a signal handler with the SA_EXPOSE_TAGBITS flag. While this introduces a minor ABI change, most applications do not set this flag and therefore will not be affected. Signed-off-by: Yeoreum Yun --- Documentation/arch/arm64/elf_hwcaps.rst | 3 +++ Documentation/arch/arm64/tagged-pointers.rst | 11 ++++++----- arch/arm64/include/asm/hwcap.h | 1 + arch/arm64/include/uapi/asm/hwcap.h | 1 + arch/arm64/kernel/cpufeature.c | 1 + arch/arm64/kernel/cpuinfo.c | 1 + arch/arm64/mm/fault.c | 7 +++++-- 7 files changed, 18 insertions(+), 7 deletions(-) diff --git a/Documentation/arch/arm64/elf_hwcaps.rst b/Documentation/arch/a= rm64/elf_hwcaps.rst index 69d7afe56853..358f5af035ff 100644 --- a/Documentation/arch/arm64/elf_hwcaps.rst +++ b/Documentation/arch/arm64/elf_hwcaps.rst @@ -435,6 +435,9 @@ HWCAP2_SME_SF8DP4 HWCAP2_POE Functionality implied by ID_AA64MMFR3_EL1.S1POE =3D=3D 0b0001. =20 +HWCAP3_MTE_FAR + Functionality implied by ID_AA64PFR2_EL1.MTEFAR =3D=3D 0b0001. + 4. Unused AT_HWCAP bits ----------------------- =20 diff --git a/Documentation/arch/arm64/tagged-pointers.rst b/Documentation/a= rch/arm64/tagged-pointers.rst index 81b6c2a770dd..f87a925ca9a5 100644 --- a/Documentation/arch/arm64/tagged-pointers.rst +++ b/Documentation/arch/arm64/tagged-pointers.rst @@ -60,11 +60,12 @@ that signal handlers in applications making use of tags= cannot rely on the tag information for user virtual addresses being maintained in these fields unless the flag was set. =20 -Due to architecture limitations, bits 63:60 of the fault address -are not preserved in response to synchronous tag check faults -(SEGV_MTESERR) even if SA_EXPOSE_TAGBITS was set. Applications should -treat the values of these bits as undefined in order to accommodate -future architecture revisions which may preserve the bits. +If FEAT_MTE_TAGGED_FAR (Armv8.9) is supported, bits 63:60 of the fault add= ress +are preserved in response to synchronous tag check faults (SEGV_MTESERR) +otherwise not preserved even if SA_EXPOSE_TAGBITS was set. +Applications should interpret the values of these bits based on +the support for the HWCAP3_MTE_FAR. If the support is not present, +the values of these bits should be considered as undefined otherwise valid. =20 For signals raised in response to watchpoint debug exceptions, the tag information will be preserved regardless of the SA_EXPOSE_TAGBITS diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h index 1c3f9617d54f..28dd1ac29ecc 100644 --- a/arch/arm64/include/asm/hwcap.h +++ b/arch/arm64/include/asm/hwcap.h @@ -176,6 +176,7 @@ #define KERNEL_HWCAP_POE __khwcap2_feature(POE) =20 #define __khwcap3_feature(x) (const_ilog2(HWCAP3_ ## x) + 128) +#define KERNEL_HWCAP_MTE_FAR __khwcap3_feature(MTE_FAR) =20 /* * This yields a mask that user programs can use to figure out what diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/= asm/hwcap.h index 705a7afa8e58..7d22527a7975 100644 --- a/arch/arm64/include/uapi/asm/hwcap.h +++ b/arch/arm64/include/uapi/asm/hwcap.h @@ -143,5 +143,6 @@ /* * HWCAP3 flags - for AT_HWCAP3 */ +#define HWCAP3_MTE_FAR (1UL << 0) =20 #endif /* _UAPI__ASM_HWCAP_H */ diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index af6a6924a3e8..8a5284c733b7 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -3219,6 +3219,7 @@ static const struct arm64_cpu_capabilities arm64_elf_= hwcaps[] =3D { #ifdef CONFIG_ARM64_MTE HWCAP_CAP(ID_AA64PFR1_EL1, MTE, MTE2, CAP_HWCAP, KERNEL_HWCAP_MTE), HWCAP_CAP(ID_AA64PFR1_EL1, MTE, MTE3, CAP_HWCAP, KERNEL_HWCAP_MTE3), + HWCAP_CAP(ID_AA64PFR2_EL1, MTEFAR, IMP, CAP_HWCAP, KERNEL_HWCAP_MTE_FAR), #endif /* CONFIG_ARM64_MTE */ HWCAP_CAP(ID_AA64MMFR0_EL1, ECV, IMP, CAP_HWCAP, KERNEL_HWCAP_ECV), HWCAP_CAP(ID_AA64MMFR1_EL1, AFP, IMP, CAP_HWCAP, KERNEL_HWCAP_AFP), diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c index c1f2b6b04b41..e552cb305641 100644 --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c @@ -160,6 +160,7 @@ static const char *const hwcap_str[] =3D { [KERNEL_HWCAP_SME_SFEXPA] =3D "smesfexpa", [KERNEL_HWCAP_SME_STMOP] =3D "smestmop", [KERNEL_HWCAP_SME_SMOP4] =3D "smesmop4", + [KERNEL_HWCAP_MTE_FAR] =3D "mtefar", }; =20 #ifdef CONFIG_COMPAT diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c index ec0a337891dd..832d8540e13b 100644 --- a/arch/arm64/mm/fault.c +++ b/arch/arm64/mm/fault.c @@ -837,9 +837,12 @@ static int do_tag_check_fault(unsigned long far, unsig= ned long esr, /* * The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN * for tag check faults. Set them to corresponding bits in the untagged - * address. + * address if ARM64_MTE_FAR isn't supported. + * Otherwise, bits 63:60 of FAR_EL1 are not UNKNOWN. */ - far =3D (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK); + if (!cpus_have_cap(ARM64_MTE_FAR)) + far =3D (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK); + do_bad_area(far, esr, regs); return 0; } --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Thu Oct 9 10:02:56 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2DDD815D1; Wed, 18 Jun 2025 08:45:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750236327; cv=none; b=cb8AmvPzmjcSfmhg/ui3JoZRxqRr3dhHkIFwuu53HWtt/BbHTab1IQqZ+YV9Zcflj8p8D2CsSxPvaukn05FfwyYmxF9jNgJDXTRh62WSsdmnyV0w+OVWHAvMvYZg0T+73khJG5fFtLDppnUZK5Z6EpEQKh0FBp1bQaq2CbK5nsE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750236327; c=relaxed/simple; bh=cmsvfv56amC5Sa8cFhMOnu4EsHj1UIUNeVTlNt1rxag=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=EB/KAdQ23qoHYeRHsKThSsnI7fc6bHhLbsFlMtOVRi9WgFSLYfmDLmX3claPRWVCe2N0/2uW3zzC3Xj0oXzfga4jnw9/hDYEJgdCxt4G2a8zIGMFWW0e0gLlFNtcBvDteNCEK5o/gGqZI1LJxnM6zcjkcJ6UgDl/Q/ej1RLml4Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EC3C014BF; Wed, 18 Jun 2025 01:45:04 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 5329E3F66E; Wed, 18 Jun 2025 01:45:23 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, pcc@google.com, will@kernel.org, broonie@kernel.org, anshuman.khandual@arm.com, joey.gouly@arm.com, yury.khrustalev@arm.com, maz@kernel.org, oliver.upton@linux.dev, frederic@kernel.org, akpm@linux-foundation.org, surenb@google.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Yeoreum Yun Subject: [PATCH v9 03/10] arm64/kvm: expose FEAT_MTE_TAGGED_FAR feature to guest Date: Wed, 18 Jun 2025 09:45:06 +0100 Message-Id: <20250618084513.1761345-4-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250618084513.1761345-1-yeoreum.yun@arm.com> References: <20250618084513.1761345-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" expose FEAT_MTE_TAGGED_FAR feature to guest. Signed-off-by: Yeoreum Yun Acked-by: Marc Zyngier --- arch/arm64/kvm/sys_regs.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 76c2f0da821f..c8c92cb9da01 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1586,7 +1586,7 @@ static u64 __kvm_read_sanitised_id_reg(const struct k= vm_vcpu *vcpu, const struct sys_reg_desc *r) { u32 id =3D reg_to_encoding(r); - u64 val; + u64 val, mask; =20 if (sysreg_visible_as_raz(vcpu, r)) return 0; @@ -1617,8 +1617,12 @@ static u64 __kvm_read_sanitised_id_reg(const struct = kvm_vcpu *vcpu, val &=3D ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MPAM_frac); break; case SYS_ID_AA64PFR2_EL1: - /* We only expose FPMR */ - val &=3D ID_AA64PFR2_EL1_FPMR; + mask =3D ID_AA64PFR2_EL1_FPMR; + + if (kvm_has_mte(vcpu->kvm)) + mask |=3D ID_AA64PFR2_EL1_MTEFAR; + + val &=3D mask; break; case SYS_ID_AA64ISAR1_EL1: if (!vcpu_has_ptrauth(vcpu)) @@ -2878,7 +2882,9 @@ static const struct sys_reg_desc sys_reg_descs[] =3D { ID_AA64PFR1_EL1_MPAM_frac | ID_AA64PFR1_EL1_RAS_frac | ID_AA64PFR1_EL1_MTE)), - ID_WRITABLE(ID_AA64PFR2_EL1, ID_AA64PFR2_EL1_FPMR), + ID_WRITABLE(ID_AA64PFR2_EL1, + ID_AA64PFR2_EL1_FPMR | + ID_AA64PFR2_EL1_MTEFAR), ID_UNALLOCATED(4,3), ID_WRITABLE(ID_AA64ZFR0_EL1, ~ID_AA64ZFR0_EL1_RES0), ID_HIDDEN(ID_AA64SMFR0_EL1), --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Thu Oct 9 10:02:56 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id BDDF82820B9; Wed, 18 Jun 2025 08:45:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750236330; cv=none; b=MFckJI8BH2ArfXIgpNzqo4obiXZ2O7pnWUyY31Mf40eecIHu0wfDncBJsZuhBZcnShIMdP4QhgCD2ezTKs9V+6zLYnipeEAk+n1y6WbrI8eMeIwQQuTSnEMVeoLgb4+U/vcf5pMbuORm//VDl7YkE8VMotk2pwznDOCsZ8ze+Sk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750236330; c=relaxed/simple; bh=YVJN70PPzT45Ed+Rn7QD3cSXjFB9D3eO316oNojiBiM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=WsKz0vGwvG/8baB9mj8C0poX2zmhqrtxedF49mIL70Datrf05jQiecD0DwSRfAdIAkLCmdQHg891oGTBOgCJyxqVEWL7jTRrvigstHZAHJITm8JuR+rTRAk3UmOSJkXjaTy0r5slkWJc/K1rC+thW2up5mFr2U0fOSkZ4knG4ac= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8566A14BF; Wed, 18 Jun 2025 01:45:07 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D71AC3F66E; Wed, 18 Jun 2025 01:45:25 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, pcc@google.com, will@kernel.org, broonie@kernel.org, anshuman.khandual@arm.com, joey.gouly@arm.com, yury.khrustalev@arm.com, maz@kernel.org, oliver.upton@linux.dev, frederic@kernel.org, akpm@linux-foundation.org, surenb@google.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Yeoreum Yun Subject: [PATCH v9 04/10] tools/kselftest: add MTE_FAR hwcap test Date: Wed, 18 Jun 2025 09:45:07 +0100 Message-Id: <20250618084513.1761345-5-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250618084513.1761345-1-yeoreum.yun@arm.com> References: <20250618084513.1761345-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" add MTE_FAR hwcap test on kselftest. Signed-off-by: Yeoreum Yun Reviewed-by: Mark Brown --- tools/testing/selftests/arm64/abi/hwcap.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/self= tests/arm64/abi/hwcap.c index 35f521e5f41c..e60bfb798ba2 100644 --- a/tools/testing/selftests/arm64/abi/hwcap.c +++ b/tools/testing/selftests/arm64/abi/hwcap.c @@ -1098,6 +1098,12 @@ static const struct hwcap_data { .sigill_fn =3D hbc_sigill, .sigill_reliable =3D true, }, + { + .name =3D "MTE_FAR", + .at_hwcap =3D AT_HWCAP3, + .hwcap_bit =3D HWCAP3_MTE_FAR, + .cpuinfo =3D "mtefar", + }, }; =20 typedef void (*sighandler_fn)(int, siginfo_t *, void *); --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Thu Oct 9 10:02:56 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4C69C2820C7; Wed, 18 Jun 2025 08:45:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750236332; cv=none; b=g78giDvGVOGRaMLVCCufEgNZT+yj99df5aEF2dfKMPT8J5BVI227nc2frlPTUfmctx9kubySHdHfSKN1f8A1vLjWc+dNgm4UtnGO25/r8jAiPjA6l9jXtEvluOKlIl4kj10TzY3MqRvqEdIpEGxMCodJ6Lz2T+Owm8hNIj9jaCg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750236332; c=relaxed/simple; bh=2k+/Ki0NTtqVgGnbH15IcLWubCSrgd5KKXBaHhocAUg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=IiyyyMxpUxRVLl0N1+7zsSsfKJlcnA3UhAl4an3Ej/t4AOYrQuAdw9c1cib1DVocl6+2ah6UGvpXE5wWK4CpyjtSTbIY/CHClcEN2rPmm4NihGsDOMcTg+GPUpqxO8xmhxoJ4WXomxTo98iZw8QjC7a69mZZDMXBfCleuOaKo/g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1601C14BF; Wed, 18 Jun 2025 01:45:10 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 708403F66E; Wed, 18 Jun 2025 01:45:28 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, pcc@google.com, will@kernel.org, broonie@kernel.org, anshuman.khandual@arm.com, joey.gouly@arm.com, yury.khrustalev@arm.com, maz@kernel.org, oliver.upton@linux.dev, frederic@kernel.org, akpm@linux-foundation.org, surenb@google.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Yeoreum Yun Subject: [PATCH v9 05/10] kselftest/arm64/mte: register mte signal handler with SA_EXPOSE_TAGBITS Date: Wed, 18 Jun 2025 09:45:08 +0100 Message-Id: <20250618084513.1761345-6-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250618084513.1761345-1-yeoreum.yun@arm.com> References: <20250618084513.1761345-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" To test address tag[63:60] and memory tag[59:56] is preserved when memory tag fault happen, Let mte_register_signal() to register signal handler with SA_EXPOSE_TAGBITS. Signed-off-by: Yeoreum Yun Reviewed-by: Mark Brown --- tools/testing/selftests/arm64/mte/check_buffer_fill.c | 2 +- .../testing/selftests/arm64/mte/check_child_memory.c | 4 ++-- .../selftests/arm64/mte/check_hugetlb_options.c | 4 ++-- tools/testing/selftests/arm64/mte/check_ksm_options.c | 4 ++-- .../testing/selftests/arm64/mte/check_mmap_options.c | 4 ++-- .../selftests/arm64/mte/check_tags_inclusion.c | 2 +- tools/testing/selftests/arm64/mte/check_user_mem.c | 2 +- tools/testing/selftests/arm64/mte/mte_common_util.c | 11 ++++++++++- tools/testing/selftests/arm64/mte/mte_common_util.h | 3 ++- 9 files changed, 23 insertions(+), 13 deletions(-) diff --git a/tools/testing/selftests/arm64/mte/check_buffer_fill.c b/tools/= testing/selftests/arm64/mte/check_buffer_fill.c index 2ee7f114d7fa..5248b5265aa4 100644 --- a/tools/testing/selftests/arm64/mte/check_buffer_fill.c +++ b/tools/testing/selftests/arm64/mte/check_buffer_fill.c @@ -415,7 +415,7 @@ int main(int argc, char *argv[]) return err; =20 /* Register SIGSEGV handler */ - mte_register_signal(SIGSEGV, mte_default_handler); + mte_register_signal(SIGSEGV, mte_default_handler, false); =20 /* Set test plan */ ksft_set_plan(20); diff --git a/tools/testing/selftests/arm64/mte/check_child_memory.c b/tools= /testing/selftests/arm64/mte/check_child_memory.c index 7597fc632cad..b97ea3981c21 100644 --- a/tools/testing/selftests/arm64/mte/check_child_memory.c +++ b/tools/testing/selftests/arm64/mte/check_child_memory.c @@ -160,8 +160,8 @@ int main(int argc, char *argv[]) return err; =20 /* Register SIGSEGV handler */ - mte_register_signal(SIGSEGV, mte_default_handler); - mte_register_signal(SIGBUS, mte_default_handler); + mte_register_signal(SIGSEGV, mte_default_handler, false); + mte_register_signal(SIGBUS, mte_default_handler, false); =20 /* Set test plan */ ksft_set_plan(12); diff --git a/tools/testing/selftests/arm64/mte/check_hugetlb_options.c b/to= ols/testing/selftests/arm64/mte/check_hugetlb_options.c index 3bfcd3848432..4e644a606394 100644 --- a/tools/testing/selftests/arm64/mte/check_hugetlb_options.c +++ b/tools/testing/selftests/arm64/mte/check_hugetlb_options.c @@ -235,8 +235,8 @@ int main(int argc, char *argv[]) return err; =20 /* Register signal handlers */ - mte_register_signal(SIGBUS, mte_default_handler); - mte_register_signal(SIGSEGV, mte_default_handler); + mte_register_signal(SIGBUS, mte_default_handler, false); + mte_register_signal(SIGSEGV, mte_default_handler, false); =20 allocate_hugetlb(); =20 diff --git a/tools/testing/selftests/arm64/mte/check_ksm_options.c b/tools/= testing/selftests/arm64/mte/check_ksm_options.c index 88c74bc46d4f..afea4e381862 100644 --- a/tools/testing/selftests/arm64/mte/check_ksm_options.c +++ b/tools/testing/selftests/arm64/mte/check_ksm_options.c @@ -141,8 +141,8 @@ int main(int argc, char *argv[]) return KSFT_FAIL; } /* Register signal handlers */ - mte_register_signal(SIGBUS, mte_default_handler); - mte_register_signal(SIGSEGV, mte_default_handler); + mte_register_signal(SIGBUS, mte_default_handler, false); + mte_register_signal(SIGSEGV, mte_default_handler, false); =20 /* Set test plan */ ksft_set_plan(4); diff --git a/tools/testing/selftests/arm64/mte/check_mmap_options.c b/tools= /testing/selftests/arm64/mte/check_mmap_options.c index 17694caaff53..b37bf481c9f9 100644 --- a/tools/testing/selftests/arm64/mte/check_mmap_options.c +++ b/tools/testing/selftests/arm64/mte/check_mmap_options.c @@ -201,8 +201,8 @@ int main(int argc, char *argv[]) sizes[item - 1] =3D page_size + 1; =20 /* Register signal handlers */ - mte_register_signal(SIGBUS, mte_default_handler); - mte_register_signal(SIGSEGV, mte_default_handler); + mte_register_signal(SIGBUS, mte_default_handler, false); + mte_register_signal(SIGSEGV, mte_default_handler, false); =20 /* Set test plan */ ksft_set_plan(22); diff --git a/tools/testing/selftests/arm64/mte/check_tags_inclusion.c b/too= ls/testing/selftests/arm64/mte/check_tags_inclusion.c index a3d1e23fe02a..b96296ab9870 100644 --- a/tools/testing/selftests/arm64/mte/check_tags_inclusion.c +++ b/tools/testing/selftests/arm64/mte/check_tags_inclusion.c @@ -180,7 +180,7 @@ int main(int argc, char *argv[]) return err; =20 /* Register SIGSEGV handler */ - mte_register_signal(SIGSEGV, mte_default_handler); + mte_register_signal(SIGSEGV, mte_default_handler, false); =20 /* Set test plan */ ksft_set_plan(4); diff --git a/tools/testing/selftests/arm64/mte/check_user_mem.c b/tools/tes= ting/selftests/arm64/mte/check_user_mem.c index f4ae5f87a3b7..d1d14aaaba16 100644 --- a/tools/testing/selftests/arm64/mte/check_user_mem.c +++ b/tools/testing/selftests/arm64/mte/check_user_mem.c @@ -211,7 +211,7 @@ int main(int argc, char *argv[]) return err; =20 /* Register signal handlers */ - mte_register_signal(SIGSEGV, mte_default_handler); + mte_register_signal(SIGSEGV, mte_default_handler, false); =20 /* Set test plan */ ksft_set_plan(64); diff --git a/tools/testing/selftests/arm64/mte/mte_common_util.c b/tools/te= sting/selftests/arm64/mte/mte_common_util.c index a1dc2fe5285b..83240b980f9c 100644 --- a/tools/testing/selftests/arm64/mte/mte_common_util.c +++ b/tools/testing/selftests/arm64/mte/mte_common_util.c @@ -19,6 +19,10 @@ #include "mte_common_util.h" #include "mte_def.h" =20 +#ifndef SA_EXPOSE_TAGBITS +#define SA_EXPOSE_TAGBITS 0x00000800 +#endif + #define INIT_BUFFER_SIZE 256 =20 struct mte_fault_cxt cur_mte_cxt; @@ -79,12 +83,17 @@ void mte_default_handler(int signum, siginfo_t *si, voi= d *uc) } } =20 -void mte_register_signal(int signal, void (*handler)(int, siginfo_t *, voi= d *)) +void mte_register_signal(int signal, void (*handler)(int, siginfo_t *, voi= d *), + bool export_tags) { struct sigaction sa; =20 sa.sa_sigaction =3D handler; sa.sa_flags =3D SA_SIGINFO; + + if (export_tags && signal =3D=3D SIGSEGV) + sa.sa_flags |=3D SA_EXPOSE_TAGBITS; + sigemptyset(&sa.sa_mask); sigaction(signal, &sa, NULL); } diff --git a/tools/testing/selftests/arm64/mte/mte_common_util.h b/tools/te= sting/selftests/arm64/mte/mte_common_util.h index a0017a303beb..6b109e84fa39 100644 --- a/tools/testing/selftests/arm64/mte/mte_common_util.h +++ b/tools/testing/selftests/arm64/mte/mte_common_util.h @@ -40,7 +40,8 @@ extern struct mte_fault_cxt cur_mte_cxt; =20 /* MTE utility functions */ void mte_default_handler(int signum, siginfo_t *si, void *uc); -void mte_register_signal(int signal, void (*handler)(int, siginfo_t *, voi= d *)); +void mte_register_signal(int signal, void (*handler)(int, siginfo_t *, voi= d *), + bool export_tags); void mte_wait_after_trig(void); void *mte_allocate_memory(size_t size, int mem_type, int mapping, bool tag= s); void *mte_allocate_memory_tag_range(size_t size, int mem_type, int mapping, --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Thu Oct 9 10:02:56 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DD58027FD42; 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dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9A8A214BF; Wed, 18 Jun 2025 01:45:12 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 00EF13F66E; Wed, 18 Jun 2025 01:45:30 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, pcc@google.com, will@kernel.org, broonie@kernel.org, anshuman.khandual@arm.com, joey.gouly@arm.com, yury.khrustalev@arm.com, maz@kernel.org, oliver.upton@linux.dev, frederic@kernel.org, akpm@linux-foundation.org, surenb@google.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Yeoreum Yun Subject: [PATCH v9 06/10] kselftest/arm64/mte: check MTE_FAR feature is supported Date: Wed, 18 Jun 2025 09:45:09 +0100 Message-Id: <20250618084513.1761345-7-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250618084513.1761345-1-yeoreum.yun@arm.com> References: <20250618084513.1761345-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" To run the MTE_FAR test when cpu supports MTE_FAR feature, check the MTE_FAR feature is supported in mte test. Signed-off-by: Yeoreum Yun Reviewed-by: Mark Brown --- tools/testing/selftests/arm64/mte/mte_common_util.c | 4 ++++ tools/testing/selftests/arm64/mte/mte_common_util.h | 1 + 2 files changed, 5 insertions(+) diff --git a/tools/testing/selftests/arm64/mte/mte_common_util.c b/tools/te= sting/selftests/arm64/mte/mte_common_util.c index 83240b980f9c..5c5680a87498 100644 --- a/tools/testing/selftests/arm64/mte/mte_common_util.c +++ b/tools/testing/selftests/arm64/mte/mte_common_util.c @@ -26,6 +26,7 @@ #define INIT_BUFFER_SIZE 256 =20 struct mte_fault_cxt cur_mte_cxt; +bool mtefar_support; static unsigned int mte_cur_mode; static unsigned int mte_cur_pstate_tco; =20 @@ -325,12 +326,15 @@ int mte_switch_mode(int mte_option, unsigned long inc= l_mask) int mte_default_setup(void) { unsigned long hwcaps2 =3D getauxval(AT_HWCAP2); + unsigned long hwcaps3 =3D getauxval(AT_HWCAP3); unsigned long en =3D 0; int ret; =20 if (!(hwcaps2 & HWCAP2_MTE)) ksft_exit_skip("MTE features unavailable\n"); =20 + mtefar_support =3D !!(hwcaps3 & HWCAP3_MTE_FAR); + /* Get current mte mode */ ret =3D prctl(PR_GET_TAGGED_ADDR_CTRL, en, 0, 0, 0); if (ret < 0) { diff --git a/tools/testing/selftests/arm64/mte/mte_common_util.h b/tools/te= sting/selftests/arm64/mte/mte_common_util.h index 6b109e84fa39..4e1dd959df9b 100644 --- a/tools/testing/selftests/arm64/mte/mte_common_util.h +++ b/tools/testing/selftests/arm64/mte/mte_common_util.h @@ -37,6 +37,7 @@ struct mte_fault_cxt { }; =20 extern struct mte_fault_cxt cur_mte_cxt; +extern bool mtefar_support; =20 /* MTE utility functions */ void mte_default_handler(int signum, siginfo_t *si, void *uc); --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Thu Oct 9 10:02:56 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7E53227F004; Wed, 18 Jun 2025 08:45:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750236339; cv=none; b=CXuZCq8rHBRL6DK6zYe9KvutztaNLCH2KrmfOazVO9ZWzn6EuHSGmMx897l0gsxWli0R9XzuxdgmyYLw005EuR8F+yHd3lDISvarxHw3warVz/h0I6QC39tI+8CKuwq3O2uVuqwOzXAMEPLK/k6HlrHpnk7C3G2PKht6d3FfK4I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750236339; c=relaxed/simple; bh=/scxFsdOhOWauDCYQ6qQPC249bPouqja97HS52+FhHc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=dSUNsAUtHyn8iPE7SsSeeBxsVwBzLnRHZsH2ZGYUoUSVY9duvlMeziz1kHbQgrKSBpCM+B6+UCEE6leLT9yOrs70FwtPKLeUhJIYgKaASThkSi2tywBTjTEMFIxP6OVABRMmfECm2hjdCxYyF5OkcHYQfDqmk9aeg31rkNarNVs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2A85514BF; Wed, 18 Jun 2025 01:45:15 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 857E03F66E; Wed, 18 Jun 2025 01:45:33 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, pcc@google.com, will@kernel.org, broonie@kernel.org, anshuman.khandual@arm.com, joey.gouly@arm.com, yury.khrustalev@arm.com, maz@kernel.org, oliver.upton@linux.dev, frederic@kernel.org, akpm@linux-foundation.org, surenb@google.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Yeoreum Yun Subject: [PATCH v9 07/10] kselftest/arm64/mte: add address tag related macro and function Date: Wed, 18 Jun 2025 09:45:10 +0100 Message-Id: <20250618084513.1761345-8-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250618084513.1761345-1-yeoreum.yun@arm.com> References: <20250618084513.1761345-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add address tag related macro and function to test MTE_FAR feature. Signed-off-by: Yeoreum Yun Reviewed-by: Mark Brown --- .../selftests/arm64/mte/mte_common_util.c | 17 +++++++++++++++++ .../selftests/arm64/mte/mte_common_util.h | 2 ++ tools/testing/selftests/arm64/mte/mte_def.h | 8 ++++++++ 3 files changed, 27 insertions(+) diff --git a/tools/testing/selftests/arm64/mte/mte_common_util.c b/tools/te= sting/selftests/arm64/mte/mte_common_util.c index 5c5680a87498..d9702a542cb6 100644 --- a/tools/testing/selftests/arm64/mte/mte_common_util.c +++ b/tools/testing/selftests/arm64/mte/mte_common_util.c @@ -6,6 +6,7 @@ #include #include #include +#include #include =20 #include @@ -130,6 +131,19 @@ void mte_clear_tags(void *ptr, size_t size) mte_clear_tag_address_range(ptr, size); } =20 +void *mte_insert_atag(void *ptr) +{ + unsigned char atag; + + atag =3D mtefar_support ? (random() % MT_ATAG_MASK) + 1 : 0; + return (void *)MT_SET_ATAG((unsigned long)ptr, atag); +} + +void *mte_clear_atag(void *ptr) +{ + return (void *)MT_CLEAR_ATAG((unsigned long)ptr); +} + static void *__mte_allocate_memory_range(size_t size, int mem_type, int ma= pping, size_t range_before, size_t range_after, bool tags, int fd) @@ -330,6 +344,9 @@ int mte_default_setup(void) unsigned long en =3D 0; int ret; =20 + /* To generate random address tag */ + srandom(time(NULL)); + if (!(hwcaps2 & HWCAP2_MTE)) ksft_exit_skip("MTE features unavailable\n"); =20 diff --git a/tools/testing/selftests/arm64/mte/mte_common_util.h b/tools/te= sting/selftests/arm64/mte/mte_common_util.h index 4e1dd959df9b..045e4ad2f018 100644 --- a/tools/testing/selftests/arm64/mte/mte_common_util.h +++ b/tools/testing/selftests/arm64/mte/mte_common_util.h @@ -56,6 +56,8 @@ void mte_free_memory_tag_range(void *ptr, size_t size, in= t mem_type, size_t range_before, size_t range_after); void *mte_insert_tags(void *ptr, size_t size); void mte_clear_tags(void *ptr, size_t size); +void *mte_insert_atag(void *ptr); +void *mte_clear_atag(void *ptr); int mte_default_setup(void); void mte_restore_setup(void); int mte_switch_mode(int mte_option, unsigned long incl_mask); diff --git a/tools/testing/selftests/arm64/mte/mte_def.h b/tools/testing/se= lftests/arm64/mte/mte_def.h index 9b188254b61a..6ad22f07c9b8 100644 --- a/tools/testing/selftests/arm64/mte/mte_def.h +++ b/tools/testing/selftests/arm64/mte/mte_def.h @@ -42,6 +42,8 @@ #define MT_TAG_COUNT 16 #define MT_INCLUDE_TAG_MASK 0xFFFF #define MT_EXCLUDE_TAG_MASK 0x0 +#define MT_ATAG_SHIFT 60 +#define MT_ATAG_MASK 0xFUL =20 #define MT_ALIGN_GRANULE (MT_GRANULE_SIZE - 1) #define MT_CLEAR_TAG(x) ((x) & ~(MT_TAG_MASK << MT_TAG_SHIFT)) @@ -49,6 +51,12 @@ #define MT_FETCH_TAG(x) ((x >> MT_TAG_SHIFT) & (MT_TAG_MASK)) #define MT_ALIGN_UP(x) ((x + MT_ALIGN_GRANULE) & ~(MT_ALIGN_GRANULE)) =20 +#define MT_CLEAR_ATAG(x) ((x) & ~(MT_TAG_MASK << MT_ATAG_SHIFT)) +#define MT_SET_ATAG(x, y) ((x) | (((y) & MT_ATAG_MASK) << MT_ATAG_SHIFT)) +#define MT_FETCH_ATAG(x) ((x >> MT_ATAG_SHIFT) & (MT_ATAG_MASK)) + +#define MT_CLEAR_TAGS(x) (MT_CLEAR_ATAG(MT_CLEAR_TAG(x))) + #define MT_PSTATE_TCO_SHIFT 25 #define MT_PSTATE_TCO_MASK ~(0x1 << MT_PSTATE_TCO_SHIFT) #define MT_PSTATE_TCO_EN 1 --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Thu Oct 9 10:02:56 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B058527FD4E; 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dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AE0331BC0; Wed, 18 Jun 2025 01:45:17 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 157823F66E; Wed, 18 Jun 2025 01:45:35 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, pcc@google.com, will@kernel.org, broonie@kernel.org, anshuman.khandual@arm.com, joey.gouly@arm.com, yury.khrustalev@arm.com, maz@kernel.org, oliver.upton@linux.dev, frederic@kernel.org, akpm@linux-foundation.org, surenb@google.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Yeoreum Yun Subject: [PATCH v9 08/10] kselftest/arm64/mte: add verification for address tag in signal handler Date: Wed, 18 Jun 2025 09:45:11 +0100 Message-Id: <20250618084513.1761345-9-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250618084513.1761345-1-yeoreum.yun@arm.com> References: <20250618084513.1761345-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the address tag [63:60] verification when synchronous mte fault is happ= en. when signal handler is registered with SA_EXPOSE_TAGBITS, address includes not only memory tag [59:56] but also address tag. Therefore, when verify fault address location, remove both tags Signed-off-by: Yeoreum Yun Reviewed-by: Mark Brown --- .../selftests/arm64/mte/mte_common_util.c | 38 ++++++++++++++----- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/tools/testing/selftests/arm64/mte/mte_common_util.c b/tools/te= sting/selftests/arm64/mte/mte_common_util.c index d9702a542cb6..10dcbc37e379 100644 --- a/tools/testing/selftests/arm64/mte/mte_common_util.c +++ b/tools/testing/selftests/arm64/mte/mte_common_util.c @@ -33,12 +33,25 @@ static unsigned int mte_cur_pstate_tco; =20 void mte_default_handler(int signum, siginfo_t *si, void *uc) { + struct sigaction sa; unsigned long addr =3D (unsigned long)si->si_addr; + unsigned char si_tag, si_atag; + + sigaction(signum, NULL, &sa); + + if (sa.sa_flags & SA_EXPOSE_TAGBITS) { + si_tag =3D MT_FETCH_TAG(addr); + si_atag =3D MT_FETCH_ATAG(addr); + addr =3D MT_CLEAR_TAGS(addr); + } else { + si_tag =3D 0; + si_atag =3D 0; + } =20 if (signum =3D=3D SIGSEGV) { #ifdef DEBUG - ksft_print_msg("INFO: SIGSEGV signal at pc=3D%lx, fault addr=3D%lx, si_c= ode=3D%lx\n", - ((ucontext_t *)uc)->uc_mcontext.pc, addr, si->si_code); + ksft_print_msg("INFO: SIGSEGV signal at pc=3D%lx, fault addr=3D%lx, si_c= ode=3D%lx, si_tag=3D%x, si_atag=3D%x\n", + ((ucontext_t *)uc)->uc_mcontext.pc, addr, si->si_code, si_tag, si_atag= ); #endif if (si->si_code =3D=3D SEGV_MTEAERR) { if (cur_mte_cxt.trig_si_code =3D=3D si->si_code) @@ -51,13 +64,18 @@ void mte_default_handler(int signum, siginfo_t *si, voi= d *uc) } /* Compare the context for precise error */ else if (si->si_code =3D=3D SEGV_MTESERR) { + if ((!mtefar_support && si_atag) || (si_atag !=3D MT_FETCH_ATAG(cur_mte= _cxt.trig_addr))) { + ksft_print_msg("Invalid MTE synchronous exception caught for address t= ag! si_tag=3D%x, si_atag: %x\n", si_tag, si_atag); + exit(KSFT_FAIL); + } + if (cur_mte_cxt.trig_si_code =3D=3D si->si_code && ((cur_mte_cxt.trig_range >=3D 0 && - addr >=3D MT_CLEAR_TAG(cur_mte_cxt.trig_addr) && - addr <=3D (MT_CLEAR_TAG(cur_mte_cxt.trig_addr) + cur_mte_cxt.trig= _range)) || + addr >=3D MT_CLEAR_TAGS(cur_mte_cxt.trig_addr) && + addr <=3D (MT_CLEAR_TAGS(cur_mte_cxt.trig_addr) + cur_mte_cxt.tri= g_range)) || (cur_mte_cxt.trig_range < 0 && - addr <=3D MT_CLEAR_TAG(cur_mte_cxt.trig_addr) && - addr >=3D (MT_CLEAR_TAG(cur_mte_cxt.trig_addr) + cur_mte_cxt.trig= _range)))) { + addr <=3D MT_CLEAR_TAGS(cur_mte_cxt.trig_addr) && + addr >=3D (MT_CLEAR_TAGS(cur_mte_cxt.trig_addr) + cur_mte_cxt.tri= g_range)))) { cur_mte_cxt.fault_valid =3D true; /* Adjust the pc by 4 */ ((ucontext_t *)uc)->uc_mcontext.pc +=3D 4; @@ -73,11 +91,11 @@ void mte_default_handler(int signum, siginfo_t *si, voi= d *uc) ksft_print_msg("INFO: SIGBUS signal at pc=3D%llx, fault addr=3D%lx, si_c= ode=3D%x\n", ((ucontext_t *)uc)->uc_mcontext.pc, addr, si->si_code); if ((cur_mte_cxt.trig_range >=3D 0 && - addr >=3D MT_CLEAR_TAG(cur_mte_cxt.trig_addr) && - addr <=3D (MT_CLEAR_TAG(cur_mte_cxt.trig_addr) + cur_mte_cxt.trig_r= ange)) || + addr >=3D MT_CLEAR_TAGS(cur_mte_cxt.trig_addr) && + addr <=3D (MT_CLEAR_TAGS(cur_mte_cxt.trig_addr) + cur_mte_cxt.trig_= range)) || (cur_mte_cxt.trig_range < 0 && - addr <=3D MT_CLEAR_TAG(cur_mte_cxt.trig_addr) && - addr >=3D (MT_CLEAR_TAG(cur_mte_cxt.trig_addr) + cur_mte_cxt.trig_r= ange))) { + addr <=3D MT_CLEAR_TAGS(cur_mte_cxt.trig_addr) && + addr >=3D (MT_CLEAR_TAGS(cur_mte_cxt.trig_addr) + cur_mte_cxt.trig_= range))) { cur_mte_cxt.fault_valid =3D true; /* Adjust the pc by 4 */ ((ucontext_t *)uc)->uc_mcontext.pc +=3D 4; --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Thu Oct 9 10:02:56 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7E42127FD4E; Wed, 18 Jun 2025 08:45:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750236344; cv=none; b=LPldoXDTEWgDWANXisPSKL66jMyivgOluhNguVpRHkAPc8ZTOKo8FDWMCA7Ur9Gp3iTE7pmBt+3GhmejuFmqCf8/OujnL6VhcLidhJ0V3SMy1ekzCRASoS7I+qURqi8uA9AEsdlwi7sR0Q6ikhrA+zCWC8COcAhgbYaFjTSpOUU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750236344; c=relaxed/simple; bh=3yYopPMzbPPAcQb5u88F/DY3HGR4llaLo3SO0HxtaZs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=qjXsDL5SC3lbHF4Mv5vp7plzqkPkmhnlkPbE3iOC2XEznnsUnZTXUkt/QK7osKa5t9h9MODoqZo1CCaOUFxtX6tigjNN8AoVE+kOf6yWqajIQW/QMq3x5JOjseYEfc4Qg57bKDscQp6g/X5jIszAwhvWZ1vrzYIHusixAUkENfw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3E63B14BF; Wed, 18 Jun 2025 01:45:20 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 9983F3F66E; Wed, 18 Jun 2025 01:45:38 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, pcc@google.com, will@kernel.org, broonie@kernel.org, anshuman.khandual@arm.com, joey.gouly@arm.com, yury.khrustalev@arm.com, maz@kernel.org, oliver.upton@linux.dev, frederic@kernel.org, akpm@linux-foundation.org, surenb@google.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Yeoreum Yun Subject: [PATCH v9 09/10] kselftest/arm64/mte: refactor check_mmap_option test Date: Wed, 18 Jun 2025 09:45:12 +0100 Message-Id: <20250618084513.1761345-10-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250618084513.1761345-1-yeoreum.yun@arm.com> References: <20250618084513.1761345-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Before add mtefar testcase on check_mmap_option.c, refactor check_mmap_option: - make testcase suite array with test options (mem_type, mte_sync type an= d etc) to use general testcase pattern - generate each test case name acoording to test options. Signed-off-by: Yeoreum Yun Reviewed-by: Mark Brown --- .../selftests/arm64/mte/check_mmap_options.c | 367 +++++++++++++++--- 1 file changed, 313 insertions(+), 54 deletions(-) diff --git a/tools/testing/selftests/arm64/mte/check_mmap_options.c b/tools= /testing/selftests/arm64/mte/check_mmap_options.c index b37bf481c9f9..0df7ce532465 100644 --- a/tools/testing/selftests/arm64/mte/check_mmap_options.c +++ b/tools/testing/selftests/arm64/mte/check_mmap_options.c @@ -3,6 +3,7 @@ =20 #define _GNU_SOURCE =20 +#include #include #include #include @@ -24,6 +25,23 @@ #define TAG_CHECK_ON 0 #define TAG_CHECK_OFF 1 =20 +#define TEST_NAME_MAX 256 + +enum mte_mem_check_type { + CHECK_ANON_MEM =3D 0, + CHECK_FILE_MEM =3D 1, + CHECK_CLEAR_PROT_MTE =3D 2, +}; + +struct check_mmap_testcase { + int check_type; + int mem_type; + int mte_sync; + int mapping; + int tag_check; + bool enable_tco; +}; + static size_t page_size; static int sizes[] =3D { 1, 537, 989, 1269, MT_GRANULE_SIZE - 1, MT_GRANULE_SIZE, @@ -183,10 +201,271 @@ static int check_clear_prot_mte_flag(int mem_type, i= nt mode, int mapping) return KSFT_PASS; } =20 +const char *format_test_name(struct check_mmap_testcase *tc) +{ + static char test_name[TEST_NAME_MAX]; + const char *check_type_str; + const char *mem_type_str; + const char *sync_str; + const char *mapping_str; + const char *tag_check_str; + + switch (tc->check_type) { + case CHECK_ANON_MEM: + check_type_str =3D "anonymous memory"; + break; + case CHECK_FILE_MEM: + check_type_str =3D "file memory"; + break; + case CHECK_CLEAR_PROT_MTE: + check_type_str =3D "clear PROT_MTE flags"; + break; + default: + assert(0); + break; + } + + switch (tc->mem_type) { + case USE_MMAP: + mem_type_str =3D "mmap"; + break; + case USE_MPROTECT: + mem_type_str =3D "mmap/mprotect"; + break; + default: + assert(0); + break; + } + + switch (tc->mte_sync) { + case MTE_NONE_ERR: + sync_str =3D "no error"; + break; + case MTE_SYNC_ERR: + sync_str =3D "sync error"; + break; + case MTE_ASYNC_ERR: + sync_str =3D "async error"; + break; + default: + assert(0); + break; + } + + switch (tc->mapping) { + case MAP_SHARED: + mapping_str =3D "shared"; + break; + case MAP_PRIVATE: + mapping_str =3D "private"; + break; + default: + assert(0); + break; + } + + switch (tc->tag_check) { + case TAG_CHECK_ON: + tag_check_str =3D "tag check on"; + break; + case TAG_CHECK_OFF: + tag_check_str =3D "tag check off"; + break; + default: + assert(0); + break; + } + + snprintf(test_name, sizeof(test_name), + "Check %s with %s mapping, %s mode, %s memory and %s\n", + check_type_str, mapping_str, sync_str, mem_type_str, + tag_check_str); + + return test_name; +} + int main(int argc, char *argv[]) { - int err; + int err, i; int item =3D ARRAY_SIZE(sizes); + struct check_mmap_testcase test_cases[]=3D { + { + .check_type =3D CHECK_ANON_MEM, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_OFF, + .enable_tco =3D true, + }, + { + .check_type =3D CHECK_FILE_MEM, + .mem_type =3D USE_MPROTECT, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_OFF, + .enable_tco =3D true, + }, + { + .check_type =3D CHECK_ANON_MEM, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_NONE_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_OFF, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_FILE_MEM, + .mem_type =3D USE_MPROTECT, + .mte_sync =3D MTE_NONE_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_OFF, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_ANON_MEM, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_ANON_MEM, + .mem_type =3D USE_MPROTECT, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_ANON_MEM, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_SHARED, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_ANON_MEM, + .mem_type =3D USE_MPROTECT, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_SHARED, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_ANON_MEM, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_ASYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_ANON_MEM, + .mem_type =3D USE_MPROTECT, + .mte_sync =3D MTE_ASYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_ANON_MEM, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_ASYNC_ERR, + .mapping =3D MAP_SHARED, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_ANON_MEM, + .mem_type =3D USE_MPROTECT, + .mte_sync =3D MTE_ASYNC_ERR, + .mapping =3D MAP_SHARED, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_FILE_MEM, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_FILE_MEM, + .mem_type =3D USE_MPROTECT, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_FILE_MEM, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_SHARED, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_FILE_MEM, + .mem_type =3D USE_MPROTECT, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_SHARED, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_FILE_MEM, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_ASYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_FILE_MEM, + .mem_type =3D USE_MPROTECT, + .mte_sync =3D MTE_ASYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_FILE_MEM, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_ASYNC_ERR, + .mapping =3D MAP_SHARED, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_FILE_MEM, + .mem_type =3D USE_MPROTECT, + .mte_sync =3D MTE_ASYNC_ERR, + .mapping =3D MAP_SHARED, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_CLEAR_PROT_MTE, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_CLEAR_PROT_MTE, + .mem_type =3D USE_MPROTECT, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .enable_tco =3D false, + }, + }; =20 err =3D mte_default_setup(); if (err) @@ -205,59 +484,39 @@ int main(int argc, char *argv[]) mte_register_signal(SIGSEGV, mte_default_handler, false); =20 /* Set test plan */ - ksft_set_plan(22); - - mte_enable_pstate_tco(); - - evaluate_test(check_anonymous_memory_mapping(USE_MMAP, MTE_SYNC_ERR, MAP_= PRIVATE, TAG_CHECK_OFF), - "Check anonymous memory with private mapping, sync error mode, mmap memor= y and tag check off\n"); - evaluate_test(check_file_memory_mapping(USE_MPROTECT, MTE_SYNC_ERR, MAP_P= RIVATE, TAG_CHECK_OFF), - "Check file memory with private mapping, sync error mode, mmap/mprotect m= emory and tag check off\n"); - - mte_disable_pstate_tco(); - evaluate_test(check_anonymous_memory_mapping(USE_MMAP, MTE_NONE_ERR, MAP_= PRIVATE, TAG_CHECK_OFF), - "Check anonymous memory with private mapping, no error mode, mmap memory = and tag check off\n"); - evaluate_test(check_file_memory_mapping(USE_MPROTECT, MTE_NONE_ERR, MAP_P= RIVATE, TAG_CHECK_OFF), - "Check file memory with private mapping, no error mode, mmap/mprotect mem= ory and tag check off\n"); - - evaluate_test(check_anonymous_memory_mapping(USE_MMAP, MTE_SYNC_ERR, MAP_= PRIVATE, TAG_CHECK_ON), - "Check anonymous memory with private mapping, sync error mode, mmap memor= y and tag check on\n"); - evaluate_test(check_anonymous_memory_mapping(USE_MPROTECT, MTE_SYNC_ERR, = MAP_PRIVATE, TAG_CHECK_ON), - "Check anonymous memory with private mapping, sync error mode, mmap/mprot= ect memory and tag check on\n"); - evaluate_test(check_anonymous_memory_mapping(USE_MMAP, MTE_SYNC_ERR, MAP_= SHARED, TAG_CHECK_ON), - "Check anonymous memory with shared mapping, sync error mode, mmap memory= and tag check on\n"); - evaluate_test(check_anonymous_memory_mapping(USE_MPROTECT, MTE_SYNC_ERR, = MAP_SHARED, TAG_CHECK_ON), - "Check anonymous memory with shared mapping, sync error mode, mmap/mprote= ct memory and tag check on\n"); - evaluate_test(check_anonymous_memory_mapping(USE_MMAP, MTE_ASYNC_ERR, MAP= _PRIVATE, TAG_CHECK_ON), - "Check anonymous memory with private mapping, async error mode, mmap memo= ry and tag check on\n"); - evaluate_test(check_anonymous_memory_mapping(USE_MPROTECT, MTE_ASYNC_ERR,= MAP_PRIVATE, TAG_CHECK_ON), - "Check anonymous memory with private mapping, async error mode, mmap/mpro= tect memory and tag check on\n"); - evaluate_test(check_anonymous_memory_mapping(USE_MMAP, MTE_ASYNC_ERR, MAP= _SHARED, TAG_CHECK_ON), - "Check anonymous memory with shared mapping, async error mode, mmap memor= y and tag check on\n"); - evaluate_test(check_anonymous_memory_mapping(USE_MPROTECT, MTE_ASYNC_ERR,= MAP_SHARED, TAG_CHECK_ON), - "Check anonymous memory with shared mapping, async error mode, mmap/mprot= ect memory and tag check on\n"); - - evaluate_test(check_file_memory_mapping(USE_MMAP, MTE_SYNC_ERR, MAP_PRIVA= TE, TAG_CHECK_ON), - "Check file memory with private mapping, sync error mode, mmap memory and= tag check on\n"); - evaluate_test(check_file_memory_mapping(USE_MPROTECT, MTE_SYNC_ERR, MAP_P= RIVATE, TAG_CHECK_ON), - "Check file memory with private mapping, sync error mode, mmap/mprotect m= emory and tag check on\n"); - evaluate_test(check_file_memory_mapping(USE_MMAP, MTE_SYNC_ERR, MAP_SHARE= D, TAG_CHECK_ON), - "Check file memory with shared mapping, sync error mode, mmap memory and = tag check on\n"); - evaluate_test(check_file_memory_mapping(USE_MPROTECT, MTE_SYNC_ERR, MAP_S= HARED, TAG_CHECK_ON), - "Check file memory with shared mapping, sync error mode, mmap/mprotect me= mory and tag check on\n"); - evaluate_test(check_file_memory_mapping(USE_MMAP, MTE_ASYNC_ERR, MAP_PRIV= ATE, TAG_CHECK_ON), - "Check file memory with private mapping, async error mode, mmap memory an= d tag check on\n"); - evaluate_test(check_file_memory_mapping(USE_MPROTECT, MTE_ASYNC_ERR, MAP_= PRIVATE, TAG_CHECK_ON), - "Check file memory with private mapping, async error mode, mmap/mprotect = memory and tag check on\n"); - evaluate_test(check_file_memory_mapping(USE_MMAP, MTE_ASYNC_ERR, MAP_SHAR= ED, TAG_CHECK_ON), - "Check file memory with shared mapping, async error mode, mmap memory and= tag check on\n"); - evaluate_test(check_file_memory_mapping(USE_MPROTECT, MTE_ASYNC_ERR, MAP_= SHARED, TAG_CHECK_ON), - "Check file memory with shared mapping, async error mode, mmap/mprotect m= emory and tag check on\n"); - - evaluate_test(check_clear_prot_mte_flag(USE_MMAP, MTE_SYNC_ERR, MAP_PRIVA= TE), - "Check clear PROT_MTE flags with private mapping, sync error mode and mma= p memory\n"); - evaluate_test(check_clear_prot_mte_flag(USE_MPROTECT, MTE_SYNC_ERR, MAP_P= RIVATE), - "Check clear PROT_MTE flags with private mapping and sync error mode and = mmap/mprotect memory\n"); + ksft_set_plan(ARRAY_SIZE(test_cases)); + + for (i =3D 0 ; i < ARRAY_SIZE(test_cases); i++) { + if (test_cases[i].enable_tco) + mte_enable_pstate_tco(); + else + mte_disable_pstate_tco(); + + switch (test_cases[i].check_type) { + case CHECK_ANON_MEM: + evaluate_test(check_anonymous_memory_mapping(test_cases[i].mem_type, + test_cases[i].mte_sync, + test_cases[i].mapping, + test_cases[i].tag_check), + format_test_name(&test_cases[i])); + break; + case CHECK_FILE_MEM: + evaluate_test(check_file_memory_mapping(test_cases[i].mem_type, + test_cases[i].mte_sync, + test_cases[i].mapping, + test_cases[i].tag_check), + format_test_name(&test_cases[i])); + break; + case CHECK_CLEAR_PROT_MTE: + evaluate_test(check_clear_prot_mte_flag(test_cases[i].mem_type, + test_cases[i].mte_sync, + test_cases[i].mapping), + format_test_name(&test_cases[i])); + break; + default: + exit(KSFT_FAIL); + } + } =20 mte_restore_setup(); ksft_print_cnts(); --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7} From nobody Thu Oct 9 10:02:56 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 21C3D28002B; Wed, 18 Jun 2025 08:45:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750236347; cv=none; b=i9NKknMwXa6BZYuzKDxw7WOgCa7g7icTIi65WysIBAcGH7CmeVscoo6/9ke7oxkuTjWwcqoYjzKG+NWAS1JAlsuG7NLJbvGSwClB7uGzxDdd4DgwTI+6YlN5n3NqDfdepJrIQ40vYd0fvL9oiNkbphfZzaFwZt2wVaxSG6e0nvI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750236347; c=relaxed/simple; bh=7V4oiCEkS9aJ3ve68tq2ieHdW9fB8X9omuEAGqdBhZc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=aqjC4JWmhfnvLLyBKTEXbak9B0RAOPNyilnMNciDv8yIzsVkKpXErJowGyCIfFwAbwrjbWvySG086W7+c1YSbM1TKzSXNAGVjnldoqE41xPuNpSrRiz4z6EcDM5OguWuXSGuj2ERmOdehC+uMaH4YlVTEuhZ5B01Xjdodoev+EY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C2ABB1BC0; Wed, 18 Jun 2025 01:45:22 -0700 (PDT) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2985F3F66E; Wed, 18 Jun 2025 01:45:41 -0700 (PDT) From: Yeoreum Yun To: catalin.marinas@arm.com, pcc@google.com, will@kernel.org, broonie@kernel.org, anshuman.khandual@arm.com, joey.gouly@arm.com, yury.khrustalev@arm.com, maz@kernel.org, oliver.upton@linux.dev, frederic@kernel.org, akpm@linux-foundation.org, surenb@google.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Yeoreum Yun Subject: [PATCH v9 10/10] kselftest/arm64/mte: add mtefar tests on check_mmap_options Date: Wed, 18 Jun 2025 09:45:13 +0100 Message-Id: <20250618084513.1761345-11-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250618084513.1761345-1-yeoreum.yun@arm.com> References: <20250618084513.1761345-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" If FEAT_MTE_TAGGED_FAR (Armv8.9) is supported, bits 63:60 of the fault addr= ess are preserved in response to synchronous tag check faults (SEGV_MTESERR). This patch adds new test cases using address tags (bits 63:60), corresponding to each existing test in check_mmap_option. Signed-off-by: Yeoreum Yun Reviewed-by: Mark Brown --- .../selftests/arm64/mte/check_mmap_options.c | 194 +++++++++++++++--- 1 file changed, 171 insertions(+), 23 deletions(-) diff --git a/tools/testing/selftests/arm64/mte/check_mmap_options.c b/tools= /testing/selftests/arm64/mte/check_mmap_options.c index 0df7ce532465..91a81b4a9bfa 100644 --- a/tools/testing/selftests/arm64/mte/check_mmap_options.c +++ b/tools/testing/selftests/arm64/mte/check_mmap_options.c @@ -24,6 +24,8 @@ #define OVERFLOW MT_GRANULE_SIZE #define TAG_CHECK_ON 0 #define TAG_CHECK_OFF 1 +#define ATAG_CHECK_ON 1 +#define ATAG_CHECK_OFF 0 =20 #define TEST_NAME_MAX 256 =20 @@ -39,6 +41,7 @@ struct check_mmap_testcase { int mte_sync; int mapping; int tag_check; + int atag_check; bool enable_tco; }; =20 @@ -48,8 +51,14 @@ static int sizes[] =3D { /* page size - 1*/ 0, /* page_size */ 0, /* page size + 1 */ 0 }; =20 -static int check_mte_memory(char *ptr, int size, int mode, int tag_check) +static int check_mte_memory(char *ptr, int size, int mode, int tag_check, = int atag_check) { + if (!mtefar_support && atag_check =3D=3D ATAG_CHECK_ON) + return KSFT_SKIP; + + if (atag_check =3D=3D ATAG_CHECK_ON) + ptr =3D mte_insert_atag(ptr); + mte_initialize_current_context(mode, (uintptr_t)ptr, size); memset(ptr, '1', size); mte_wait_after_trig(); @@ -75,7 +84,7 @@ static int check_mte_memory(char *ptr, int size, int mode= , int tag_check) return KSFT_PASS; } =20 -static int check_anonymous_memory_mapping(int mem_type, int mode, int mapp= ing, int tag_check) +static int check_anonymous_memory_mapping(int mem_type, int mode, int mapp= ing, int tag_check, int atag_check) { char *ptr, *map_ptr; int run, result, map_size; @@ -97,16 +106,16 @@ static int check_anonymous_memory_mapping(int mem_type= , int mode, int mapping, i munmap((void *)map_ptr, map_size); return KSFT_FAIL; } - result =3D check_mte_memory(ptr, sizes[run], mode, tag_check); + result =3D check_mte_memory(ptr, sizes[run], mode, tag_check, atag_check= ); mte_clear_tags((void *)ptr, sizes[run]); mte_free_memory((void *)map_ptr, map_size, mem_type, false); - if (result =3D=3D KSFT_FAIL) - return KSFT_FAIL; + if (result !=3D KSFT_PASS) + return result; } return KSFT_PASS; } =20 -static int check_file_memory_mapping(int mem_type, int mode, int mapping, = int tag_check) +static int check_file_memory_mapping(int mem_type, int mode, int mapping, = int tag_check, int atag_check) { char *ptr, *map_ptr; int run, fd, map_size; @@ -135,17 +144,17 @@ static int check_file_memory_mapping(int mem_type, in= t mode, int mapping, int ta close(fd); return KSFT_FAIL; } - result =3D check_mte_memory(ptr, sizes[run], mode, tag_check); + result =3D check_mte_memory(ptr, sizes[run], mode, tag_check, atag_check= ); mte_clear_tags((void *)ptr, sizes[run]); munmap((void *)map_ptr, map_size); close(fd); - if (result =3D=3D KSFT_FAIL) - break; + if (result !=3D KSFT_PASS) + return result; } - return result; + return KSFT_PASS; } =20 -static int check_clear_prot_mte_flag(int mem_type, int mode, int mapping) +static int check_clear_prot_mte_flag(int mem_type, int mode, int mapping, = int atag_check) { char *ptr, *map_ptr; int run, prot_flag, result, fd, map_size; @@ -168,7 +177,7 @@ static int check_clear_prot_mte_flag(int mem_type, int = mode, int mapping) ksft_print_msg("FAIL: mprotect not ignoring clear PROT_MTE property\n"); return KSFT_FAIL; } - result =3D check_mte_memory(ptr, sizes[run], mode, TAG_CHECK_ON); + result =3D check_mte_memory(ptr, sizes[run], mode, TAG_CHECK_ON, atag_ch= eck); mte_free_memory_tag_range((void *)ptr, sizes[run], mem_type, UNDERFLOW, = OVERFLOW); if (result !=3D KSFT_PASS) return KSFT_FAIL; @@ -192,11 +201,11 @@ static int check_clear_prot_mte_flag(int mem_type, in= t mode, int mapping) close(fd); return KSFT_FAIL; } - result =3D check_mte_memory(ptr, sizes[run], mode, TAG_CHECK_ON); + result =3D check_mte_memory(ptr, sizes[run], mode, TAG_CHECK_ON, atag_ch= eck); mte_free_memory_tag_range((void *)ptr, sizes[run], mem_type, UNDERFLOW, = OVERFLOW); close(fd); if (result !=3D KSFT_PASS) - return KSFT_FAIL; + return result; } return KSFT_PASS; } @@ -209,6 +218,7 @@ const char *format_test_name(struct check_mmap_testcase= *tc) const char *sync_str; const char *mapping_str; const char *tag_check_str; + const char *atag_check_str; =20 switch (tc->check_type) { case CHECK_ANON_MEM: @@ -276,10 +286,22 @@ const char *format_test_name(struct check_mmap_testca= se *tc) break; } =20 + switch (tc->atag_check) { + case ATAG_CHECK_ON: + atag_check_str =3D "with address tag [63:60]"; + break; + case ATAG_CHECK_OFF: + atag_check_str =3D "without address tag [63:60]"; + break; + default: + assert(0); + break; + } + snprintf(test_name, sizeof(test_name), - "Check %s with %s mapping, %s mode, %s memory and %s\n", + "Check %s with %s mapping, %s mode, %s memory and %s (%s)\n", check_type_str, mapping_str, sync_str, mem_type_str, - tag_check_str); + tag_check_str, atag_check_str); =20 return test_name; } @@ -295,6 +317,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_SYNC_ERR, .mapping =3D MAP_PRIVATE, .tag_check =3D TAG_CHECK_OFF, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D true, }, { @@ -303,6 +326,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_SYNC_ERR, .mapping =3D MAP_PRIVATE, .tag_check =3D TAG_CHECK_OFF, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D true, }, { @@ -311,6 +335,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_NONE_ERR, .mapping =3D MAP_PRIVATE, .tag_check =3D TAG_CHECK_OFF, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -319,6 +344,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_NONE_ERR, .mapping =3D MAP_PRIVATE, .tag_check =3D TAG_CHECK_OFF, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -327,6 +353,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_SYNC_ERR, .mapping =3D MAP_PRIVATE, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -335,6 +362,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_SYNC_ERR, .mapping =3D MAP_PRIVATE, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -343,6 +371,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_SYNC_ERR, .mapping =3D MAP_SHARED, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -351,6 +380,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_SYNC_ERR, .mapping =3D MAP_SHARED, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -359,6 +389,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_ASYNC_ERR, .mapping =3D MAP_PRIVATE, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -367,6 +398,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_ASYNC_ERR, .mapping =3D MAP_PRIVATE, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -375,6 +407,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_ASYNC_ERR, .mapping =3D MAP_SHARED, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -383,6 +416,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_ASYNC_ERR, .mapping =3D MAP_SHARED, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -391,6 +425,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_SYNC_ERR, .mapping =3D MAP_PRIVATE, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -399,6 +434,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_SYNC_ERR, .mapping =3D MAP_PRIVATE, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -407,6 +443,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_SYNC_ERR, .mapping =3D MAP_SHARED, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -415,6 +452,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_SYNC_ERR, .mapping =3D MAP_SHARED, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -423,6 +461,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_ASYNC_ERR, .mapping =3D MAP_PRIVATE, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -431,6 +470,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_ASYNC_ERR, .mapping =3D MAP_PRIVATE, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -439,6 +479,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_ASYNC_ERR, .mapping =3D MAP_SHARED, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, .enable_tco =3D false, }, { @@ -447,6 +488,106 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_ASYNC_ERR, .mapping =3D MAP_SHARED, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_CLEAR_PROT_MTE, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_CLEAR_PROT_MTE, + .mem_type =3D USE_MPROTECT, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_OFF, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_ANON_MEM, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_ANON_MEM, + .mem_type =3D USE_MPROTECT, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_ANON_MEM, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_SHARED, + .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_ANON_MEM, + .mem_type =3D USE_MPROTECT, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_SHARED, + .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_FILE_MEM, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_FILE_MEM, + .mem_type =3D USE_MPROTECT, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_FILE_MEM, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_SHARED, + .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_FILE_MEM, + .mem_type =3D USE_MPROTECT, + .mte_sync =3D MTE_SYNC_ERR, + .mapping =3D MAP_SHARED, + .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_ON, + .enable_tco =3D false, + }, + { + .check_type =3D CHECK_FILE_MEM, + .mem_type =3D USE_MMAP, + .mte_sync =3D MTE_ASYNC_ERR, + .mapping =3D MAP_PRIVATE, + .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_ON, .enable_tco =3D false, }, { @@ -455,6 +596,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_SYNC_ERR, .mapping =3D MAP_PRIVATE, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_ON, .enable_tco =3D false, }, { @@ -463,6 +605,7 @@ int main(int argc, char *argv[]) .mte_sync =3D MTE_SYNC_ERR, .mapping =3D MAP_PRIVATE, .tag_check =3D TAG_CHECK_ON, + .atag_check =3D ATAG_CHECK_ON, .enable_tco =3D false, }, }; @@ -479,14 +622,16 @@ int main(int argc, char *argv[]) sizes[item - 2] =3D page_size; sizes[item - 1] =3D page_size + 1; =20 - /* Register signal handlers */ - mte_register_signal(SIGBUS, mte_default_handler, false); - mte_register_signal(SIGSEGV, mte_default_handler, false); - /* Set test plan */ ksft_set_plan(ARRAY_SIZE(test_cases)); =20 for (i =3D 0 ; i < ARRAY_SIZE(test_cases); i++) { + /* Register signal handlers */ + mte_register_signal(SIGBUS, mte_default_handler, + test_cases[i].atag_check =3D=3D ATAG_CHECK_ON); + mte_register_signal(SIGSEGV, mte_default_handler, + test_cases[i].atag_check =3D=3D ATAG_CHECK_ON); + if (test_cases[i].enable_tco) mte_enable_pstate_tco(); else @@ -497,20 +642,23 @@ int main(int argc, char *argv[]) evaluate_test(check_anonymous_memory_mapping(test_cases[i].mem_type, test_cases[i].mte_sync, test_cases[i].mapping, - test_cases[i].tag_check), + test_cases[i].tag_check, + test_cases[i].atag_check), format_test_name(&test_cases[i])); break; case CHECK_FILE_MEM: evaluate_test(check_file_memory_mapping(test_cases[i].mem_type, test_cases[i].mte_sync, test_cases[i].mapping, - test_cases[i].tag_check), + test_cases[i].tag_check, + test_cases[i].atag_check), format_test_name(&test_cases[i])); break; case CHECK_CLEAR_PROT_MTE: evaluate_test(check_clear_prot_mte_flag(test_cases[i].mem_type, test_cases[i].mte_sync, - test_cases[i].mapping), + test_cases[i].mapping, + test_cases[i].atag_check), format_test_name(&test_cases[i])); break; default: --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}