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Tue, 17 Jun 2025 06:33:41 -0400 (EDT) From: =?UTF-8?q?Niklas=20S=C3=B6derlund?= To: Mauro Carvalho Chehab , Jacopo Mondi , Laurent Pinchart , linux-media@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Niklas=20S=C3=B6derlund?= Subject: [PATCH 6/7] media: rppx1: Add support for Black Level Subtraction Date: Tue, 17 Jun 2025 12:32:00 +0200 Message-ID: <20250617103201.1594152-7-niklas.soderlund+renesas@ragnatech.se> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250617103201.1594152-1-niklas.soderlund+renesas@ragnatech.se> References: <20250617103201.1594152-1-niklas.soderlund+renesas@ragnatech.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Extend the RPPX1 driver to allow setting the Black Level Subtraction (BLS) configuration using the RkISP1 parameter buffer format. It uses the RPPX1 framework for parameters and its writer abstraction to allow the user to control how (and when) configuration is applied to the RPPX1. As the RkISP1 parameters buffer have lower precision then the RPPX1 hardware the values needs to be scaled. The behavior matches the RkISP1 hardware. Signed-off-by: Niklas S=C3=B6derlund --- .../platform/dreamchip/rppx1/rpp_params.c | 3 + .../platform/dreamchip/rppx1/rpp_stats.c | 5 +- .../platform/dreamchip/rppx1/rppx1_bls.c | 116 ++++++++++++++++++ 3 files changed, 123 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/dreamchip/rppx1/rpp_params.c b/drivers/= media/platform/dreamchip/rppx1/rpp_params.c index 5ab2e2a6bcbd..8c81f371f75e 100644 --- a/drivers/media/platform/dreamchip/rppx1/rpp_params.c +++ b/drivers/media/platform/dreamchip/rppx1/rpp_params.c @@ -23,6 +23,9 @@ int rppx1_params_rkisp1(struct rppx1 *rpp, struct rkisp1_= ext_params_cfg *cfg, block_offset +=3D block->header.size; =20 switch (block->header.type) { + case RKISP1_EXT_PARAMS_BLOCK_TYPE_BLS: + module =3D &rpp->pre1.bls; + break; case RKISP1_EXT_PARAMS_BLOCK_TYPE_AWB_GAIN: module =3D &rpp->post.awbg; break; diff --git a/drivers/media/platform/dreamchip/rppx1/rpp_stats.c b/drivers/m= edia/platform/dreamchip/rppx1/rpp_stats.c index 059bd76ecf64..1bffa6dd35f8 100644 --- a/drivers/media/platform/dreamchip/rppx1/rpp_stats.c +++ b/drivers/media/platform/dreamchip/rppx1/rpp_stats.c @@ -20,8 +20,11 @@ void rppx1_stats_fill_isr(struct rppx1 *rpp, u32 isc, vo= id *buf) if (!rpp_module_call(&rpp->post.hist, stats_rkisp1, &stats->params)) stats->meas_type |=3D RKISP1_CIF_ISP_STAT_HIST; =20 - if (isc & RPPX1_IRQ_ID_PRE1_EXM) + if (isc & RPPX1_IRQ_ID_PRE1_EXM) { if (!rpp_module_call(&rpp->pre1.exm, stats_rkisp1, &stats->params)) stats->meas_type |=3D RKISP1_CIF_ISP_STAT_AUTOEXP; + + rpp_module_call(&rpp->pre1.bls, stats_rkisp1, &stats->params); + } } EXPORT_SYMBOL_GPL(rppx1_stats_fill_isr); diff --git a/drivers/media/platform/dreamchip/rppx1/rppx1_bls.c b/drivers/m= edia/platform/dreamchip/rppx1/rppx1_bls.c index de7008befd8e..164bc4a63c23 100644 --- a/drivers/media/platform/dreamchip/rppx1/rppx1_bls.c +++ b/drivers/media/platform/dreamchip/rppx1/rppx1_bls.c @@ -5,6 +5,7 @@ */ =20 #include "rpp_module.h" +#include "rppx1.h" =20 #define BLS_VERSION_REG 0x0000 =20 @@ -54,6 +55,121 @@ static int rppx1_bls_probe(struct rpp_module *mod) return 0; } =20 +static void +rppx1_bls_swap_regs(struct rpp_module *mod, const u32 input[4], u32 output= [4]) +{ + static const unsigned int swap[4][4] =3D { + [RPP_RGGB] =3D { 0, 1, 2, 3 }, + [RPP_GRBG] =3D { 1, 0, 3, 2 }, + [RPP_GBRG] =3D { 2, 3, 0, 1 }, + [RPP_BGGR] =3D { 3, 2, 1, 0 }, + }; + + /* Swap to pattern used in our path, PRE1 or PRE2. */ + struct rpp_module *acq =3D mod =3D=3D &mod->rpp->pre1.bls ? + &mod->rpp->pre1.acq : &mod->rpp->pre2.bls; + enum rpp_raw_pattern pattern =3D acq->info.acq.raw_pattern; + + for (unsigned int i =3D 0; i < 4; ++i) + output[i] =3D input[swap[pattern][i]]; +} + +static int +rppx1_bls_param_rkisp1(struct rpp_module *mod, + const union rppx1_params_rkisp1_config *block, + rppx1_reg_write write, void *priv) +{ + const struct rkisp1_ext_params_bls_config *cfg =3D &block->bls; + + /* If the modules is disabled, simply bypass it. */ + if (cfg->header.flags & RKISP1_EXT_PARAMS_FL_BLOCK_DISABLE) { + write(priv, mod->base + BLS_CTRL_REG, 0); + return 0; + } + + u32 ctrl =3D BLS_CTRL_BLS_EN; + + if (!cfg->config.enable_auto) { + static const u32 regs[] =3D { + BLS_A_FIXED_REG, + BLS_B_FIXED_REG, + BLS_C_FIXED_REG, + BLS_D_FIXED_REG, + }; + u32 swapped[4]; + + rppx1_bls_swap_regs(mod, regs, swapped); + + /* + * The RkISP params are 12-bit + 1 signed bit, while the RPP can + * be 12, 20 or 24 bit + 1 signed bit. Figure out how much we + * need to adjust the input parameters. + */ + const unsigned int shift =3D mod->info.bls.colorbits - 12; + + write(priv, mod->base + swapped[0], cfg->config.fixed_val.r << shift); + write(priv, mod->base + swapped[1], cfg->config.fixed_val.gr << shift); + write(priv, mod->base + swapped[2], cfg->config.fixed_val.gb << shift); + write(priv, mod->base + swapped[3], cfg->config.fixed_val.b << shift); + } else { + write(priv, mod->base + BLS_SAMPLES_REG, cfg->config.bls_samples); + + if (cfg->config.en_windows & BIT(0)) { + write(priv, mod->base + BLS_H1_START_REG, cfg->config.bls_window1.h_off= s); + write(priv, mod->base + BLS_H1_STOP_REG, cfg->config.bls_window1.h_size= ); + write(priv, mod->base + BLS_V1_START_REG, cfg->config.bls_window1.v_off= s); + write(priv, mod->base + BLS_V1_STOP_REG, cfg->config.bls_window1.v_size= ); + ctrl |=3D BLS_CTRL_BLS_WIN1; + } + + if (cfg->config.en_windows & BIT(1)) { + write(priv, mod->base + BLS_H2_START_REG, cfg->config.bls_window2.h_off= s); + write(priv, mod->base + BLS_H2_STOP_REG, cfg->config.bls_window2.h_size= ); + write(priv, mod->base + BLS_V2_START_REG, cfg->config.bls_window2.v_off= s); + write(priv, mod->base + BLS_V2_STOP_REG, cfg->config.bls_window2.v_size= ); + ctrl |=3D BLS_CTRL_BLS_WIN2; + } + + ctrl |=3D BLS_CTRL_BLS_MODE_MEASURED; + } + + write(priv, mod->base + BLS_CTRL_REG, ctrl); + + return 0; +} + +static int rppx1_bls_stats_rkisp1(struct rpp_module *mod, + struct rkisp1_cif_isp_stat *stats) +{ + struct rkisp1_cif_isp_bls_meas_val *bls =3D &stats->ae.bls_val; + + static const u32 regs[] =3D { + BLS_A_MEASURED_REG, + BLS_B_MEASURED_REG, + BLS_C_MEASURED_REG, + BLS_D_MEASURED_REG, + }; + u32 swapped[4]; + + rppx1_bls_swap_regs(mod, regs, swapped); + + /* + * The RkISP BLS stats are 12-bit while the RPP can be 8, 20 + * or 24 bit. Figure out how much we need to adjust the output + * statistics. + */ + const unsigned int shift =3D mod->info.bls.colorbits - 12; + + bls->meas_r =3D rpp_module_read(mod, swapped[0]) >> shift; + bls->meas_gr =3D rpp_module_read(mod, swapped[1]) >> shift; + bls->meas_gb =3D rpp_module_read(mod, swapped[2]) >> shift; + bls->meas_b =3D rpp_module_read(mod, swapped[3]) >> shift; + + return 0; +} + const struct rpp_module_ops rppx1_bls_ops =3D { .probe =3D rppx1_bls_probe, + .param_rkisp1 =3D rppx1_bls_param_rkisp1, + .stats_rkisp1 =3D rppx1_bls_stats_rkisp1 }; --=20 2.49.0