From nobody Fri Oct 10 02:48:20 2025 Received: from naesa03.arrow.com (naesa03.arrow.com [216.150.161.23]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 879E02E88A3; Mon, 16 Jun 2025 11:24:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.150.161.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750073071; cv=none; b=XqiY++5iFVwAwBT+icjSUaDpYEgqmJDaXbk4p++6Lhl9f0A5vsK1tX6xJmwH+QZ2w5IW+F/KJiHy5DsF9a2tccA6boiBn1I+amESfp6ykU6pNdQveGi3jMsG3bEGVEdu8K/q9NDLgw4mnxNPL8z8pzBxrnSATnZqjE9twaWUwps= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750073071; c=relaxed/simple; bh=i5P0tKBpmZ6mD0d91tJFPrQutrJ8bbOu8k+h7YJYWME=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=DHy6tA1kMO9KZT0hvqDfeaWz8ge1xNxZmuVo4s0ciyml4p3zlu2ocz+om/SSrAJpYrP3TvMbGchs0fGWLzuq8b64VBF31c9c8+fahJ78Vcx+FolPYgyDBOMlI3QzET36uBpQdP5BaMrya/QAwzJwh5sRSJ/Dg2pYuxgHFNjP0ls= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=einfochips.com; spf=pass smtp.mailfrom=einfochips.com; dkim=pass (2048-bit key) header.d=einfochips.com header.i=@einfochips.com header.b=V2Ni1+xv; arc=none smtp.client-ip=216.150.161.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=einfochips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=einfochips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=einfochips.com header.i=@einfochips.com header.b="V2Ni1+xv" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=einfochips.com; i=@einfochips.com; l=754; q=dns/txt; s=NAESA-Selector1; t=1750073069; x=1781609069; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=i5P0tKBpmZ6mD0d91tJFPrQutrJ8bbOu8k+h7YJYWME=; b=V2Ni1+xvm3R3rtErZmDNNV2LC+ggO9rqoEhMRIHXXM/EPBiZvY8xLFKw jS7IqWxLosgRfH+Ki/08372XdUnLBOI3PpM/ctaplIrcmiE/lNeLYBTyO igctGJ6bpibDZLpHhq49ZYQAyauxxbkpOz5JSpbWa58AJ5Nnx3bUiFBHo xYKu+og0kGOMu0Ec2pKrNyqXA/exyYoISFu86xrkcgLHop23Z4H2k9zSF z6YQhBVKxJd3poNzgells2youh/2dStlTWF5KVm7OnS9NtYvN6TviJG14 kzu0gphqtPexOIip8U8EL4A+C2Y6tYuLr80JnNVr+ZS/eEWmfoIDwN8nj g==; X-CSE-ConnectionGUID: dumP9f/rQpiSqPkYJCoOzA== X-CSE-MsgGUID: I+AyGSUdStSYSUKrXq0ohQ== X-IronPort-AV: E=Sophos;i="6.16,241,1744092000"; d="scan'208";a="86117889" Received: from unknown (HELO eicahmirelay01.einfochips.com) ([10.100.49.50]) by naesa03out.arrow.com with ESMTP; 16 Jun 2025 05:23:20 -0600 Received: from AHMCPU1888.ap.corp.arrow.com ([172.25.5.100]) by eicahmirelay01.einfochips.com with Microsoft SMTPSVC(10.0.14393.4169); Mon, 16 Jun 2025 16:53:16 +0530 From: Pinkesh Vaghela To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Thomas Gleixner Cc: Paul Walmsley , Samuel Holland , Palmer Dabbelt , Albert Ou , Daniel Lezcano , Min Lin , Pinkesh Vaghela , Pritesh Patel , Yangyu Chen , Lad Prabhakar , Yu Chien Peter Lin , Charlie Jenkins , Kanak Shilledar , Darshan Prajapati , Neil Armstrong , Heiko Stuebner , Aradhya Bhatia , rafal@milecki.pl, Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 2/7] riscv: Add Kconfig option for ESWIN platforms Date: Mon, 16 Jun 2025 16:53:11 +0530 Message-Id: <20250616112316.3833343-3-pinkesh.vaghela@einfochips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250616112316.3833343-1-pinkesh.vaghela@einfochips.com> References: <20250616112316.3833343-1-pinkesh.vaghela@einfochips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 16 Jun 2025 11:23:16.0452 (UTC) FILETIME=[0E16E240:01DBDEB1] Content-Type: text/plain; charset="utf-8" Create a config option to build ESWIN SoC specific resources Signed-off-by: Pinkesh Vaghela Reviewed-by: Samuel Holland Acked-by: Conor Dooley --- arch/riscv/Kconfig.socs | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index a9c3d2f6debc..3cd0999fe84f 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -1,5 +1,11 @@ menu "SoC selection" =20 +config ARCH_ESWIN + bool "ESWIN SoCs" + help + This enables support for ESWIN SoC platform hardware, + including the ESWIN EIC7700 SoC. + config ARCH_MICROCHIP_POLARFIRE def_bool ARCH_MICROCHIP =20 --=20 2.25.1