From nobody Fri Oct 3 12:38:08 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 37340244694; Mon, 1 Sep 2025 21:01:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756760513; cv=none; b=IA3cCdhXFdBPUP2AhI8i5KnGV17czu5rt8lExHrw58JBscU6GhIL/f/CpsTOx0Bs23HfMqy64Wy5oFRJ9CKgoIrVU9hgLeSsroODsP5hCrpF97lxs7uh+mFdrDtm/ys7QEYIh35rrqbmY3IQmp4tQBz2zRbm1+Yrt9echcYAjBU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756760513; c=relaxed/simple; bh=0i9GyZfKTp11tFuGLpcI9sqzS/VX2YxPG9sUde5/E2c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ojlCRuUbFa+zvJ1IPZByAAckZy/hOM36dRgvwFlNZi+k/LwxwqcskiZoyfdlJaftfgTH0pfoJxHmc+20vNL63RD1qlKA6qsCKlQYgHtqBg4abPw1587F31//nYxBgePAeX5Mg+QAGgHaIrsKbrVRQinnNX8yNRrse7HrdmU6InE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=U8JzkuwM; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="U8JzkuwM" Received: by smtp.kernel.org (Postfix) with ESMTPS id C686CC4CEF5; Mon, 1 Sep 2025 21:01:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1756760512; bh=0i9GyZfKTp11tFuGLpcI9sqzS/VX2YxPG9sUde5/E2c=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=U8JzkuwM3u6Acs+qTZ2ZRmvDkbEjT8hT0ZFw4CN+RGn7kLikiUHFimzb6y5yW8YHQ gC3uzDQwaTiZxDBza8IOEkHw/ZJi60+198/pPLxrw/T+5hlPfh2OwbuaXnt/y2OE4p lcdxKeOeKGGDVvJ3DSXV+kXhqrr8uPBBn8zPCJndwLJv/xY7yT0k+2MC/RC0lGn8NK bnBYx0xGf/KjHaKP2NZWTUreZXgao73GleT6/bofQQTQ7GEUlMKMbsVDzqcr/pVjOE m9gkLX5+d5JERcomKVvcR9UEtEwFrlmYZDWqM7loLYlE6cFA9Kb4LJE17px8VNSloL yduUQwXmS1Hkw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id B19BCCA1002; Mon, 1 Sep 2025 21:01:52 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Mon, 01 Sep 2025 22:47:44 +0200 Subject: [PATCH v3 3/7] dt-bindings: phy: rockchip-inno-csi-dphy: add rk3588 variant Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250616-rk3588-csi-dphy-v3-3-a5ccd5f1f438@collabora.com> References: <20250616-rk3588-csi-dphy-v3-0-a5ccd5f1f438@collabora.com> In-Reply-To: <20250616-rk3588-csi-dphy-v3-0-a5ccd5f1f438@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Vinod Koul , Kishon Vijay Abraham I , Philipp Zabel , Kever Yang , Jagan Teki , Sebastian Reichel , Diederik de Haas , Neil Armstrong , Heiko Stuebner , Collabora Kernel Team Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1756759662; l=2642; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=BWFwRKFAbzrCTHgoNhrC2467CbLUxPGoZVsDuHv4H7c=; b=0czArA1ITOmxFWBtw11FrbEGI1xv6KFhDnksdNLZ753DqIkLziGJrhhdwnO+Pi5szSnee6/M1 U6abVJH6hw+BdIljo8oHXnmvoHr6GhbsF3cF9KaV9J4tiTp23SdwzHc X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch The Rockchip RK3588 variant of the CSI-2 DPHY features two reset lines. Add the variant and allow for the additional reset. Signed-off-by: Michael Riesch --- .../bindings/phy/rockchip-inno-csi-dphy.yaml | 50 ++++++++++++++++++= +++- 1 file changed, 49 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.y= aml b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml index 9ad72518e6da..e37c9fd74788 100644 --- a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml +++ b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml @@ -21,6 +21,7 @@ properties: - rockchip,rk3326-csi-dphy - rockchip,rk3368-csi-dphy - rockchip,rk3568-csi-dphy + - rockchip,rk3588-csi-dphy =20 reg: maxItems: 1 @@ -40,11 +41,15 @@ properties: =20 resets: items: - - description: exclusive PHY reset line + - description: APB reset line + - description: PHY reset line + minItems: 1 =20 reset-names: items: - const: apb + - const: phy + minItems: 1 =20 rockchip,grf: $ref: /schemas/types.yaml#/definitions/phandle @@ -64,6 +69,30 @@ allOf: then: required: - power-domains + - if: + properties: + compatible: + contains: + enum: + - rockchip,px30-csi-dphy + - rockchip,rk1808-csi-dphy + - rockchip,rk3326-csi-dphy + - rockchip,rk3368-csi-dphy + - rockchip,rk3568-csi-dphy + then: + properties: + resets: + maxItems: 1 + + reset-names: + maxItems: 1 + else: + properties: + resets: + minItems: 2 + + reset-names: + minItems: 2 =20 required: - compatible @@ -91,3 +120,22 @@ examples: reset-names =3D "apb"; rockchip,grf =3D <&grf>; }; + - | + #include + #include + + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + phy@fedc0000 { + compatible =3D "rockchip,rk3588-csi-dphy"; + reg =3D <0x0 0xfedc0000 0x0 0x8000>; + clocks =3D <&cru PCLK_CSIPHY0>; + clock-names =3D "pclk"; + #phy-cells =3D <0>; + resets =3D <&cru SRST_P_CSIPHY0>, <&cru SRST_CSIPHY0>; + reset-names =3D "apb", "phy"; + rockchip,grf =3D <&csidphy0_grf>; + }; + }; --=20 2.39.5