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[76.88.115.8]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7488ffeca93sm2969630b3a.20.2025.06.14.02.15.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Jun 2025 02:15:16 -0700 (PDT) From: Sukrut Bellary To: Jonathan Cameron , David Lechner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matti Vaittinen , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Angelo Compagnucci Cc: Sukrut Bellary , Nishanth Menon , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v4 1/5] dt-bindings: iio: adc: ti,adc128s052: Add adc08c and adc10c family Date: Sat, 14 Jun 2025 02:15:00 -0700 Message-Id: <20250614091504.575685-2-sbellary@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250614091504.575685-1-sbellary@baylibre.com> References: <20250614091504.575685-1-sbellary@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The adcxx4s communicates with a host processor via an SPI/Microwire Bus interface. The device family responds with 12-bit data, of which the LSB bi= ts are 0 for the lower resolution devices. The unavailable bits are 0 in LSB. Shift is calculated per resolution and used in scaling and raw data read. I have been able to test adc102s051, hence adding just the missing ones in that family. Lets reuse the binding to support the family of devices with name ADCS, where * bb is the resolution in number of bits (8, 10, 12) * c is the number of channels (1, 2, 4, 8) * sss is the maximum conversion speed (021 for 200 kSPS, 051 for 500 kSPS and 101 for 1 MSPS) Complete datasheets are available at TI's website here: https://www.ti.com/lit/ds/symlink/adcs.pdf Co-developed-by: Nishanth Menon Signed-off-by: Nishanth Menon Signed-off-by: Sukrut Bellary Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/iio/adc/ti,adc128s052.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml b= /Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml index 775eee972b12..392b4a3e867c 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml @@ -16,6 +16,12 @@ description: | properties: compatible: enum: + - ti,adc082s021 + - ti,adc082s051 + - ti,adc082s101 + - ti,adc102s021 + - ti,adc102s051 + - ti,adc102s101 - ti,adc122s021 - ti,adc122s051 - ti,adc122s101 --=20 2.34.1 From nobody Fri Oct 10 09:21:34 2025 Received: from mail-pf1-f176.google.com (mail-pf1-f176.google.com [209.85.210.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B3EA2298994 for ; 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[76.88.115.8]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7488ffeca93sm2969630b3a.20.2025.06.14.02.15.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Jun 2025 02:15:18 -0700 (PDT) From: Sukrut Bellary To: Jonathan Cameron , David Lechner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matti Vaittinen , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Angelo Compagnucci Cc: Sukrut Bellary , Nishanth Menon , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 2/5] iio: adc: ti-adc128s052: Use shift and realbits Date: Sat, 14 Jun 2025 02:15:01 -0700 Message-Id: <20250614091504.575685-3-sbellary@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250614091504.575685-1-sbellary@baylibre.com> References: <20250614091504.575685-1-sbellary@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This adcxx communicates with a host processor via an SPI/Microwire Bus interface. The device family responds with 12-bit data, of which the LSB bi= ts are transmitted by the lower resolution devices as 0. The unavailable bits = are 0 in LSB. Shift is calculated per resolution and used in scaling and raw da= ta read. Create a separate structure for each device type instead of an array. These changes help to reuse the driver to support the family of devices with name ADCS, where * bb is the resolution in number of bits (8, 10, 12) * c is the number of channels (1, 2, 4, 8) * sss is the maximum conversion speed (021 for 200 kSPS, 051 for 500 kSPS and 101 for 1 MSPS) Complete datasheets are available at TI's website here: https://www.ti.com/lit/ds/symlink/adcs.pdf Co-developed-by: Nishanth Menon Signed-off-by: Nishanth Menon Signed-off-by: Sukrut Bellary --- drivers/iio/adc/ti-adc128s052.c | 115 ++++++++++++++++++-------------- 1 file changed, 66 insertions(+), 49 deletions(-) diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s05= 2.c index 1b46a8155803..2b206745e53d 100644 --- a/drivers/iio/adc/ti-adc128s052.c +++ b/drivers/iio/adc/ti-adc128s052.c @@ -41,13 +41,14 @@ struct adc128 { } __aligned(IIO_DMA_MINALIGN); }; =20 -static int adc128_adc_conversion(struct adc128 *adc, u8 channel) +static int adc128_adc_conversion(struct adc128 *adc, + struct iio_chan_spec const *channel) { int ret; =20 guard(mutex)(&adc->lock); =20 - adc->buffer[0] =3D channel << 3; + adc->buffer[0] =3D channel->channel << 3; adc->buffer[1] =3D 0; =20 ret =3D spi_write(adc->spi, &adc->buffer, sizeof(adc->buffer)); @@ -58,7 +59,10 @@ static int adc128_adc_conversion(struct adc128 *adc, u8 = channel) if (ret < 0) return ret; =20 - return be16_to_cpu(adc->buffer16) & 0xFFF; + ret =3D (be16_to_cpu(adc->buffer16) >> channel->scan_type.shift) & + GENMASK(channel->scan_type.realbits - 1, 0); + + return ret; } =20 static int adc128_read_raw(struct iio_dev *indio_dev, @@ -71,7 +75,7 @@ static int adc128_read_raw(struct iio_dev *indio_dev, switch (mask) { case IIO_CHAN_INFO_RAW: =20 - ret =3D adc128_adc_conversion(adc, channel->channel); + ret =3D adc128_adc_conversion(adc, channel); if (ret < 0) return ret; =20 @@ -81,7 +85,7 @@ static int adc128_read_raw(struct iio_dev *indio_dev, case IIO_CHAN_INFO_SCALE: =20 *val =3D adc->vref_mv; - *val2 =3D 12; + *val2 =3D channel->scan_type.realbits; return IIO_VAL_FRACTIONAL_LOG2; =20 default: @@ -90,15 +94,24 @@ static int adc128_read_raw(struct iio_dev *indio_dev, =20 } =20 -#define ADC128_VOLTAGE_CHANNEL(num) \ - { \ - .type =3D IIO_VOLTAGE, \ - .indexed =3D 1, \ - .channel =3D (num), \ - .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW), \ - .info_mask_shared_by_type =3D BIT(IIO_CHAN_INFO_SCALE) \ +#define _ADC128_VOLTAGE_CHANNEL(num, real_bits) \ + { \ + .type =3D IIO_VOLTAGE, \ + .indexed =3D 1, \ + .channel =3D (num), \ + .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW), \ + .info_mask_shared_by_type =3D BIT(IIO_CHAN_INFO_SCALE), \ + .scan_index =3D (num), \ + .scan_type =3D { \ + .sign =3D 'u', \ + .realbits =3D (real_bits), \ + .storagebits =3D 16, \ + .shift =3D (12 - real_bits), \ + }, \ } =20 +#define ADC128_VOLTAGE_CHANNEL(num) _ADC128_VOLTAGE_CHANNEL(num, 12) + static const struct iio_chan_spec adc128s052_channels[] =3D { ADC128_VOLTAGE_CHANNEL(0), ADC128_VOLTAGE_CHANNEL(1), @@ -124,26 +137,30 @@ static const struct iio_chan_spec adc124s021_channels= [] =3D { =20 static const char * const bd79104_regulators[] =3D { "iovdd" }; =20 -static const struct adc128_configuration adc128_config[] =3D { - { - .channels =3D adc128s052_channels, - .num_channels =3D ARRAY_SIZE(adc128s052_channels), - .refname =3D "vref", - }, { - .channels =3D adc122s021_channels, - .num_channels =3D ARRAY_SIZE(adc122s021_channels), - .refname =3D "vref", - }, { - .channels =3D adc124s021_channels, - .num_channels =3D ARRAY_SIZE(adc124s021_channels), - .refname =3D "vref", - }, { - .channels =3D adc128s052_channels, - .num_channels =3D ARRAY_SIZE(adc128s052_channels), - .refname =3D "vdd", - .other_regulators =3D &bd79104_regulators, - .num_other_regulators =3D 1, - }, +static const struct adc128_configuration adc122s021_config =3D { + .channels =3D adc122s021_channels, + .num_channels =3D ARRAY_SIZE(adc122s021_channels), + .refname =3D "vref", +}; + +static const struct adc128_configuration adc124s021_config =3D { + .channels =3D adc124s021_channels, + .num_channels =3D ARRAY_SIZE(adc124s021_channels), + .refname =3D "vref", +}; + +static const struct adc128_configuration adc128s052_config =3D { + .channels =3D adc128s052_channels, + .num_channels =3D ARRAY_SIZE(adc128s052_channels), + .refname =3D "vref", +}; + +static const struct adc128_configuration bd79104_config =3D { + .channels =3D adc128s052_channels, + .num_channels =3D ARRAY_SIZE(adc128s052_channels), + .refname =3D "vdd", + .other_regulators =3D &bd79104_regulators, + .num_other_regulators =3D 1, }; =20 static const struct iio_info adc128_info =3D { @@ -199,33 +216,33 @@ static int adc128_probe(struct spi_device *spi) } =20 static const struct of_device_id adc128_of_match[] =3D { - { .compatible =3D "ti,adc128s052", .data =3D &adc128_config[0] }, - { .compatible =3D "ti,adc122s021", .data =3D &adc128_config[1] }, - { .compatible =3D "ti,adc122s051", .data =3D &adc128_config[1] }, - { .compatible =3D "ti,adc122s101", .data =3D &adc128_config[1] }, - { .compatible =3D "ti,adc124s021", .data =3D &adc128_config[2] }, - { .compatible =3D "ti,adc124s051", .data =3D &adc128_config[2] }, - { .compatible =3D "ti,adc124s101", .data =3D &adc128_config[2] }, - { .compatible =3D "rohm,bd79104", .data =3D &adc128_config[3] }, + { .compatible =3D "ti,adc128s052", .data =3D &adc128s052_config }, + { .compatible =3D "ti,adc122s021", .data =3D &adc122s021_config }, + { .compatible =3D "ti,adc122s051", .data =3D &adc122s021_config }, + { .compatible =3D "ti,adc122s101", .data =3D &adc122s021_config }, + { .compatible =3D "ti,adc124s021", .data =3D &adc124s021_config }, + { .compatible =3D "ti,adc124s051", .data =3D &adc124s021_config }, + { .compatible =3D "ti,adc124s101", .data =3D &adc124s021_config }, + { .compatible =3D "rohm,bd79104", .data =3D &bd79104_config }, { } }; MODULE_DEVICE_TABLE(of, adc128_of_match); =20 static const struct spi_device_id adc128_id[] =3D { - { "adc128s052", (kernel_ulong_t)&adc128_config[0] }, - { "adc122s021", (kernel_ulong_t)&adc128_config[1] }, - { "adc122s051", (kernel_ulong_t)&adc128_config[1] }, - { "adc122s101", (kernel_ulong_t)&adc128_config[1] }, - { "adc124s021", (kernel_ulong_t)&adc128_config[2] }, - { "adc124s051", (kernel_ulong_t)&adc128_config[2] }, - { "adc124s101", (kernel_ulong_t)&adc128_config[2] }, - { "bd79104", (kernel_ulong_t)&adc128_config[3] }, + { "adc128s052", (kernel_ulong_t)&adc128s052_config }, + { "adc122s021", (kernel_ulong_t)&adc122s021_config }, + { "adc122s051", (kernel_ulong_t)&adc122s021_config }, + { "adc122s101", (kernel_ulong_t)&adc122s021_config }, + { "adc124s021", (kernel_ulong_t)&adc124s021_config }, + { "adc124s051", (kernel_ulong_t)&adc124s021_config }, + { "adc124s101", (kernel_ulong_t)&adc124s021_config }, + { "bd79104", (kernel_ulong_t)&bd79104_config }, { } }; MODULE_DEVICE_TABLE(spi, adc128_id); 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[76.88.115.8]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7488ffeca93sm2969630b3a.20.2025.06.14.02.15.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Jun 2025 02:15:20 -0700 (PDT) From: Sukrut Bellary To: Jonathan Cameron , David Lechner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matti Vaittinen , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Angelo Compagnucci Cc: Sukrut Bellary , Nishanth Menon , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 3/5] iio: adc: ti-adc128s052: cleanup changes Date: Sat, 14 Jun 2025 02:15:02 -0700 Message-Id: <20250614091504.575685-4-sbellary@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250614091504.575685-1-sbellary@baylibre.com> References: <20250614091504.575685-1-sbellary@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Arrange device IDs in alphabetical and numerical order. new device ID addit= ion can follow the same convention. Also, arrange the structures in order. This is a cosmetic change only, and the functionality remains unchanged. Co-developed-by: Nishanth Menon Signed-off-by: Nishanth Menon Signed-off-by: Sukrut Bellary Reviewed-by: Matti Vaittinen --- drivers/iio/adc/ti-adc128s052.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s05= 2.c index 2b206745e53d..fbf15c83c127 100644 --- a/drivers/iio/adc/ti-adc128s052.c +++ b/drivers/iio/adc/ti-adc128s052.c @@ -112,27 +112,27 @@ static int adc128_read_raw(struct iio_dev *indio_dev, =20 #define ADC128_VOLTAGE_CHANNEL(num) _ADC128_VOLTAGE_CHANNEL(num, 12) =20 -static const struct iio_chan_spec adc128s052_channels[] =3D { +static const struct iio_chan_spec adc122s021_channels[] =3D { ADC128_VOLTAGE_CHANNEL(0), ADC128_VOLTAGE_CHANNEL(1), - ADC128_VOLTAGE_CHANNEL(2), - ADC128_VOLTAGE_CHANNEL(3), - ADC128_VOLTAGE_CHANNEL(4), - ADC128_VOLTAGE_CHANNEL(5), - ADC128_VOLTAGE_CHANNEL(6), - ADC128_VOLTAGE_CHANNEL(7), }; =20 -static const struct iio_chan_spec adc122s021_channels[] =3D { +static const struct iio_chan_spec adc124s021_channels[] =3D { ADC128_VOLTAGE_CHANNEL(0), ADC128_VOLTAGE_CHANNEL(1), + ADC128_VOLTAGE_CHANNEL(2), + ADC128_VOLTAGE_CHANNEL(3), }; =20 -static const struct iio_chan_spec adc124s021_channels[] =3D { +static const struct iio_chan_spec adc128s052_channels[] =3D { ADC128_VOLTAGE_CHANNEL(0), ADC128_VOLTAGE_CHANNEL(1), ADC128_VOLTAGE_CHANNEL(2), ADC128_VOLTAGE_CHANNEL(3), + ADC128_VOLTAGE_CHANNEL(4), + ADC128_VOLTAGE_CHANNEL(5), + ADC128_VOLTAGE_CHANNEL(6), + ADC128_VOLTAGE_CHANNEL(7), }; =20 static const char * const bd79104_regulators[] =3D { "iovdd" }; @@ -216,27 +216,27 @@ static int adc128_probe(struct spi_device *spi) } =20 static const struct of_device_id adc128_of_match[] =3D { - { .compatible =3D "ti,adc128s052", .data =3D &adc128s052_config }, + { .compatible =3D "rohm,bd79104", .data =3D &bd79104_config }, { .compatible =3D "ti,adc122s021", .data =3D &adc122s021_config }, { .compatible =3D "ti,adc122s051", .data =3D &adc122s021_config }, { .compatible =3D "ti,adc122s101", .data =3D &adc122s021_config }, { .compatible =3D "ti,adc124s021", .data =3D &adc124s021_config }, { .compatible =3D "ti,adc124s051", .data =3D &adc124s021_config }, { .compatible =3D "ti,adc124s101", .data =3D &adc124s021_config }, - { .compatible =3D "rohm,bd79104", .data =3D &bd79104_config }, + { .compatible =3D "ti,adc128s052", .data =3D &adc128s052_config }, { } }; MODULE_DEVICE_TABLE(of, adc128_of_match); =20 static const struct spi_device_id adc128_id[] =3D { - { "adc128s052", (kernel_ulong_t)&adc128s052_config }, { "adc122s021", (kernel_ulong_t)&adc122s021_config }, { "adc122s051", (kernel_ulong_t)&adc122s021_config }, { "adc122s101", (kernel_ulong_t)&adc122s021_config }, { "adc124s021", (kernel_ulong_t)&adc124s021_config }, { "adc124s051", (kernel_ulong_t)&adc124s021_config }, { "adc124s101", (kernel_ulong_t)&adc124s021_config }, - { "bd79104", (kernel_ulong_t)&bd79104_config }, + { "adc128s052", (kernel_ulong_t)&adc128s052_config }, + { "bd79104", (kernel_ulong_t)&bd79104_config }, { } }; MODULE_DEVICE_TABLE(spi, adc128_id); --=20 2.34.1 From nobody Fri Oct 10 09:21:34 2025 Received: from mail-pf1-f176.google.com (mail-pf1-f176.google.com [209.85.210.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CD8E129C35A for ; Sat, 14 Jun 2025 09:15:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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[76.88.115.8]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7488ffeca93sm2969630b3a.20.2025.06.14.02.15.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Jun 2025 02:15:21 -0700 (PDT) From: Sukrut Bellary To: Jonathan Cameron , David Lechner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matti Vaittinen , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Angelo Compagnucci Cc: Sukrut Bellary , Nishanth Menon , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 4/5] iio: adc: ti-adc128s052: Add lower resolution devices support Date: Sat, 14 Jun 2025 02:15:03 -0700 Message-Id: <20250614091504.575685-5-sbellary@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250614091504.575685-1-sbellary@baylibre.com> References: <20250614091504.575685-1-sbellary@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The adcxx communicates with a host processor via an SPI/Microwire Bus interface. The device family responds with 12-bit data, of which the LSB bi= ts are transmitted by the lower resolution devices as 0. The unavailable bits are 0 in LSB. Shift is calculated per resolution and used in scaling and raw data read. Lets reuse the driver to support the family of devices with name ADCS, where * bb is the resolution in number of bits (8, 10, 12) * c is the number of channels (1, 2, 4, 8) * sss is the maximum conversion speed (021 for 200 kSPS, 051 for 500 kSPS and 101 for 1 MSPS) Complete datasheets are available at TI's website here: https://www.ti.com/lit/ds/symlink/adcs.pdf Tested only with ti-adc102s051 on BegalePlay SBC. https://www.beagleboard.org/boards/beagleplay Co-developed-by: Nishanth Menon Signed-off-by: Nishanth Menon Signed-off-by: Sukrut Bellary --- drivers/iio/adc/ti-adc128s052.c | 51 +++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s05= 2.c index fbf15c83c127..b515ed0bb1d5 100644 --- a/drivers/iio/adc/ti-adc128s052.c +++ b/drivers/iio/adc/ti-adc128s052.c @@ -7,6 +7,21 @@ * https://www.ti.com/lit/ds/symlink/adc128s052.pdf * https://www.ti.com/lit/ds/symlink/adc122s021.pdf * https://www.ti.com/lit/ds/symlink/adc124s021.pdf + * + * The adcxx4s communicates with a host processor via an SPI/Microwire Bus + * interface. This driver supports the whole family of devices with a name + * ADCS, where + * bb is the resolution in number of bits (8, 10, 12) + * c is the number of channels (1, 2, 4, 8) + * sss is the maximum conversion speed (021 for 200 kSPS, 051 for 500 kSPS= and + * 101 for 1 MSPS) + * + * Complete datasheets are available at TI's website here: + * https://www.ti.com/lit/ds/symlink/adcs.pdf + * + * 8, 10, and 12 bits converters send 12-bit data with unavailable bits se= t to + * 0 in LSB. + * Shift is calculated per resolution and used in scaling and raw data rea= d. */ =20 #include @@ -110,8 +125,20 @@ static int adc128_read_raw(struct iio_dev *indio_dev, }, \ } =20 +#define ADC082_VOLTAGE_CHANNEL(num) _ADC128_VOLTAGE_CHANNEL(num, 8) +#define ADC102_VOLTAGE_CHANNEL(num) _ADC128_VOLTAGE_CHANNEL(num, 10) #define ADC128_VOLTAGE_CHANNEL(num) _ADC128_VOLTAGE_CHANNEL(num, 12) =20 +static const struct iio_chan_spec adc082s021_channels[] =3D { + ADC082_VOLTAGE_CHANNEL(0), + ADC082_VOLTAGE_CHANNEL(1), +}; + +static const struct iio_chan_spec adc102s021_channels[] =3D { + ADC102_VOLTAGE_CHANNEL(0), + ADC102_VOLTAGE_CHANNEL(1), +}; + static const struct iio_chan_spec adc122s021_channels[] =3D { ADC128_VOLTAGE_CHANNEL(0), ADC128_VOLTAGE_CHANNEL(1), @@ -137,6 +164,18 @@ static const struct iio_chan_spec adc128s052_channels[= ] =3D { =20 static const char * const bd79104_regulators[] =3D { "iovdd" }; =20 +static const struct adc128_configuration adc082s021_config =3D { + .channels =3D adc082s021_channels, + .num_channels =3D ARRAY_SIZE(adc082s021_channels), + .refname =3D "vref", +}; + +static const struct adc128_configuration adc102s021_config =3D { + .channels =3D adc102s021_channels, + .num_channels =3D ARRAY_SIZE(adc102s021_channels), + .refname =3D "vref", +}; + static const struct adc128_configuration adc122s021_config =3D { .channels =3D adc122s021_channels, .num_channels =3D ARRAY_SIZE(adc122s021_channels), @@ -217,6 +256,12 @@ static int adc128_probe(struct spi_device *spi) =20 static const struct of_device_id adc128_of_match[] =3D { { .compatible =3D "rohm,bd79104", .data =3D &bd79104_config }, + { .compatible =3D "ti,adc082s021", .data =3D &adc082s021_config }, + { .compatible =3D "ti,adc082s051", .data =3D &adc082s021_config }, + { .compatible =3D "ti,adc082s101", .data =3D &adc082s021_config }, + { .compatible =3D "ti,adc102s021", .data =3D &adc102s021_config }, + { .compatible =3D "ti,adc102s051", .data =3D &adc102s021_config }, + { .compatible =3D "ti,adc102s101", .data =3D &adc102s021_config }, { .compatible =3D "ti,adc122s021", .data =3D &adc122s021_config }, { .compatible =3D "ti,adc122s051", .data =3D &adc122s021_config }, { .compatible =3D "ti,adc122s101", .data =3D &adc122s021_config }, @@ -229,6 +274,12 @@ static const struct of_device_id adc128_of_match[] =3D= { MODULE_DEVICE_TABLE(of, adc128_of_match); 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[76.88.115.8]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7488ffeca93sm2969630b3a.20.2025.06.14.02.15.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Jun 2025 02:15:23 -0700 (PDT) From: Sukrut Bellary To: Jonathan Cameron , David Lechner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matti Vaittinen , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Angelo Compagnucci Cc: Sukrut Bellary , Nishanth Menon , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 5/5] MAINTAINERS: maintainer for TI's ADCs' driver ti-adc128s052 Date: Sat, 14 Jun 2025 02:15:04 -0700 Message-Id: <20250614091504.575685-6-sbellary@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250614091504.575685-1-sbellary@baylibre.com> References: <20250614091504.575685-1-sbellary@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add undersigned as a maintainer for the ti-adc128s052.c which supports a few TI's ADCs. Signed-off-by: Sukrut Bellary --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index a92290fffa16..bf1c7fdcd2f1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -24719,6 +24719,7 @@ F: drivers/gpio/gpio-thunderx.c =20 TI ADC12xs and ROHM BD79104 ADC driver M: Matti Vaittinen +M: Sukrut Bellary S: Maintained F: drivers/iio/adc/ti-adc128s052.c L: linux-iio@vger.kernel.org --=20 2.34.1