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Sat, 14 Jun 2025 11:15:06 -0700 (PDT) From: Alexey Charkov Date: Sat, 14 Jun 2025 22:14:33 +0400 Subject: [PATCH v2 1/4] arm64: dts: rockchip: list all CPU supplies on ArmSoM Sige5 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250614-sige5-updates-v2-1-3bb31b02623c@gmail.com> References: <20250614-sige5-updates-v2-0-3bb31b02623c@gmail.com> In-Reply-To: <20250614-sige5-updates-v2-0-3bb31b02623c@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Detlev Casanova Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alexey Charkov , stable@vger.kernel.org, Nicolas Frattaroli X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1749924902; l=1915; i=alchark@gmail.com; s=20250416; h=from:subject:message-id; bh=QdElGcOzwWgLhHGEr9MDl1bHr4d6LFvNBBvG2cBo4I8=; b=cgSA57cepXZcVv6ZPbKxYOxuxZxJek5TAKiawvvBrPyXqC4Q5ALi/AvBqL7/VFcoqDr2XbqKY v765NdmZ2EeAAYtEnDczgPJ+i3fgGivUkqrhlv++n07kN4UzbWJxNbb X-Developer-Key: i=alchark@gmail.com; a=ed25519; pk=ltKbQzKLTJPiDgPtcHxdo+dzFthCCMtC3V9qf7+0rkc= List both CPU supply regulators which drive the little and big CPU clusters, respectively, so that cpufreq can pick them up. Without this patch the cpufreq governor attempts to raise the big CPU frequency under high load, while its supply voltage stays at 850000 uV. This causes system instability and, in my case, random reboots. With this patch, supply voltages are adjusted in step with frequency changes from 700000-737000 uV in idle to 950000 uV under full load, and the system appears to be stable. While at this, list all CPU supplies for completeness. Cc: stable@vger.kernel.org Fixes: 40f742b07ab2 ("arm64: dts: rockchip: Add rk3576-armsom-sige5 board") Reviewed-by: Nicolas Frattaroli Tested-by: Nicolas Frattaroli Signed-off-by: Alexey Charkov --- .../boot/dts/rockchip/rk3576-armsom-sige5.dts | 28 ++++++++++++++++++= ++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts b/arch/ar= m64/boot/dts/rockchip/rk3576-armsom-sige5.dts index b09e789c75c47fec7cf7e9810ab0dcca32d9404a..801b40fea4e8808c3f889ddd3ed= 3aa875a377567 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts @@ -211,10 +211,38 @@ &combphy0_ps { status =3D "okay"; }; =20 +&cpu_b0 { + cpu-supply =3D <&vdd_cpu_big_s0>; +}; + +&cpu_b1 { + cpu-supply =3D <&vdd_cpu_big_s0>; +}; + +&cpu_b2 { + cpu-supply =3D <&vdd_cpu_big_s0>; +}; + +&cpu_b3 { + cpu-supply =3D <&vdd_cpu_big_s0>; +}; + &cpu_l0 { cpu-supply =3D <&vdd_cpu_lit_s0>; }; =20 +&cpu_l1 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + &gmac0 { phy-mode =3D "rgmii-id"; clock_in_out =3D "output"; --=20 2.49.0