From nobody Fri Oct 10 15:55:17 2025 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E7062C08A3; Fri, 13 Jun 2025 13:49:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.199 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749822594; cv=none; b=LcoWVA7nXG8u9khHyHFXs4qGADuzGBkR3eFi8OTIXnZAUh2A6AW5b/snfjtOyRMF6JJ6yw3sRbh5bfTf+defO+Wczi0yzWp3JlSvsu/BcVCUY8zU+ux9bv+Zw7TrAR3jND6NiIEWTb7Cso5y6M/m+aYxyC2z2QvQzkyVMVXolMw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749822594; c=relaxed/simple; bh=xBrtD26NIAs4XLyYFal3Do6QxZ4ShRZy9r/MUQfR3IM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Z8IpI5fV/9nTyUC8472Gx5GXFAmFFa5s28oHRpfm8UNXuFWZryhaOGThO/GFd3PeXrmTuP7PaCrFf8xftke678Z5d9eDWPWtrhZxOTYLZgjDRLIrvd1cqQynNaHlETKaGHTbpwvbUiomsqmbbKxzSmM5NKELA+2iabZizPM/Tg4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=LDcUOrg9; arc=none smtp.client-ip=217.70.183.199 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="LDcUOrg9" Received: by mail.gandi.net (Postfix) with ESMTPA id 728D642E77; Fri, 13 Jun 2025 13:49:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1749822589; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=eoTpd5CK7nvr6dHG5LWr9IC26BMOpRfFaLW3I7g0LVE=; b=LDcUOrg9MTx4PnTEqqPoeSCtLZQktjp9lUIOW11e5gjhSwNqBcs0m3d574GbaGs383x4nK eELB4pk3Kfs+Km83BMXRmGXPe6WlVf+wGIXTxZUyN98AGG+OOele1Dvz6h8FuULdm5ZVHs qwA3mekMCaeFAWfUI+qcZpf+aineDKToa4nOsyOjmYrdkM4/C/NptiBTj3LEjGNO/2296r kN0m77YA+hdfMjcAtNSEMkb28gC9htbcifFyCZu9py8CH7bpD0V0tATVCew9ogFFLLKLlU X/XFink033xMMMXSmyWM9ipZYFNj00U8MP7QYM2egLJGYCmEZjw1bFculnrBCA== From: Herve Codina To: Andrew Lunn , Greg Kroah-Hartman , "Rafael J. Wysocki" , Danilo Krummrich , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Michael Turquette , Stephen Boyd , Andi Shyti , Wolfram Sang , Peter Rosin , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Herve Codina , Rob Herring , Saravana Kannan , Bjorn Helgaas , Mark Brown , Len Brown , Andy Shevchenko , Daniel Scally , Heikki Krogerus , Sakari Ailus Cc: Wolfram Sang , Geert Uytterhoeven , Davidlohr Bueso , Dave Jiang , Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-spi@vger.kernel.org, linux-acpi@vger.kernel.org, linux-cxl@vger.kernel.org, Allan Nielsen , Horatiu Vultur , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH v3 26/28] misc: lan966x_pci: Add dtsi/dtso nodes in order to support SFPs Date: Fri, 13 Jun 2025 15:48:06 +0200 Message-ID: <20250613134817.681832-27-herve.codina@bootlin.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250613134817.681832-1-herve.codina@bootlin.com> References: <20250613134817.681832-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtddugddukeduudcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomhepjfgvrhhvvgcuvehoughinhgruceohhgvrhhvvgdrtghoughinhgrsegsohhothhlihhnrdgtohhmqeenucggtffrrghtthgvrhhnpeehffeigfejueelueeuffelueefgfelhfejhfehieegudekteeiledttdfhffekffenucfkphepledtrdekledrudeifedruddvjeenucevlhhushhtvghrufhiiigvpeduleenucfrrghrrghmpehinhgvthepledtrdekledrudeifedruddvjedphhgvlhhopehlohgtrghlhhhoshhtrdhlohgtrghlughomhgrihhnpdhmrghilhhfrhhomhephhgvrhhvvgdrtghoughinhgrsegsohhothhlihhnrdgtohhmpdhnsggprhgtphhtthhopeegledprhgtphhtthhopegrnhgurhgvfieslhhunhhnrdgthhdprhgtphhtthhopehgrhgvghhkhheslhhinhhugihfohhunhgurghtihhonhdrohhrghdprhgtphhtthhopehrrghfrggvlheskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepuggrkhhrsehkvghrnhgvlhdrohhrghdprhgtphhtthhopehshhgrfihnghhuoheskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepshdrh hgruhgvrhesphgvnhhguhhtrhhonhhigidruggvpdhrtghpthhtohepkhgvrhhnvghlsehpvghnghhuthhrohhnihigrdguvgdprhgtphhtthhopehfvghsthgvvhgrmhesghhmrghilhdrtghomh X-GND-Sasl: herve.codina@bootlin.com Content-Type: text/plain; charset="utf-8" Add device-tree nodes needed to support SFPs. Those nodes are: - the clock controller - the i2c controller - the i2c mux - the SFPs themselves and their related ports in the switch Signed-off-by: Herve Codina --- drivers/misc/lan966x_evb_lan9662_nic.dtso | 95 +++++++++++++++++++++++ drivers/misc/lan966x_pci.dtsi | 42 ++++++++++ 2 files changed, 137 insertions(+) diff --git a/drivers/misc/lan966x_evb_lan9662_nic.dtso b/drivers/misc/lan96= 6x_evb_lan9662_nic.dtso index b3de5f14d9cb..20e1fe4f78bf 100644 --- a/drivers/misc/lan966x_evb_lan9662_nic.dtso +++ b/drivers/misc/lan966x_evb_lan9662_nic.dtso @@ -4,6 +4,7 @@ */ =20 #include +#include #include =20 /dts-v1/; @@ -28,15 +29,93 @@ __overlay__ { =20 #include "lan966x_pci.dtsi" =20 + i2c0_emux: i2c0-emux { + compatible =3D "i2c-mux-pinctrl"; + #address-cells =3D <1>; + #size-cells =3D <0>; + i2c-parent =3D <&i2c0>; + pinctrl-names =3D "i2c102", "i2c103", "idle"; + pinctrl-0 =3D <&i2cmux_0>; + pinctrl-1 =3D <&i2cmux_1>; + pinctrl-2 =3D <&i2cmux_pins>; + + i2c102: i2c@0 { + reg =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + i2c103: i2c@1 { + reg =3D <1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + + sfp2: sfp2 { + compatible =3D "sff,sfp"; + i2c-bus =3D <&i2c102>; + tx-disable-gpios =3D <&gpio 0 GPIO_ACTIVE_HIGH>; + los-gpios =3D <&gpio 25 GPIO_ACTIVE_HIGH>; + mod-def0-gpios =3D <&gpio 18 GPIO_ACTIVE_LOW>; + tx-fault-gpios =3D <&gpio 2 GPIO_ACTIVE_HIGH>; + }; + + sfp3: sfp3 { + compatible =3D "sff,sfp"; + i2c-bus =3D <&i2c103>; + tx-disable-gpios =3D <&gpio 1 GPIO_ACTIVE_HIGH>; + los-gpios =3D <&gpio 26 GPIO_ACTIVE_HIGH>; + mod-def0-gpios =3D <&gpio 19 GPIO_ACTIVE_LOW>; + tx-fault-gpios =3D <&gpio 3 GPIO_ACTIVE_HIGH>; + }; }; }; }; =20 +&flx0 { + atmel,flexcom-mode =3D ; + status =3D "okay"; +}; + +&i2c0 { + pinctrl-0 =3D <&fc0_a_pins>; + pinctrl-names =3D "default"; + i2c-analog-filter; + i2c-digital-filter; + i2c-digital-filter-width-ns =3D <35>; + status =3D "okay"; +}; + &gpio { tod_pins: tod_pins { pins =3D "GPIO_36"; function =3D "ptpsync_1"; }; + + fc0_a_pins: fcb4-i2c-pins { + /* RXD, TXD */ + pins =3D "GPIO_9", "GPIO_10"; + function =3D "fc0_a"; + }; + + i2cmux_pins: i2cmux-pins { + pins =3D "GPIO_76", "GPIO_77"; + function =3D "twi_slc_gate"; + output-low; + }; + + i2cmux_0: i2cmux-0 { + pins =3D "GPIO_76"; + function =3D "twi_slc_gate"; + output-high; + }; + + i2cmux_1: i2cmux-1 { + pins =3D "GPIO_77"; + function =3D "twi_slc_gate"; + output-high; + }; }; =20 &lan966x_phy0 { @@ -65,6 +144,22 @@ &port1 { status =3D "okay"; }; =20 +&port2 { + phy-mode =3D "sgmii"; + phys =3D <&serdes 2 SERDES6G(0)>; + sfp =3D <&sfp2>; + managed =3D "in-band-status"; + status =3D "okay"; +}; + +&port3 { + phy-mode =3D "sgmii"; + phys =3D <&serdes 3 SERDES6G(1)>; + sfp =3D <&sfp3>; + managed =3D "in-band-status"; + status =3D "okay"; +}; + &switch { pinctrl-names =3D "default"; pinctrl-0 =3D <&tod_pins>; diff --git a/drivers/misc/lan966x_pci.dtsi b/drivers/misc/lan966x_pci.dtsi index 170298084fa5..d5c2056e4e5c 100644 --- a/drivers/misc/lan966x_pci.dtsi +++ b/drivers/misc/lan966x_pci.dtsi @@ -3,6 +3,7 @@ * Copyright (C) 2025 Microchip UNG */ =20 +#include #include =20 cpu_clk: clock-600000000 { @@ -61,6 +62,39 @@ port1: port@1 { reg =3D <1>; status =3D "disabled"; }; + + port2: port@2 { + reg =3D <2>; + status =3D "disabled"; + }; + + port3: port@3 { + reg =3D <3>; + status =3D "disabled"; + }; + }; + }; + + flx0: flexcom@e0040000 { + compatible =3D "atmel,sama5d2-flexcom"; + reg =3D <0xe0040000 0x100>; + clocks =3D <&clks GCK_ID_FLEXCOM0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0x0 0xe0040000 0x800>; + status =3D "disabled"; + + i2c0: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupt-parent =3D <&oic>; + interrupts =3D <48 IRQ_TYPE_LEVEL_HIGH>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&clks GCK_ID_FLEXCOM0>; + assigned-clocks =3D <&clks GCK_ID_FLEXCOM0>; + assigned-clock-rates =3D <20000000>; + status =3D "disabled"; }; }; =20 @@ -69,6 +103,14 @@ cpu_ctrl: syscon@e00c0000 { reg =3D <0xe00c0000 0xa8>; }; =20 + clks: clock-controller@e00c00a8 { + compatible =3D "microchip,lan966x-gck"; + #clock-cells =3D <1>; + clocks =3D <&cpu_clk>, <&ddr_clk>, <&sys_clk>; + clock-names =3D "cpu", "ddr", "sys"; + reg =3D <0xe00c00a8 0x38>, <0xe00c02cc 0x4>; + }; + oic: oic@e00c0120 { compatible =3D "microchip,lan966x-oic"; #interrupt-cells =3D <2>; --=20 2.49.0