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Darwish" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1749771713; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=aucTGch6VIspEvZqsNKH9dxMONrsSTbqBKsLK1ul2nA=; b=tAOWOCNCBOhpXxdL+z8WrRlzXJoy/xnjE2kWAjDNQlFzH2XwLfI6YAwA2CAoQIR45hnf82 OWniDYNyTMFUq5WE35nBhb+XM6xHg9oCnRLqUDAo1FPZNG0JZAbFg981+/z/J5x5wBwL07 PwH0AjNwO8L/sVwIECQIPXI60GtKokmfmN9omkM88JNQs+w126Vx8oKF29PUIPjWjKjFZR puOyc/IyHg8fSC3g5ngT59EmYvDAWvOwy+FEfa9+KQe6E5KDaOAgsYcETaoLUkwNDYzwf2 fYlkYSzG3DMJeCUn/niPT0Eg+7VoLT40z1vXrpHs6Vnywmt1icUoq1BEpqc10w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1749771713; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=aucTGch6VIspEvZqsNKH9dxMONrsSTbqBKsLK1ul2nA=; b=P94ySQS9ROnKBS5U+6EulaGW9hPjUNt8j4aOY7hNfe4H6nWmQLNI2iZHySlp1OASUnHvwv AYlYd60SpnuWc9Dw== To: Ingo Molnar , Borislav Petkov , Dave Hansen Cc: Thomas Gleixner , Andrew Cooper , "H. Peter Anvin" , Peter Zijlstra , Sean Christopherson , Sohil Mehta , Ard Biesheuvel , John Ogness , x86@kernel.org, x86-cpuid@lists.linux.dev, LKML , "Ahmed S. Darwish" Subject: [PATCH v3 28/44] x86/cpuid: Parse CPUID(0x2) Date: Fri, 13 Jun 2025 01:39:54 +0200 Message-ID: <20250612234010.572636-29-darwi@linutronix.de> In-Reply-To: <20250612234010.572636-1-darwi@linutronix.de> References: <20250612234010.572636-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add CPUID(0x2) support to the CPUID parser. Keep the leaf marked as invalid at the CPUID table if the whole leaf, or all of its output registers, were malformed. Note, the cpuid_leaf_0x2() logic at will be removed once all the CPUID(0x2) call sites are transformed to the new CPUID model API. References: fe78079ec07f ("x86/cpu: Introduce and use CPUID leaf 0x2 parsin= g helpers") Signed-off-by: Ahmed S. Darwish --- arch/x86/include/asm/cpuid/types.h | 1 + arch/x86/kernel/cpu/cpuid_parser.c | 41 +++++++++++++++++++++++++++--- arch/x86/kernel/cpu/cpuid_parser.h | 1 + 3 files changed, 40 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/cpuid/types.h b/arch/x86/include/asm/cpui= d/types.h index d0f0e6a8a457..7bbf0671cb95 100644 --- a/arch/x86/include/asm/cpuid/types.h +++ b/arch/x86/include/asm/cpuid/types.h @@ -215,6 +215,7 @@ struct cpuid_leaves { /* leaf subleaf count */ CPUID_LEAF(0x0, 0, 1); CPUID_LEAF(0x1, 0, 1); + CPUID_LEAF(0x2, 0, 1); CPUID_LEAF(0x80000000, 0, 1); }; =20 diff --git a/arch/x86/kernel/cpu/cpuid_parser.c b/arch/x86/kernel/cpu/cpuid= _parser.c index eb8975de497a..9bd68b150150 100644 --- a/arch/x86/kernel/cpu/cpuid_parser.c +++ b/arch/x86/kernel/cpu/cpuid_parser.c @@ -27,9 +27,40 @@ static void cpuid_read_generic(const struct cpuid_parse_= entry *e, struct cpuid_r cpuid_read_subleaf(e->leaf, e->subleaf + i, output->regs); } =20 -/* - * Leaf-independent parser code: - */ +static void cpuid_read_0x2(const struct cpuid_parse_entry *e, struct cpuid= _read_output *output) +{ + union leaf_0x2_regs *regs =3D (union leaf_0x2_regs *)output->regs; + struct leaf_0x2_0 *l =3D (struct leaf_0x2_0 *)output->regs; + int invalid_regs =3D 0; + + /* + * All Intel CPUs must report an iteration count of 1. For broken hardwa= re, + * keep the leaf marked as invalid at the CPUID table. + */ + cpuid_read_subleaf(e->leaf, e->subleaf, l); + if (l->iteration_count !=3D 0x01) + return; + + /* + * The most significant bit (MSB) of each CPUID(0x2) register must be cle= ar. + * If a register is malformed, replace its 1-byte descriptors with NULL. + */ + for (int i =3D 0; i < 4; i++) { + if (regs->reg[i].invalid) { + regs->regv[i] =3D 0; + invalid_regs++; + } + } + + /* + * If all of the CPUID(0x2) output registers were malformed, keep the leaf + * marked as invalid at the CPUID table. + */ + if (invalid_regs =3D=3D 4) + return; + + output->info->nr_entries =3D 1; +} =20 static void cpuid_read_0x80000000(const struct cpuid_parse_entry *e, struc= t cpuid_read_output *output) { @@ -54,6 +85,10 @@ static void cpuid_read_0x80000000(const struct cpuid_par= se_entry *e, struct cpui output->info->nr_entries =3D 1; } =20 +/* + * Leaf-independent parser code: + */ + static unsigned int cpuid_range_max_leaf(const struct cpuid_table *t, unsi= gned int range) { switch (range) { diff --git a/arch/x86/kernel/cpu/cpuid_parser.h b/arch/x86/kernel/cpu/cpuid= _parser.h index 882e96b000ba..cf999e6a574d 100644 --- a/arch/x86/kernel/cpu/cpuid_parser.h +++ b/arch/x86/kernel/cpu/cpuid_parser.h @@ -96,6 +96,7 @@ struct cpuid_parse_entry { /* Leaf Subleaf Reader function */ \ CPUID_PARSE_ENTRY(0x0, 0, generic), \ CPUID_PARSE_ENTRY(0x1, 0, generic), \ + CPUID_PARSE_ENTRY(0x2, 0, 0x2), \ CPUID_PARSE_ENTRY(0x80000000, 0, 0x80000000), =20 extern const struct cpuid_parse_entry cpuid_common_parse_entries[]; --=20 2.49.0