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Thu, 12 Jun 2025 08:00:10 -0700 (PDT) Received: from localhost ([2a02:8308:a00c:e200:e05f:7af3:1bf9:f101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4532e25f207sm22980815e9.35.2025.06.12.08.00.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Jun 2025 08:00:10 -0700 (PDT) From: =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= To: linux-riscv@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Atish Patra , Andrew Jones , =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= , Anup Patel Subject: [PATCH 1/2] RISC-V: sbi: turn sbi_ecall into variadic macro Date: Thu, 12 Jun 2025 16:57:54 +0200 Message-ID: <20250612145754.2126147-3-rkrcmar@ventanamicro.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250612145754.2126147-2-rkrcmar@ventanamicro.com> References: <20250612145754.2126147-2-rkrcmar@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Counting the arguments to sbi_ecall() and padding with zeros gets old pretty quick. It's also harder to distinguish a tailing 0 argument and the padding. The patch changes sbi_ecall() to accept anything between 1 and 8 integer arguments. Those who can count are also given sbi_ecall1() to sbi_ecall8(), which the variadic magic uses under the hood. The error messages upon a programmer error are a bit hairy, as expected of macros, and the static_assert is there to improve them a bit. The final goal would be avoid clobbering registers that are not used in the ecall, but we first have to fix the code generation around tracepoints if sbi_ecall is expected to be used in paths where performance is critical. Signed-off-by: Radim Kr=C4=8Dm=C3=A1=C5=99 --- arch/riscv/include/asm/sbi.h | 34 +++++++++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 341e74238aa0..c62db61bd018 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -10,6 +10,7 @@ #include #include #include +#include =20 #ifdef CONFIG_RISCV_SBI enum sbi_ext_id { @@ -465,9 +466,40 @@ struct sbiret __sbi_ecall(unsigned long arg0, unsigned= long arg1, unsigned long arg2, unsigned long arg3, unsigned long arg4, unsigned long arg5, int fid, int ext); -#define sbi_ecall(e, f, a0, a1, a2, a3, a4, a5) \ + +#define sbi_ecall1(e) \ + __sbi_ecall(0, 0, 0, 0, 0, 0, 0, e) +#define sbi_ecall2(e, f) \ + __sbi_ecall(0, 0, 0, 0, 0, 0, f, e) +#define sbi_ecall3(e, f, a0) \ + __sbi_ecall(a0, 0, 0, 0, 0, 0, f, e) +#define sbi_ecall4(e, f, a0, a1) \ + __sbi_ecall(a0, a1, 0, 0, 0, 0, f, e) +#define sbi_ecall5(e, f, a0, a1, a2) \ + __sbi_ecall(a0, a1, a2, 0, 0, 0, f, e) +#define sbi_ecall6(e, f, a0, a1, a2, a3) \ + __sbi_ecall(a0, a1, a2, a3, 0, 0, f, e) +#define sbi_ecall7(e, f, a0, a1, a2, a3, a4) \ + __sbi_ecall(a0, a1, a2, a3, a4, 0, f, e) +#define sbi_ecall8(e, f, a0, a1, a2, a3, a4, a5) \ __sbi_ecall(a0, a1, a2, a3, a4, a5, f, e) =20 +#define __sbi_count_args_magic(_, a, b, c, d, e, f, g, h, N, ...) N +#define __sbi_count_args(...) \ + __sbi_count_args_magic(_, ## __VA_ARGS__, 8, 7, 6, 5, 4, 3, 2, 1, 0) +#define __sbi_count_args2(...) \ + (sizeof((unsigned long[]){0, ## __VA_ARGS__}) / sizeof(unsigned long) - 1) +#define __sbi_concat_expanded(a, b) a ## b +#define __sbi_concat(n) __sbi_concat_expanded(sbi_ecall, n) + +/* sbi_ecall selects the appropriate sbi_ecall1 to sbi_ecall8 */ +#define sbi_ecall(...) \ + ({ \ + static_assert(__sbi_count_args2(__VA_ARGS__) <=3D 8); \ + __sbi_concat(__sbi_count_args(__VA_ARGS__)) \ + (__VA_ARGS__); \ + }) + #ifdef CONFIG_RISCV_SBI_V01 void sbi_console_putchar(int ch); int sbi_console_getchar(void); --=20 2.49.0