From nobody Sat Oct 11 04:10:41 2025 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D99F23A58B; Thu, 12 Jun 2025 10:09:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749722992; cv=none; b=OioTMfaegTnH0QqBblr7COznAD5R/cCB4o8MRT68B9H1Y+SMCn8x9/dJmv4boRYRDutnxw0ORsh5IMYzMUjBShX9q0dxBQ/XW7Y1aNOzFOfAaU0haXrBDI9QHJHXEfA0HLIEC+ZAOAbb7ff1SbzXdJZlC0P+HXTZD2+wi8lMEOo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749722992; c=relaxed/simple; bh=t1Mq/ydzptDL9vJKIUvctlvePASvSZu3bKvh8Y+LYPU=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=j0Ff4pLflPsFNJ/N538ra0QwoNV/AZC2Nw1FhFavcq3ZSnI2F2NGRkfJ1fy6FDuFrLaEz/Fjpv0FculPAFbHBxdgQDD/v3oKQS99vSAhDylYjxXsuOniYdJlGJ5xIQli5IMRfbdvHBbYINk+FJ3fmKUB7TOd51K8ASWQbSRfLzQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Thu, 12 Jun 2025 18:09:34 +0800 Received: from twmbx02.aspeed.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Thu, 12 Jun 2025 18:09:34 +0800 From: Ryan Chen To: ryan_chen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Catalin Marinas , Will Deacon , Arnd Bergmann , Bjorn Andersson , Geert Uytterhoeven , Nishanth Menon , , Taniya Das , Lad Prabhakar , Kuninori Morimoto , Eric Biggers , , , , , , Mo Elbadry , Rom Lemarchand , William Kennington , Yuxiao Zhang , , , , Subject: [PATCH v0 4/5] arm64: dts: aspeed: Add AST2700 EVB device tree Date: Thu, 12 Jun 2025 18:09:32 +0800 Message-ID: <20250612100933.3007673-5-ryan_chen@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250612100933.3007673-1-ryan_chen@aspeedtech.com> References: <20250612100933.3007673-1-ryan_chen@aspeedtech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" - Add ast2700-evb.dts for the ASPEED AST2700 Evaluation Board. - Set board model and compatible strings: "aspeed,ast2700-evb", "aspeed,ast2700". - Reference the common AST2700 SoC device tree aspeed-g7.dtsi. - Define memory layout and reserved-memory regions for MCU firmware, ATF, and OP-TEE. - Add OP-TEE firmware node with SMC method. - Set up serial12 as the default console. Signed-off-by: Ryan Chen --- arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/aspeed/Makefile | 4 ++ arch/arm64/boot/dts/aspeed/ast2700-evb.dts | 54 ++++++++++++++++++++++ 3 files changed, 59 insertions(+) create mode 100644 arch/arm64/boot/dts/aspeed/Makefile create mode 100644 arch/arm64/boot/dts/aspeed/ast2700-evb.dts diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index 79b73a21ddc2..d9c3e58b9ca5 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -35,3 +35,4 @@ subdir-y +=3D tesla subdir-y +=3D ti subdir-y +=3D toshiba subdir-y +=3D xilinx +subdir-y +=3D aspeed diff --git a/arch/arm64/boot/dts/aspeed/Makefile b/arch/arm64/boot/dts/aspe= ed/Makefile new file mode 100644 index 000000000000..ffe7e15017cc --- /dev/null +++ b/arch/arm64/boot/dts/aspeed/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0 + +dtb-$(CONFIG_ARCH_ASPEED) +=3D \ + ast2700-evb.dtb diff --git a/arch/arm64/boot/dts/aspeed/ast2700-evb.dts b/arch/arm64/boot/d= ts/aspeed/ast2700-evb.dts new file mode 100644 index 000000000000..ecd4b55931e7 --- /dev/null +++ b/arch/arm64/boot/dts/aspeed/ast2700-evb.dts @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +/dts-v1/; +#include "aspeed-g7.dtsi" + +/ { + model =3D "ASPEED ast2700 Development Board"; + compatible =3D "aspeed,ast2700-evb", "aspeed,ast2700"; + + aliases { + serial12 =3D &serial12; + }; + + chosen { + stdout-path =3D &serial12; + }; + + firmware { + optee: optee { + compatible =3D "linaro,optee-tz"; + method =3D "smc"; + }; + }; + + memory@400000000 { + device_type =3D "memory"; + reg =3D <0x4 0x00000000 0x40000000>; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <1>; + ranges; + + mcu_fw: mcu-firmware@42fe00000 { + reg =3D <0x4 0x2fe00000 0x200000>; + no-map; + }; + + atf: trusted-firmware-a@430000000 { + reg =3D <0x4 0x30000000 0x80000>; + no-map; + }; + + optee_core: optee-core@430080000 { + reg =3D <0x4 0x30080000 0x1000000>; + no-map; + }; + }; +}; + +&serial12 { + status =3D "okay"; +}; --=20 2.34.1