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Shenoy" , Babu Moger , "Suravee Suthikulpanit" , K Prateek Nayak Subject: [PATCH 2/2] x86/cpu/topology: Use initial APICID from XTOPOEXT on AMD/HYGON Date: Thu, 12 Jun 2025 07:29:21 +0000 Message-ID: <20250612072921.15107-3-kprateek.nayak@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250612072921.15107-1-kprateek.nayak@amd.com> References: <20250612072921.15107-1-kprateek.nayak@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0001709D:EE_|DS5PPFE52C859EE:EE_ X-MS-Office365-Filtering-Correlation-Id: 00c5aa79-f803-4ad2-9bca-08dda982fd29 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|1800799024|82310400026|13003099007; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?45d9lp5aqtg/Ab8WfS1I+wpGzB871zzPB/K8Gy7A9msEwABJKGsGv0qNG2NE?= =?us-ascii?Q?/JGHTq8W2GMyFh1MtFwiDhbNX7+Cy0GMhNNEq3rPEiUv+jW8gifbALHguIZT?= =?us-ascii?Q?2dNiOa6Wcgdl47uLxdfd2ydltrb5qgpWDpb3m/5p/H49Fg1O7jaWw1BWQ3x+?= =?us-ascii?Q?rdKOQq5fS4GYglWmgn+OdXOTdraCyz9tFyt5cj0z4t2+Ik5atdykGYzTSPrH?= =?us-ascii?Q?aN62lyNXhIeziVH4s1w4PJphbYzmRyJ9R+yAlYlKt6nty2Blypt+ntLzCGHl?= =?us-ascii?Q?lqaczv7oNkVVZH9JP1M2Ny6Kj2Z31nd2WRHZENxEVdMUv3ewiwhACNdfZJQn?= =?us-ascii?Q?0cyaOWlJfeF2jAE5hpYA+A+hsnmUw8CBfK6+i0nl0NVr+3OtK5ga3bjMNyJ/?= =?us-ascii?Q?PLea21hqp0fJKt1IX3i71kYODbG0C8mOxwr93C6ZRHSQ67zsxbRcFlpAjv7a?= =?us-ascii?Q?UWeFQwgKLSV+V4Cmz7hGUUTJc/h0KLbMzaJuMzviY4HrTikxtWnHk18lJqk5?= =?us-ascii?Q?cZvxdzX4LolaIp6/rw9wvblMh8MelM2FZZJO5snk4iNaNHskmJnkUZCnUQIp?= =?us-ascii?Q?bOhiHrpihDBbcw3Ffn1116vtoZwBRwB9KY2rxOXB7DxohntlUW99uf6H8rSL?= =?us-ascii?Q?bVn5PppA1cxHA9rNZY5c5NV1ytvFYeVC2bwqGLajifK7uue5OeZofHgzu27P?= =?us-ascii?Q?pS4nZzCQEjp9Gu4aJw1py/0S9xyf4VBfDY2Wp2om5x4y3Aloo1kf/CXTngv8?= =?us-ascii?Q?5UT5qU51fBD4gw8QYXmAflmHNLoxFsGeR+gVXHVI4FRtNvwlef1WU6sDp3gN?= =?us-ascii?Q?JMoUjaUQYraOVMn7shDC+rgzBXGX7H7XHyDVcLEY1HpriOlpIZwnZP3gGedb?= =?us-ascii?Q?vUkGZ2xYCR6jrCnSMpAdEkET4YYGOf/kC2+cGyNLk5bUsUqni7E2LQLWhQYa?= =?us-ascii?Q?4izOUwJznoJk1xa7Etbb6fl54n7oHSZO8ie7zvU0axBnOmeegZ3c1zXPTGaW?= =?us-ascii?Q?+tsdpfnnlmVPuKcDDC73+lM9Uf3WRz4mv0zveTFFnxQJUu6Vks/e+X+BV5bB?= =?us-ascii?Q?8sLHyIeTI9VE1P4lQSJLj/EJqSbq7N1A0PKfVVBRGz1DA2pSOazYqZiIawq7?= =?us-ascii?Q?bLkzW2kojZqXp9avmqdfLTBx+4rQ7v6Of7Pyn98SuM3sf1jkYVEqNC5VyKZz?= =?us-ascii?Q?HUErxvRcPkqGegrlFZWWYmUJUtBs4kpt0Jyu1tIlIR0FJCelCrt1qU1nYj6e?= =?us-ascii?Q?tZXwdIq8+mtAqlxosGsyhYS8EQle/7ITrJoScnMSYgf7rrECcpnykXVeYFnO?= =?us-ascii?Q?TjIMO7G9HahKfCTGQRXQbU/Y8lyakR24S7TrwEu8uDtt8vzWdmhW3t+GeKr8?= =?us-ascii?Q?RnuJk8qQI9RL5HIvFi43DjosIs+gH9FphyWoFd+bPpMbMgavAo2LGocgzjTW?= =?us-ascii?Q?MZADi+/vB5+Mt2wccbKJsypGT1PVCgIqJO8EchR/hQyttkoEUGB06f7/cW3d?= =?us-ascii?Q?v8NKWTeh2u9CZrWdy0OkS7CDb/mjdCRsMGKK?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700013)(1800799024)(82310400026)(13003099007);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jun 2025 07:30:21.3884 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 00c5aa79-f803-4ad2-9bca-08dda982fd29 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0001709D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS5PPFE52C859EE Content-Type: text/plain; charset="utf-8" Prior to the topology parsing rewrite and the switchover to the new parsing logic for AMD processors in commit c749ce393b8f ("x86/cpu: Use common topology code for AMD"), the "initial_apicid" on these platforms was: - First initialized to the LocalApicId from CPUID leaf 0x1 EBX[31:24]. - Then overwritten by the ExtendedLocalApicId in CPUID leaf 0xb EDX[31:0] on processors that supported topoext. With the new parsing flow introduced in commit f7fb3b2dd92c ("x86/cpu: Provide an AMD/HYGON specific topology parser"), parse_8000_001e() now unconditionally overwrites the "initial_apicid" already parsed during cpu_parse_topology_ext(). Although this has not been a problem on baremetal platforms, on virtualized AMD guests that feature more than 255 cores, QEMU 0's out the CPUID leaf 0x8000001e on CPUs with "CoreID" > 255 to prevent collision of these IDs in EBX[7:0] which can only represent a maximum of 255 cores [1]. This results in the following FW_BUG being logged when booting a guest with more than 255 cores: [Firmware Bug]: CPU 512: APIC ID mismatch. CPUID: 0x0000 APIC: 0x0200 Rely on the APICID parsed during cpu_parse_topology_ext() from CPUID leaf 0x80000026 or 0xb and only use the APICID from leaf 0x8000001e if cpu_parse_topology_ext() failed (has_topoext is false). On platforms that support the 0xb leaf (Zen2 or later, AMD guests on QEMU) or the extended leaf 0x80000026 (Zen4 or later), the "initial_apicid" is now set to the value parsed from EDX[31:0]. On older AMD/Hygon platforms that does not support the 0xb leaf but supports the TOPOEXT extension (Fam 0x15, 0x16, 0x17[Zen1], and Hygon), the current behavior is retained where "initial_apicid" is set using the 0x8000001e leaf. Link: https://github.com/qemu/qemu/commit/35ac5dfbcaa4b [1] Debugged-by: Naveen N Rao (AMD) Debugged-by: Sairaj Kodilkar Fixes: c749ce393b8f ("x86/cpu: Use common topology code for AMD") Signed-off-by: K Prateek Nayak Tested-by: Naveen N Rao (AMD) --- arch/x86/kernel/cpu/topology_amd.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/topology_amd.c b/arch/x86/kernel/cpu/topol= ogy_amd.c index fec849fff82f..2ff6988e020a 100644 --- a/arch/x86/kernel/cpu/topology_amd.c +++ b/arch/x86/kernel/cpu/topology_amd.c @@ -80,7 +80,13 @@ static bool parse_8000_001e(struct topo_scan *tscan, boo= l has_topoext) =20 cpuid_leaf(0x8000001e, &leaf); =20 - tscan->c->topo.initial_apicid =3D leaf.ext_apic_id; + /* + * Prefer initial_apicid parsed from CPUID leaf 0x8000026 or 0xb + * if available. Otherwise prefer the one from leaf 0x8000001e + * over 0x1. + */ + if (!has_topoext) + tscan->c->topo.initial_apicid =3D leaf.ext_apic_id; =20 /* * If leaf 0xb is available, then the domain shifts are set --=20 2.34.1