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Shenoy" , Babu Moger , "Suravee Suthikulpanit" , K Prateek Nayak Subject: [PATCH 1/2] x86/cpu/topology: Always try cpu_parse_topology_ext() on AMD/Hygon Date: Thu, 12 Jun 2025 07:29:20 +0000 Message-ID: <20250612072921.15107-2-kprateek.nayak@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250612072921.15107-1-kprateek.nayak@amd.com> References: <20250612072921.15107-1-kprateek.nayak@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF00017099:EE_|PH7PR12MB7890:EE_ X-MS-Office365-Filtering-Correlation-Id: c69199b1-6410-40e4-a3c0-08dda982f2de X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|1800799024|376014|13003099007; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?hDz1ggtNND//GHmXtAIpcK8NKlV0ws0dlB2MfWBq6GQOH4EOnwqdNrXV+G2N?= =?us-ascii?Q?yYfti1+pGikDmEpr9RnHhkMGZoAYWmYvxokYnONC74eqtUlspVMjRM5oPD+B?= =?us-ascii?Q?R6wBrls+J5Np1ypQkeU8ZcAfhTu8mcZTlIYjnCophOYp7h3U9GAFxZ52XMIP?= =?us-ascii?Q?KTXyQufgxGu3QELLCHE1ty8Uams1mYC3MaLOw8RKY78Kz+X31uC88xVz92AX?= =?us-ascii?Q?Bsw9nHg0/hWNMMO3kNZsyGLqOdXceo1AV35D/UiupRkV1AE4zKEztYbB+5yU?= =?us-ascii?Q?ESCzP5Hme69+O8ovecFlZEqyaSyJqcvJAwfZxmnBSaf3/EGFf/vRBQPx6TXY?= =?us-ascii?Q?nUd3z3/yC1L6/C9PGIZbFMKzMJbS1xMSbvUkWkiael/nF1XpMFis3Mz+Jtqh?= =?us-ascii?Q?S3K2d4vzeHlS3abT3XEwRbSA1YpsRMs4FlWZ69rpAQIs+UxBWTFwAbwvUTmK?= =?us-ascii?Q?Sd43CG/DErXHpYf1BqJt6YTk54Kj0iXGQZF7jEd8aJjWuF1JU47daRYFCjOD?= =?us-ascii?Q?8oNKUD6YQJon+sCuG5TijTRKxFhLu2NWhOMOzJgwp5IA3j8iegvH/jU2wTwu?= =?us-ascii?Q?zLNQRQVC1KvGBcBjLuhqQ4tmwdyNJ9kGvP9vmscqPzvdzy2HCOOQmUGak1YO?= =?us-ascii?Q?Syn9luTU6UgxLjnRmgRGyBB+ScIY9p1Yab/OJjX4UtQ7I4SK2cfX5LhtOB+B?= =?us-ascii?Q?YcBWy8aHrknHvVhpuX1uKbL29x28N5rUHI0UGKK8ImVZODVHFTR+2iNABFSn?= =?us-ascii?Q?2Ct5oHb1d5Zbon38S3gzf7jYYRnzNQL+y12uluOgAbjvlznKWIdrp5hhPaQe?= =?us-ascii?Q?s+R9ahdvAHLmXK2azpzxC3t7w5qHAEdqWxzFlU0jN4AC7SJWly9ve/xtEzuH?= =?us-ascii?Q?TyPfaySKErjEsC7y7ON7pA9tNDFJw7B3M3iTuJ+EU7O4rbdlMm1rBSLICmrm?= =?us-ascii?Q?kUWufn/mB0PZKK4GeuW6l9c526DfITqVZC2ns8J+Tj0PA0eaVFbEusOxVM97?= =?us-ascii?Q?Hu2UrRSe3YwJ4QeRuC6va3jUy7clf4nG45GftenDKouhAOwoiLJ+1jTyw7Y4?= =?us-ascii?Q?kIzRILohKkPuuuqDytUtse8HZO8HzeEBhlXN8liX27Zc2301FdncsU+lasRt?= =?us-ascii?Q?ltxIHNafNnYN4q31NDtyjkJZgnXvREViIqPzCHh6ACsPqtTKBNGcuJ83Zd6y?= =?us-ascii?Q?86r5hP7rYzs2CZe+/gmaT/Q9MfWwyhtvidDejm3aeq5S5gQACEjP0MeWIecn?= =?us-ascii?Q?5i3t15M1bRxDNxTJL+XIg4V9u1/AT84QTRnvyVeMjC0nUjktw0Cv2QOKG5rA?= =?us-ascii?Q?hzdwA0UG15WW1RnEpMAXZZ3/bH8pcHKmmnCWptneaBSmQoDtY06gl25nhE6t?= =?us-ascii?Q?1hUdxlebRn2q88IO/tU4l8UdfQ6Oyj9VZ6Y47pTBF4v37Po0tBAlv3z1VxfK?= =?us-ascii?Q?mP9jJ1vwob0MikFqVKLxOcfY88hohcVA7GdC7ugTL29jrj4MsPBW4/ovnwVN?= =?us-ascii?Q?SY6FSrD2TJg2YV0D1qPII4ioThQr0iT5tpXMDjAwBJ6pZUjB+i1X5Zx5rQ?= =?us-ascii?Q?=3D=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014)(13003099007);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jun 2025 07:30:04.1174 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c69199b1-6410-40e4-a3c0-08dda982f2de X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF00017099.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7890 Content-Type: text/plain; charset="utf-8" Support for parsing the topology on AMD/Hygon processors using CPUID leaf 0xb was added in commit 3986a0a805e6 ("x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available"). In an effort to keep all the topology parsing bits in one place, this commit also introduced a pseudo dependency on the TOPOEXT feature to parse the CPUID leaf 0xb. TOPOEXT feature (CPUID 0x80000001 ECX[22]) advertises the support for Cache Properties leaf 0x8000001d and the CPUID leaf 0x8000001e EAX for "Extended APIC ID" however support for 0xb was introduced alongside the x2APIC support not only on AMD [1], but also historically on x86 [2]. Similar to 0xb, the support for extended CPU topology leaf 0x80000026 too does not depend on the TOPOEXT feature. The support for these leaves is expected to be confirmed by ensuring "leaf <=3D {extended_}cpuid_level" and then parsing the level 0 of the respective leaf to confirm ECX[15:8] (LevelType) is non-zero. This has not been a problem on baremetal platforms since support for TOPOEXT (Fam 0x15 and later) predates the support for CPUID leaf 0xb (Fam 0x17[Zen2] and later), however, for AMD guests on QEMU, "x2apic" feature can be enabled independent of the "topoext" feature where QEMU expects topology and the initial APICID to be parsed using the CPUID leaf 0xb (especially when number of cores > 255) which is populated independent of the "topoext" feature flag. Unconditionally call cpu_parse_topology_ext() on AMD and Hygon processors to first parse the topology using the XTOPOEXT leaves before using the TOPOEXT leaf. Link: https://lore.kernel.org/lkml/1529686927-7665-1-git-send-email-suravee= .suthikulpanit@amd.com/ [1] Link: https://lore.kernel.org/lkml/20080818181435.523309000@linux-os.sc.int= el.com/ [2] Suggested-by: Naveen N Rao (AMD) Signed-off-by: K Prateek Nayak --- arch/x86/kernel/cpu/topology_amd.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/x86/kernel/cpu/topology_amd.c b/arch/x86/kernel/cpu/topol= ogy_amd.c index 03b3c9c3a45e..fec849fff82f 100644 --- a/arch/x86/kernel/cpu/topology_amd.c +++ b/arch/x86/kernel/cpu/topology_amd.c @@ -169,18 +169,14 @@ static void topoext_fixup(struct topo_scan *tscan) =20 static void parse_topology_amd(struct topo_scan *tscan) { - bool has_topoext =3D false; - /* - * If the extended topology leaf 0x8000_001e is available - * try to get SMT, CORE, TILE, and DIE shifts from extended + * Try to get SMT, CORE, TILE, and DIE shifts from extended * CPUID leaf 0x8000_0026 on supported processors first. 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Shenoy" , Babu Moger , "Suravee Suthikulpanit" , K Prateek Nayak Subject: [PATCH 2/2] x86/cpu/topology: Use initial APICID from XTOPOEXT on AMD/HYGON Date: Thu, 12 Jun 2025 07:29:21 +0000 Message-ID: <20250612072921.15107-3-kprateek.nayak@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250612072921.15107-1-kprateek.nayak@amd.com> References: <20250612072921.15107-1-kprateek.nayak@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0001709D:EE_|DS5PPFE52C859EE:EE_ X-MS-Office365-Filtering-Correlation-Id: 00c5aa79-f803-4ad2-9bca-08dda982fd29 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|1800799024|82310400026|13003099007; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?45d9lp5aqtg/Ab8WfS1I+wpGzB871zzPB/K8Gy7A9msEwABJKGsGv0qNG2NE?= =?us-ascii?Q?/JGHTq8W2GMyFh1MtFwiDhbNX7+Cy0GMhNNEq3rPEiUv+jW8gifbALHguIZT?= =?us-ascii?Q?2dNiOa6Wcgdl47uLxdfd2ydltrb5qgpWDpb3m/5p/H49Fg1O7jaWw1BWQ3x+?= =?us-ascii?Q?rdKOQq5fS4GYglWmgn+OdXOTdraCyz9tFyt5cj0z4t2+Ik5atdykGYzTSPrH?= =?us-ascii?Q?aN62lyNXhIeziVH4s1w4PJphbYzmRyJ9R+yAlYlKt6nty2Blypt+ntLzCGHl?= =?us-ascii?Q?lqaczv7oNkVVZH9JP1M2Ny6Kj2Z31nd2WRHZENxEVdMUv3ewiwhACNdfZJQn?= =?us-ascii?Q?0cyaOWlJfeF2jAE5hpYA+A+hsnmUw8CBfK6+i0nl0NVr+3OtK5ga3bjMNyJ/?= =?us-ascii?Q?PLea21hqp0fJKt1IX3i71kYODbG0C8mOxwr93C6ZRHSQ67zsxbRcFlpAjv7a?= =?us-ascii?Q?UWeFQwgKLSV+V4Cmz7hGUUTJc/h0KLbMzaJuMzviY4HrTikxtWnHk18lJqk5?= =?us-ascii?Q?cZvxdzX4LolaIp6/rw9wvblMh8MelM2FZZJO5snk4iNaNHskmJnkUZCnUQIp?= =?us-ascii?Q?bOhiHrpihDBbcw3Ffn1116vtoZwBRwB9KY2rxOXB7DxohntlUW99uf6H8rSL?= =?us-ascii?Q?bVn5PppA1cxHA9rNZY5c5NV1ytvFYeVC2bwqGLajifK7uue5OeZofHgzu27P?= =?us-ascii?Q?pS4nZzCQEjp9Gu4aJw1py/0S9xyf4VBfDY2Wp2om5x4y3Aloo1kf/CXTngv8?= =?us-ascii?Q?5UT5qU51fBD4gw8QYXmAflmHNLoxFsGeR+gVXHVI4FRtNvwlef1WU6sDp3gN?= =?us-ascii?Q?JMoUjaUQYraOVMn7shDC+rgzBXGX7H7XHyDVcLEY1HpriOlpIZwnZP3gGedb?= =?us-ascii?Q?vUkGZ2xYCR6jrCnSMpAdEkET4YYGOf/kC2+cGyNLk5bUsUqni7E2LQLWhQYa?= =?us-ascii?Q?4izOUwJznoJk1xa7Etbb6fl54n7oHSZO8ie7zvU0axBnOmeegZ3c1zXPTGaW?= =?us-ascii?Q?+tsdpfnnlmVPuKcDDC73+lM9Uf3WRz4mv0zveTFFnxQJUu6Vks/e+X+BV5bB?= =?us-ascii?Q?8sLHyIeTI9VE1P4lQSJLj/EJqSbq7N1A0PKfVVBRGz1DA2pSOazYqZiIawq7?= =?us-ascii?Q?bLkzW2kojZqXp9avmqdfLTBx+4rQ7v6Of7Pyn98SuM3sf1jkYVEqNC5VyKZz?= =?us-ascii?Q?HUErxvRcPkqGegrlFZWWYmUJUtBs4kpt0Jyu1tIlIR0FJCelCrt1qU1nYj6e?= =?us-ascii?Q?tZXwdIq8+mtAqlxosGsyhYS8EQle/7ITrJoScnMSYgf7rrECcpnykXVeYFnO?= =?us-ascii?Q?TjIMO7G9HahKfCTGQRXQbU/Y8lyakR24S7TrwEu8uDtt8vzWdmhW3t+GeKr8?= =?us-ascii?Q?RnuJk8qQI9RL5HIvFi43DjosIs+gH9FphyWoFd+bPpMbMgavAo2LGocgzjTW?= =?us-ascii?Q?MZADi+/vB5+Mt2wccbKJsypGT1PVCgIqJO8EchR/hQyttkoEUGB06f7/cW3d?= =?us-ascii?Q?v8NKWTeh2u9CZrWdy0OkS7CDb/mjdCRsMGKK?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700013)(1800799024)(82310400026)(13003099007);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jun 2025 07:30:21.3884 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 00c5aa79-f803-4ad2-9bca-08dda982fd29 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0001709D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS5PPFE52C859EE Content-Type: text/plain; charset="utf-8" Prior to the topology parsing rewrite and the switchover to the new parsing logic for AMD processors in commit c749ce393b8f ("x86/cpu: Use common topology code for AMD"), the "initial_apicid" on these platforms was: - First initialized to the LocalApicId from CPUID leaf 0x1 EBX[31:24]. - Then overwritten by the ExtendedLocalApicId in CPUID leaf 0xb EDX[31:0] on processors that supported topoext. With the new parsing flow introduced in commit f7fb3b2dd92c ("x86/cpu: Provide an AMD/HYGON specific topology parser"), parse_8000_001e() now unconditionally overwrites the "initial_apicid" already parsed during cpu_parse_topology_ext(). Although this has not been a problem on baremetal platforms, on virtualized AMD guests that feature more than 255 cores, QEMU 0's out the CPUID leaf 0x8000001e on CPUs with "CoreID" > 255 to prevent collision of these IDs in EBX[7:0] which can only represent a maximum of 255 cores [1]. This results in the following FW_BUG being logged when booting a guest with more than 255 cores: [Firmware Bug]: CPU 512: APIC ID mismatch. CPUID: 0x0000 APIC: 0x0200 Rely on the APICID parsed during cpu_parse_topology_ext() from CPUID leaf 0x80000026 or 0xb and only use the APICID from leaf 0x8000001e if cpu_parse_topology_ext() failed (has_topoext is false). On platforms that support the 0xb leaf (Zen2 or later, AMD guests on QEMU) or the extended leaf 0x80000026 (Zen4 or later), the "initial_apicid" is now set to the value parsed from EDX[31:0]. On older AMD/Hygon platforms that does not support the 0xb leaf but supports the TOPOEXT extension (Fam 0x15, 0x16, 0x17[Zen1], and Hygon), the current behavior is retained where "initial_apicid" is set using the 0x8000001e leaf. Link: https://github.com/qemu/qemu/commit/35ac5dfbcaa4b [1] Debugged-by: Naveen N Rao (AMD) Debugged-by: Sairaj Kodilkar Fixes: c749ce393b8f ("x86/cpu: Use common topology code for AMD") Signed-off-by: K Prateek Nayak Tested-by: Naveen N Rao (AMD) --- arch/x86/kernel/cpu/topology_amd.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/topology_amd.c b/arch/x86/kernel/cpu/topol= ogy_amd.c index fec849fff82f..2ff6988e020a 100644 --- a/arch/x86/kernel/cpu/topology_amd.c +++ b/arch/x86/kernel/cpu/topology_amd.c @@ -80,7 +80,13 @@ static bool parse_8000_001e(struct topo_scan *tscan, boo= l has_topoext) =20 cpuid_leaf(0x8000001e, &leaf); =20 - tscan->c->topo.initial_apicid =3D leaf.ext_apic_id; + /* + * Prefer initial_apicid parsed from CPUID leaf 0x8000026 or 0xb + * if available. Otherwise prefer the one from leaf 0x8000001e + * over 0x1. + */ + if (!has_topoext) + tscan->c->topo.initial_apicid =3D leaf.ext_apic_id; =20 /* * If leaf 0xb is available, then the domain shifts are set --=20 2.34.1