From nobody Sat Oct 11 04:13:36 2025 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F22E120CCE5; Thu, 12 Jun 2025 07:16:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749712566; cv=none; b=NqbLpKvuX0H5I9AaHyQ39BKxaQK8MYsPpRmuHXLxbD2UK0CNhX3zlK4S2tTLpRmhVl1Ppt7kJWJJFf85dZjlaw6L3DUcgfdU2rF5DlhxWCbsIjlFug6L6IVYhHoPEAoBz1m0m6CnfnwTeFx5H6XeZtWpNtKTkwZaZaCbJ+u5Trg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749712566; c=relaxed/simple; bh=WXKU0aEz8FEyIgO2wKwEgntNjsZ2DLofsMnWQwwEAIY=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=kKy+RxO0iDy8q3iBm5T8i/MqtAs1a5VZCpCwPefPhIKdRjgaMeTw+x52G8E5QSuO3qRUXHJA4Kopkkc7Fj3WXR73OOZEdX8AMwJI4cMhKn/6SdkiEC4ge/YJ/aWP2ChRnVtCO/3944EryhwEZbbssuO1eotRsqS+mgt0XhsFkaM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=vjEC6K+y; arc=none smtp.client-ip=198.47.19.246 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="vjEC6K+y" Received: from fllvem-sh04.itg.ti.com ([10.64.41.54]) by fllvem-ot04.ext.ti.com (8.15.2/8.15.2) with ESMTP id 55C7G0Tw1615135; Thu, 12 Jun 2025 02:16:00 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1749712560; bh=KVLlEqQa1poXEgM2Nxl4MDS4aHX2mENQctaecBIqmhU=; h=From:To:Subject:Date:In-Reply-To:References; b=vjEC6K+y5p+CmRlhTEmcRWqMRtAAi0hAbCW+ulYfvbX4xp9+WfNzxVzEyuDjBdOrK gz56HBrIAl3q0tlGcHz2TtiJMTO25dgkaJMqkPeZR1DsXM0QChtD+vMPnfmeedTOBR 0LsSyTRDE9hat75y4osE1YFcYtUaKsaUhd7gI+hk= Received: from DFLE110.ent.ti.com (dfle110.ent.ti.com [10.64.6.31]) by fllvem-sh04.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 55C7FxrM1740448 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Thu, 12 Jun 2025 02:16:00 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Thu, 12 Jun 2025 02:15:59 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Thu, 12 Jun 2025 02:15:59 -0500 Received: from uda0498651.dhcp.ti.com (uda0498651.dhcp.ti.com [172.24.227.7]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 55C7FTKR1608959; Thu, 12 Jun 2025 02:15:55 -0500 From: Sai Sree Kartheek Adivi To: Peter Ujfalusi , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nishanth Menon , Santosh Shilimkar , Sai Sree Kartheek Adivi , , , , , , , , , Subject: [PATCH v2 05/17] dmaengine: ti: k3-udma: move ring management functions to k3-udma-common.c Date: Thu, 12 Jun 2025 12:45:09 +0530 Message-ID: <20250612071521.3116831-6-s-adivi@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250612071521.3116831-1-s-adivi@ti.com> References: <20250612071521.3116831-1-s-adivi@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Relocate the ring management functions such as push, pop, and reset from k3-udma.c to k3-udma-common.c file. These operations are common across multiple K3 UDMA variants and will be reused by future implementations like K3 UDMA v2. No functional changes intended. Signed-off-by: Sai Sree Kartheek Adivi --- drivers/dma/ti/k3-udma-common.c | 100 ++++++++++++++++++++++++++++++++ drivers/dma/ti/k3-udma.c | 100 -------------------------------- drivers/dma/ti/k3-udma.h | 4 ++ 3 files changed, 104 insertions(+), 100 deletions(-) diff --git a/drivers/dma/ti/k3-udma-common.c b/drivers/dma/ti/k3-udma-commo= n.c index f719adb781f88..35a3149f03232 100644 --- a/drivers/dma/ti/k3-udma-common.c +++ b/drivers/dma/ti/k3-udma-common.c @@ -1231,3 +1231,103 @@ void udma_desc_pre_callback(struct virt_dma_chan *v= c, } } =20 +int udma_push_to_ring(struct udma_chan *uc, int idx) +{ + struct udma_desc *d =3D uc->desc; + struct k3_ring *ring =3D NULL; + dma_addr_t paddr; + + switch (uc->config.dir) { + case DMA_DEV_TO_MEM: + ring =3D uc->rflow->fd_ring; + break; + case DMA_MEM_TO_DEV: + case DMA_MEM_TO_MEM: + ring =3D uc->tchan->t_ring; + break; + default: + return -EINVAL; + } + + /* RX flush packet: idx =3D=3D -1 is only passed in case of DEV_TO_MEM */ + if (idx =3D=3D -1) { + paddr =3D udma_get_rx_flush_hwdesc_paddr(uc); + } else { + paddr =3D udma_curr_cppi5_desc_paddr(d, idx); + + wmb(); /* Ensure that writes are not moved over this point */ + } + + return k3_ringacc_ring_push(ring, &paddr); +} + +int udma_pop_from_ring(struct udma_chan *uc, dma_addr_t *addr) +{ + struct k3_ring *ring =3D NULL; + int ret; + + switch (uc->config.dir) { + case DMA_DEV_TO_MEM: + ring =3D uc->rflow->r_ring; + break; + case DMA_MEM_TO_DEV: + case DMA_MEM_TO_MEM: + ring =3D uc->tchan->tc_ring; + break; + default: + return -ENOENT; + } + + ret =3D k3_ringacc_ring_pop(ring, addr); + if (ret) + return ret; + + rmb(); /* Ensure that reads are not moved before this point */ + + /* Teardown completion */ + if (cppi5_desc_is_tdcm(*addr)) + return 0; + + /* Check for flush descriptor */ + if (udma_desc_is_rx_flush(uc, *addr)) + return -ENOENT; + + return 0; +} + +void udma_reset_rings(struct udma_chan *uc) +{ + struct k3_ring *ring1 =3D NULL; + struct k3_ring *ring2 =3D NULL; + + switch (uc->config.dir) { + case DMA_DEV_TO_MEM: + if (uc->rchan) { + ring1 =3D uc->rflow->fd_ring; + ring2 =3D uc->rflow->r_ring; + } + break; + case DMA_MEM_TO_DEV: + case DMA_MEM_TO_MEM: + if (uc->tchan) { + ring1 =3D uc->tchan->t_ring; + ring2 =3D uc->tchan->tc_ring; + } + break; + default: + break; + } + + if (ring1) + k3_ringacc_ring_reset_dma(ring1, + k3_ringacc_ring_get_occ(ring1)); + if (ring2) + k3_ringacc_ring_reset(ring2); + + /* make sure we are not leaking memory by stalled descriptor */ + if (uc->terminated_desc) { + udma_desc_free(&uc->terminated_desc->vd); + uc->terminated_desc =3D NULL; + } +} + diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index 71b8e27d5a59d..efbd16dc3f931 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -174,106 +174,6 @@ static bool udma_is_chan_paused(struct udma_chan *uc) return false; } =20 -static int udma_push_to_ring(struct udma_chan *uc, int idx) -{ - struct udma_desc *d =3D uc->desc; - struct k3_ring *ring =3D NULL; - dma_addr_t paddr; - - switch (uc->config.dir) { - case DMA_DEV_TO_MEM: - ring =3D uc->rflow->fd_ring; - break; - case DMA_MEM_TO_DEV: - case DMA_MEM_TO_MEM: - ring =3D uc->tchan->t_ring; - break; - default: - return -EINVAL; - } - - /* RX flush packet: idx =3D=3D -1 is only passed in case of DEV_TO_MEM */ - if (idx =3D=3D -1) { - paddr =3D udma_get_rx_flush_hwdesc_paddr(uc); - } else { - paddr =3D udma_curr_cppi5_desc_paddr(d, idx); - - wmb(); /* Ensure that writes are not moved over this point */ - } - - return k3_ringacc_ring_push(ring, &paddr); -} - -static int udma_pop_from_ring(struct udma_chan *uc, dma_addr_t *addr) -{ - struct k3_ring *ring =3D NULL; - int ret; - - switch (uc->config.dir) { - case DMA_DEV_TO_MEM: - ring =3D uc->rflow->r_ring; - break; - case DMA_MEM_TO_DEV: - case DMA_MEM_TO_MEM: - ring =3D uc->tchan->tc_ring; - break; - default: - return -ENOENT; - } - - ret =3D k3_ringacc_ring_pop(ring, addr); - if (ret) - return ret; - - rmb(); /* Ensure that reads are not moved before this point */ - - /* Teardown completion */ - if (cppi5_desc_is_tdcm(*addr)) - return 0; - - /* Check for flush descriptor */ - if (udma_desc_is_rx_flush(uc, *addr)) - return -ENOENT; - - return 0; -} - -static void udma_reset_rings(struct udma_chan *uc) -{ - struct k3_ring *ring1 =3D NULL; - struct k3_ring *ring2 =3D NULL; - - switch (uc->config.dir) { - case DMA_DEV_TO_MEM: - if (uc->rchan) { - ring1 =3D uc->rflow->fd_ring; - ring2 =3D uc->rflow->r_ring; - } - break; - case DMA_MEM_TO_DEV: - case DMA_MEM_TO_MEM: - if (uc->tchan) { - ring1 =3D uc->tchan->t_ring; - ring2 =3D uc->tchan->tc_ring; - } - break; - default: - break; - } - - if (ring1) - k3_ringacc_ring_reset_dma(ring1, - k3_ringacc_ring_get_occ(ring1)); - if (ring2) - k3_ringacc_ring_reset(ring2); - - /* make sure we are not leaking memory by stalled descriptor */ - if (uc->terminated_desc) { - udma_desc_free(&uc->terminated_desc->vd); - uc->terminated_desc =3D NULL; - } -} - static void udma_decrement_byte_counters(struct udma_chan *uc, u32 val) { if (uc->desc->dir =3D=3D DMA_DEV_TO_MEM) { diff --git a/drivers/dma/ti/k3-udma.h b/drivers/dma/ti/k3-udma.h index 318fdcd91277f..edff919b8b347 100644 --- a/drivers/dma/ti/k3-udma.h +++ b/drivers/dma/ti/k3-udma.h @@ -608,6 +608,10 @@ void udma_desc_pre_callback(struct virt_dma_chan *vc, struct virt_dma_desc *vd, struct dmaengine_result *result); =20 +int udma_push_to_ring(struct udma_chan *uc, int idx); +int udma_pop_from_ring(struct udma_chan *uc, dma_addr_t *addr); +void udma_reset_rings(struct udma_chan *uc); + /* Direct access to UDMA low lever resources for the glue layer */ int xudma_navss_psil_pair(struct udma_dev *ud, u32 src_thread, u32 dst_thr= ead); int xudma_navss_psil_unpair(struct udma_dev *ud, u32 src_thread, --=20 2.34.1