From nobody Mon Feb 9 16:16:56 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id CB4DD1EFF8D; Thu, 12 Jun 2025 03:36:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749699368; cv=none; b=Ww267lYjTA/ZM+2glpkamIKfbsw048jkl4X7ex48wsZFTy+n6iaTBocRLjKuZhYbUz0rCuTi7QRslIIL4cWXVRJaAzkMC8mu5Sze4zTuZ1bGyHzEyc1Sh/CRySa8DTzD32tcexwkPDhaq6p6ScraqKmPSydUPy5QJeuOzIYznGc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749699368; c=relaxed/simple; bh=uMLZZIGntfima+Z+v7TifEE3E+4sqrRZ2e8DOcSjaoU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=kehYj1p32Tc87BYeVOuyVXxLz8e8DjoUWtWk1nV/0eJt6XGUdS5IBVVHwP1vkcERVxO2d8mqisfBmnYe+37YKYABQUQzFdLKZ1QazZjD948/lXjcuZP3wQIO7yHRQLpNxOTC3ak00Q8QxDI+wWzjzEJ5Sx8S8dFpiQIbEFAcyzE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 55ECA1595; Wed, 11 Jun 2025 20:35:46 -0700 (PDT) Received: from a076716.blr.arm.com (a076716.blr.arm.com [10.164.21.47]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 544983F66E; Wed, 11 Jun 2025 20:36:02 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Mark Rutland , Ada Couprie Diaz , Marc Zyngier , Oliver Upton , Joey Gouly , linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: [PATCH V4 2/2] KVM: selftests: Change MDSCR_EL1 register holding variables as uint64_t Date: Thu, 12 Jun 2025 09:05:47 +0530 Message-Id: <20250612033547.480952-3-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250612033547.480952-1-anshuman.khandual@arm.com> References: <20250612033547.480952-1-anshuman.khandual@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Change MDSCR_EL1 register holding local variables as uint64_t that reflects its true register width as well. Cc: Marc Zyngier Cc: Oliver Upton Cc: Joey Gouly Cc: kvm@vger.kernel.org Cc: kvmarm@lists.linux.dev Cc: linux-kernel@vger.kernel.org Cc: linux-kselftest@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Reviewed-by: Ada Couprie Diaz Signed-off-by: Anshuman Khandual --- tools/testing/selftests/kvm/arm64/debug-exceptions.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/kvm/arm64/debug-exceptions.c b/tools/t= esting/selftests/kvm/arm64/debug-exceptions.c index c7fb55c9135b..e34963956fbc 100644 --- a/tools/testing/selftests/kvm/arm64/debug-exceptions.c +++ b/tools/testing/selftests/kvm/arm64/debug-exceptions.c @@ -140,7 +140,7 @@ static void enable_os_lock(void) =20 static void enable_monitor_debug_exceptions(void) { - uint32_t mdscr; + uint64_t mdscr; =20 asm volatile("msr daifclr, #8"); =20 @@ -223,7 +223,7 @@ void install_hw_bp_ctx(uint8_t addr_bp, uint8_t ctx_bp,= uint64_t addr, =20 static void install_ss(void) { - uint32_t mdscr; + uint64_t mdscr; =20 asm volatile("msr daifclr, #8"); =20 --=20 2.25.1