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Thu, 12 Jun 2025 05:19:58 -0700 (PDT) From: Bartosz Golaszewski Date: Thu, 12 Jun 2025 14:19:53 +0200 Subject: [PATCH 1/2] pinctrl: cirrus: lochnagar: use new GPIO line value setter callbacks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250612-gpiochip-set-rv-pinctrl-cirrus-v1-1-2d45c1f92557@linaro.org> References: <20250612-gpiochip-set-rv-pinctrl-cirrus-v1-0-2d45c1f92557@linaro.org> In-Reply-To: <20250612-gpiochip-set-rv-pinctrl-cirrus-v1-0-2d45c1f92557@linaro.org> To: Charles Keepax , Richard Fitzgerald , Linus Walleij , Bartosz Golaszewski , David Rhodes Cc: patches@opensource.cirrus.com, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2693; i=bartosz.golaszewski@linaro.org; h=from:subject:message-id; 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Convert the driver to using them. Signed-off-by: Bartosz Golaszewski Reviewed-by: Charles Keepax --- drivers/pinctrl/cirrus/pinctrl-lochnagar.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/drivers/pinctrl/cirrus/pinctrl-lochnagar.c b/drivers/pinctrl/c= irrus/pinctrl-lochnagar.c index 0f32866a4aef2c84b99f3c56374d8dfd9150b024..dcc0a2f3c7dd56d3975c54ef3dc= 2726b938e4480 100644 --- a/drivers/pinctrl/cirrus/pinctrl-lochnagar.c +++ b/drivers/pinctrl/cirrus/pinctrl-lochnagar.c @@ -1058,13 +1058,12 @@ static const struct pinctrl_desc lochnagar_pin_desc= =3D { .confops =3D &lochnagar_pin_conf_ops, }; =20 -static void lochnagar_gpio_set(struct gpio_chip *chip, - unsigned int offset, int value) +static int lochnagar_gpio_set(struct gpio_chip *chip, + unsigned int offset, int value) { struct lochnagar_pin_priv *priv =3D gpiochip_get_data(chip); struct lochnagar *lochnagar =3D priv->lochnagar; const struct lochnagar_pin *pin =3D priv->pins[offset].drv_data; - int ret; =20 value =3D !!value; =20 @@ -1075,29 +1074,31 @@ static void lochnagar_gpio_set(struct gpio_chip *ch= ip, case LN_PTYPE_MUX: value |=3D LN2_OP_GPIO; =20 - ret =3D lochnagar_pin_set_mux(priv, pin, value); + return lochnagar_pin_set_mux(priv, pin, value); break; case LN_PTYPE_GPIO: if (pin->invert) value =3D !value; =20 - ret =3D regmap_update_bits(lochnagar->regmap, pin->reg, - BIT(pin->shift), value << pin->shift); + return regmap_update_bits(lochnagar->regmap, pin->reg, + BIT(pin->shift), + value << pin->shift); break; default: - ret =3D -EINVAL; break; } =20 - if (ret < 0) - dev_err(chip->parent, "Failed to set %s value: %d\n", - pin->name, ret); + return -EINVAL; } =20 static int lochnagar_gpio_direction_out(struct gpio_chip *chip, unsigned int offset, int value) { - lochnagar_gpio_set(chip, offset, value); + int ret; + + ret =3D lochnagar_gpio_set(chip, offset, value); + if (ret) + return ret; =20 return pinctrl_gpio_direction_output(chip, offset); } @@ -1160,7 +1161,7 @@ static int lochnagar_pin_probe(struct platform_device= *pdev) priv->gpio_chip.request =3D gpiochip_generic_request; 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Thu, 12 Jun 2025 05:20:00 -0700 (PDT) Received: from [127.0.1.1] ([2a01:cb1d:dc:7e00:8b99:9926:3892:5310]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4532de8c229sm19636035e9.6.2025.06.12.05.19.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Jun 2025 05:19:59 -0700 (PDT) From: Bartosz Golaszewski Date: Thu, 12 Jun 2025 14:19:54 +0200 Subject: [PATCH 2/2] pinctrl: cirrus: cs42l43: use new GPIO line value setter callbacks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250612-gpiochip-set-rv-pinctrl-cirrus-v1-2-2d45c1f92557@linaro.org> References: <20250612-gpiochip-set-rv-pinctrl-cirrus-v1-0-2d45c1f92557@linaro.org> In-Reply-To: <20250612-gpiochip-set-rv-pinctrl-cirrus-v1-0-2d45c1f92557@linaro.org> To: Charles Keepax , Richard Fitzgerald , Linus Walleij , Bartosz Golaszewski , David Rhodes Cc: patches@opensource.cirrus.com, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Signed-off-by: Bartosz Golaszewski Reviewed-by: Charles Keepax --- drivers/pinctrl/cirrus/pinctrl-cs42l43.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/cirrus/pinctrl-cs42l43.c b/drivers/pinctrl/cir= rus/pinctrl-cs42l43.c index 628b60ccc2b07dc77e36da8919436fa348749e0c..29ed985273eb47d06f6cf5e6e41= 078deae4cc2bb 100644 --- a/drivers/pinctrl/cirrus/pinctrl-cs42l43.c +++ b/drivers/pinctrl/cirrus/pinctrl-cs42l43.c @@ -483,7 +483,8 @@ static int cs42l43_gpio_get(struct gpio_chip *chip, uns= igned int offset) return ret; } =20 -static void cs42l43_gpio_set(struct gpio_chip *chip, unsigned int offset, = int value) +static int cs42l43_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value) { struct cs42l43_pin *priv =3D gpiochip_get_data(chip); unsigned int shift =3D offset + CS42L43_GPIO1_LVL_SHIFT; @@ -493,23 +494,27 @@ static void cs42l43_gpio_set(struct gpio_chip *chip, = unsigned int offset, int va offset + 1, str_high_low(value)); =20 ret =3D pm_runtime_resume_and_get(priv->dev); - if (ret) { - dev_err(priv->dev, "Failed to resume for set: %d\n", ret); - return; - } + if (ret) + return ret; =20 ret =3D regmap_update_bits(priv->regmap, CS42L43_GPIO_CTRL1, BIT(shift), value << shift); if (ret) - dev_err(priv->dev, "Failed to set gpio%d: %d\n", offset + 1, ret); + return ret; =20 pm_runtime_put(priv->dev); + + return 0; } =20 static int cs42l43_gpio_direction_out(struct gpio_chip *chip, unsigned int offset, int value) { - cs42l43_gpio_set(chip, offset, value); + int ret; + + ret =3D cs42l43_gpio_set(chip, offset, value); + if (ret) + return ret; =20 return pinctrl_gpio_direction_output(chip, offset); } @@ -550,7 +555,7 @@ static int cs42l43_pin_probe(struct platform_device *pd= ev) priv->gpio_chip.direction_output =3D cs42l43_gpio_direction_out; priv->gpio_chip.add_pin_ranges =3D cs42l43_gpio_add_pin_ranges; priv->gpio_chip.get =3D cs42l43_gpio_get; - priv->gpio_chip.set =3D cs42l43_gpio_set; + priv->gpio_chip.set_rv =3D cs42l43_gpio_set; priv->gpio_chip.label =3D dev_name(priv->dev); priv->gpio_chip.parent =3D priv->dev; priv->gpio_chip.can_sleep =3D true; --=20 2.48.1