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Signed-off-by: Luo Jie --- scripts/coccinelle/misc/field_modify.cocci | 61 ++++++++++++++++++++++++++= ++++ 1 file changed, 61 insertions(+) diff --git a/scripts/coccinelle/misc/field_modify.cocci b/scripts/coccinell= e/misc/field_modify.cocci new file mode 100644 index 000000000000..48b00194a265 --- /dev/null +++ b/scripts/coccinelle/misc/field_modify.cocci @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: GPL-2.0-only +/// Replace below code with the wrapper FIELD_MODIFY(MASK, ®, val) +/// - reg &=3D ~MASK; +/// - reg |=3D FIELD_PREP(MASK, val); +// +// Confidence: High +// Author: Luo Jie +// Copyright: (C) 2025 Qualcomm Innovation Center, Inc. +// Keywords: FIELD_PREP, FIELD_MODIFY +// Options: --include-headers + +virtual context +virtual patch +virtual org +virtual report + +@ depends on context && !patch && !org && !report@ +identifier reg, val; +constant mask; +symbol FIELD_PREP; +@@ + +* reg &=3D ~mask; +* reg |=3D FIELD_PREP(mask, val); + +@ depends on !context && patch && !org && !report @ +identifier reg, val; +constant mask; +symbol FIELD_PREP, FIELD_MODIFY; +@@ + +-reg &=3D ~mask; +-reg |=3D FIELD_PREP(mask, val); ++FIELD_MODIFY(mask, ®, val); + +@r depends on !context && !patch && (org || report)@ +identifier reg, val; +constant mask; +symbol FIELD_PREP; +position p; +@@ + + reg &=3D ~mask; + reg |=3D FIELD_PREP@p(mask, val); + +@script:python depends on report@ +p << r.p; +x << r.reg; +@@ + +msg=3D"WARNING: Consider using FIELD_MODIFY helper on %s" % (x) +coccilib.report.print_report(p[0], msg) + +@script:python depends on org@ +p << r.p; +x << r.reg; +@@ + +msg=3D"WARNING: Consider using FIELD_MODIFY helper on %s" % (x) +msg_safe=3Dmsg.replace("[","@(").replace("]",")") +coccilib.org.print_todo(p[0], msg_safe) --=20 2.34.1 From nobody Fri Oct 10 21:00:37 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 763EF248881 for ; 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Thu, 12 Jun 2025 13:46:28 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 55CDkRnp007216 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 12 Jun 2025 13:46:27 GMT Received: from nsssdc-sh01-lnx.ap.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 12 Jun 2025 06:46:22 -0700 From: Luo Jie Date: Thu, 12 Jun 2025 21:46:09 +0800 Subject: [PATCH v4 2/5] arm64: tlb: Convert the opencoded field modify Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250612-field_modify-v4-2-ae4f74da45a6@quicinc.com> References: <20250612-field_modify-v4-0-ae4f74da45a6@quicinc.com> In-Reply-To: <20250612-field_modify-v4-0-ae4f74da45a6@quicinc.com> To: Yury Norov , Rasmus Villemoes , Julia Lawall , "Nicolas Palix" , Catalin Marinas , Will Deacon , Marc Zyngier , Oliver Upton , Joey Gouly , Suzuki K Poulose , Zenghui Yu CC: , , , , , , , , , , Luo Jie X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; 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- reg |=3D FIELD_PREP(MASK, val); The semantic patch that makes this change is available in scripts/coccinelle/misc/field_modify.cocci. More information about semantic patching is available at http://coccinelle.lip6.fr/ Signed-off-by: Luo Jie --- arch/arm64/include/asm/tlbflush.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlb= flush.h index aa9efee17277..cdcee05bdf6d 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -112,8 +112,7 @@ static inline unsigned long get_trans_granule(void) level >=3D 0 && level <=3D 3) { \ u64 ttl =3D level & 3; \ ttl |=3D get_trans_granule() << 2; \ - arg &=3D ~TLBI_TTL_MASK; \ - arg |=3D FIELD_PREP(TLBI_TTL_MASK, ttl); \ + FIELD_MODIFY(TLBI_TTL_MASK, &arg, ttl); \ } \ \ __tlbi(op, arg); \ --=20 2.34.1 From nobody Fri Oct 10 21:00:37 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 837C0248166 for ; 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- reg |=3D FIELD_PREP(MASK, val); The semantic patch that makes this change is available in scripts/coccinelle/misc/field_modify.cocci. More information about semantic patching is available at http://coccinelle.lip6.fr/ Signed-off-by: Luo Jie --- arch/arm64/kvm/hyp/include/nvhe/memory.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/kvm/hyp/include/nvhe/memory.h b/arch/arm64/kvm/hyp/= include/nvhe/memory.h index dee1a406b0c2..c1dbea320131 100644 --- a/arch/arm64/kvm/hyp/include/nvhe/memory.h +++ b/arch/arm64/kvm/hyp/include/nvhe/memory.h @@ -37,8 +37,7 @@ enum pkvm_page_state { static inline enum kvm_pgtable_prot pkvm_mkstate(enum kvm_pgtable_prot pro= t, enum pkvm_page_state state) { - prot &=3D ~PKVM_PAGE_STATE_PROT_MASK; - prot |=3D FIELD_PREP(PKVM_PAGE_STATE_PROT_MASK, state); + FIELD_MODIFY(PKVM_PAGE_STATE_PROT_MASK, &prot, state); return prot; } =20 --=20 2.34.1 From nobody Fri Oct 10 21:00:37 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3962823E331 for ; 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- reg |=3D FIELD_PREP(MASK, val); The semantic patch that makes this change is available in scripts/coccinelle/misc/field_modify.cocci. More information about semantic patching is available at http://coccinelle.lip6.fr/ Signed-off-by: Luo Jie --- arch/arm64/kvm/vgic/vgic-mmio-v3.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm64/kvm/vgic/vgic-mmio-v3.c b/arch/arm64/kvm/vgic/vgic-= mmio-v3.c index ae4c0593d114..946db5b3500f 100644 --- a/arch/arm64/kvm/vgic/vgic-mmio-v3.c +++ b/arch/arm64/kvm/vgic/vgic-mmio-v3.c @@ -123,10 +123,8 @@ static void vgic_mmio_write_v3_misc(struct kvm_vcpu *v= cpu, val &=3D ~GICD_CTLR_nASSGIreq; =20 /* Dist stays enabled? nASSGIreq is RO */ - if (was_enabled && dist->enabled) { - val &=3D ~GICD_CTLR_nASSGIreq; - val |=3D FIELD_PREP(GICD_CTLR_nASSGIreq, is_hwsgi); - } + if (was_enabled && dist->enabled) + FIELD_MODIFY(GICD_CTLR_nASSGIreq, &val, is_hwsgi); =20 /* Switching HW SGIs? */ dist->nassgireq =3D val & GICD_CTLR_nASSGIreq; --=20 2.34.1 From nobody Fri Oct 10 21:00:37 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A844D23E331 for ; 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- reg |=3D FIELD_PREP(MASK, val); The semantic patch that makes this change is available in scripts/coccinelle/misc/field_modify.cocci. More information about semantic patching is available at http://coccinelle.lip6.fr/ Signed-off-by: Luo Jie --- arch/arm64/mm/context.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c index b2ac06246327..4fbac8e74149 100644 --- a/arch/arm64/mm/context.c +++ b/arch/arm64/mm/context.c @@ -361,8 +361,7 @@ void cpu_do_switch_mm(phys_addr_t pgd_phys, struct mm_s= truct *mm) ttbr0 |=3D FIELD_PREP(TTBR_ASID_MASK, asid); =20 /* Set ASID in TTBR1 since TCR.A1 is set */ - ttbr1 &=3D ~TTBR_ASID_MASK; - ttbr1 |=3D FIELD_PREP(TTBR_ASID_MASK, asid); + FIELD_MODIFY(TTBR_ASID_MASK, &ttbr1, asid); =20 cpu_set_reserved_ttbr0_nosync(); write_sysreg(ttbr1, ttbr1_el1); --=20 2.34.1