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AJvYcCVtADsT5djP4MHj3zZBgoLzYv8x2gt/ER5O/xyd8lei4WSEfeH7s1wE+qhuAQc2YkOc2+5sB10ztVa6B68=@vger.kernel.org X-Gm-Message-State: AOJu0YwS+kV3JQN/KO+ZHwhr11OWu4H8+rK70ExnGoz9uXBwd+x2gQg+ w64sSO3Jkk1L1/yhdxjqA8imB1kQyDFlcjUguJvD4RhiZHJoRF0c8E9JBkyriFgbIBGAFU8XG+R 94yhovA== X-Google-Smtp-Source: AGHT+IGR4w9J3onYODzU2Sfz5wEnxfVemQzL0W0aJt8YvQhN18RuJB+dzan66R+cAm17xLYHnG+IrBPZWnM= X-Received: from pgbdr17.prod.google.com ([2002:a05:6a02:fd1:b0:b2e:c00e:65ed]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a21:8cca:b0:215:d4be:b0b2 with SMTP id adf61e73a8af0-21f9b93f637mr691254637.34.1749682083132; Wed, 11 Jun 2025 15:48:03 -0700 (PDT) Reply-To: Sean Christopherson Date: Wed, 11 Jun 2025 15:45:42 -0700 In-Reply-To: <20250611224604.313496-2-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250611224604.313496-2-seanjc@google.com> X-Mailer: git-send-email 2.50.0.rc1.591.g9c95f17f64-goog Message-ID: <20250611224604.313496-41-seanjc@google.com> Subject: [PATCH v3 39/62] iommu/amd: Document which IRTE fields amd_iommu_update_ga() can modify From: Sean Christopherson To: Marc Zyngier , Oliver Upton , Sean Christopherson , Paolo Bonzini , Joerg Roedel , David Woodhouse , Lu Baolu Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Sairaj Kodilkar , Vasant Hegde , Maxim Levitsky , Joao Martins , Francesco Lavra , David Matlack Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a comment to amd_iommu_update_ga() to document what fields it can safely modify without issuing an invalidation of the IRTE, and to explain its role in keeping GA IRTEs up-to-date. Per page 93 of the IOMMU spec dated Feb 2025: When virtual interrupts are enabled by setting MMIO Offset 0018h[GAEn] and IRTE[GuestMode=3D1], IRTE[IsRun], IRTE[Destination], and if present IRTE[= GATag], are not cached by the IOMMU. Modifications to these fields do not require= an invalidation of the Interrupt Remapping Table. Link: https://lore.kernel.org/all/9b7ceea3-8c47-4383-ad9c-1a9bbdc9044a@orac= le.com Cc: Joao Martins Signed-off-by: Sean Christopherson --- drivers/iommu/amd/iommu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 36749efcc781..5adc932b947e 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -3986,6 +3986,18 @@ int amd_iommu_create_irq_domain(struct amd_iommu *io= mmu) return 0; } =20 +/* + * Update the pCPU information for an IRTE that is configured to post IRQs= to + * a vCPU, without issuing an IOMMU invalidation for the IRTE. + * + * This API is intended to be used when a vCPU is scheduled in/out (or sto= ps + * running for any reason), to do a fast update of IsRun and (conditionall= y) + * Destination. + * + * Per the IOMMU spec, the Destination, IsRun, and GATag fields are not ca= ched + * and thus don't require an invalidation to ensure the IOMMU consumes fre= sh + * information. + */ int amd_iommu_update_ga(int cpu, bool is_run, void *data) { struct amd_ir_data *ir_data =3D (struct amd_ir_data *)data; --=20 2.50.0.rc1.591.g9c95f17f64-goog