From nobody Tue Feb 10 05:26:28 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A25582BEC53; Wed, 11 Jun 2025 10:49:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749638988; cv=none; b=tocvUcIYTQC3Iy7KFcnxlnhERq9OoluqG3JXf/PqhkHxdEqe755GTSlT1hUgbWHYeaNrgIdjBNUgyzx8rAhynsyd19LiokgaVpYU5q9kaX11e5CHCm+1kWaS4PYnHlalONy/PljMYib0xpiIiOSHAYczt64GICPwPKFsaVgejrw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749638988; c=relaxed/simple; bh=3+5TFZAsAwxkZHI1hrJ/d/28E+3jv5S7AtmbStNBqvU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JlIEgbfWErGgc90q3mPndIM8B7NMhTYIK1640yiDhXI5RGHCuYopJwTjhK/3ofVcxc8ilvVCTp1u+KYADZalNXXw3PH1bXe8MiEScK62zN4FCcq8APS5ecLSgyTsRqr3pxV83AcyVg4c9N0ok1Q42NwmvAIkTapgFL1VnpR+oZk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A77CC1655; Wed, 11 Jun 2025 03:49:26 -0700 (PDT) Received: from e122027.arm.com (unknown [10.57.67.107]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2C8743F673; Wed, 11 Jun 2025 03:49:43 -0700 (PDT) From: Steven Price To: kvm@vger.kernel.org, kvmarm@lists.linux.dev Cc: Steven Price , Catalin Marinas , Marc Zyngier , Will Deacon , James Morse , Oliver Upton , Suzuki K Poulose , Zenghui Yu , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev, Ganapatrao Kulkarni , Gavin Shan , Shanker Donthineni , Alper Gun , "Aneesh Kumar K . V" , Emi Kisanuki Subject: [PATCH v9 12/43] KVM: arm64: vgic: Provide helper for number of list registers Date: Wed, 11 Jun 2025 11:48:09 +0100 Message-ID: <20250611104844.245235-13-steven.price@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250611104844.245235-1-steven.price@arm.com> References: <20250611104844.245235-1-steven.price@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Currently the number of list registers available is stored in a global (kvm_vgic_global_state.nr_lr). With Arm CCA the RMM is permitted to reserve list registers for its own use and so the number of available list registers can be fewer for a realm VM. Provide a wrapper function to fetch the global in preparation for restricting nr_lr when dealing with a realm VM. Reviewed-by: Gavin Shan Signed-off-by: Steven Price Reviewed-by: Suzuki K Poulose lock (mutex) @@ -802,7 +807,7 @@ static void vgic_flush_lr_state(struct kvm_vcpu *vcpu) lockdep_assert_held(&vgic_cpu->ap_list_lock); =20 count =3D compute_ap_list_depth(vcpu, &multi_sgi); - if (count > kvm_vgic_global_state.nr_lr || multi_sgi) + if (count > kvm_vcpu_vgic_nr_lr(vcpu) || multi_sgi) vgic_sort_ap_list(vcpu); =20 count =3D 0; @@ -831,7 +836,7 @@ static void vgic_flush_lr_state(struct kvm_vcpu *vcpu) =20 raw_spin_unlock(&irq->irq_lock); =20 - if (count =3D=3D kvm_vgic_global_state.nr_lr) { + if (count =3D=3D kvm_vcpu_vgic_nr_lr(vcpu)) { if (!list_is_last(&irq->ap_list, &vgic_cpu->ap_list_head)) vgic_set_underflow(vcpu); @@ -840,7 +845,7 @@ static void vgic_flush_lr_state(struct kvm_vcpu *vcpu) } =20 /* Nuke remaining LRs */ - for (i =3D count ; i < kvm_vgic_global_state.nr_lr; i++) + for (i =3D count; i < kvm_vcpu_vgic_nr_lr(vcpu); i++) vgic_clear_lr(vcpu, i); =20 if (!static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif)) --=20 2.43.0