From nobody Sat Oct 11 08:33:31 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 58B941885B4; Wed, 11 Jun 2025 01:47:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606427; cv=none; b=usRY5/fIfzHOOFKzPnl2UwEU97OIvIsOFQYIyjPw5Fuk0IhJgeG24bjNa7VnMQYIqIP/fvskrElGcIzJ8TfaFrlW4vyt5YBFkqYbLe6QoUiZn+M0LLXTbf5K5O1dCciaOFF5j3waJldxNfvBLW4hfO2ugUGMK1wO3W9dAAO3ZkA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606427; c=relaxed/simple; bh=JYTWJ4bzufmG4/W3c+dyWMhzf9Zd60/BveoZVPfRXoo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=KrTG9VpKNLGOT/Vdd6OIspEwQh9TzIZ9srRPyMT32hI9zeMPrwoo65+ZJPd0kWOZzY17qyePq4S5m1l8XSRoZlbOYXaXnjLUkoYexXnvINaY9RzSkEf2idVq4rxwo+VuDC1TyYoHCoapQZiPfaU0jht2sS1Ni1yS3t3eAiLMYYs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8CxqmoW4EhookITAQ--.6399S3; Wed, 11 Jun 2025 09:47:02 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCx7MQL4Eho0EoVAQ--.65102S3; Wed, 11 Jun 2025 09:47:01 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH v3 1/9] LoongArch: KVM: INTC: Fix interrupt route update with eiointc Date: Wed, 11 Jun 2025 09:46:43 +0800 Message-Id: <20250611014651.3042734-2-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250611014651.3042734-1-maobibo@loongson.cn> References: <20250611014651.3042734-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCx7MQL4Eho0EoVAQ--.65102S3 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" With function eiointc_update_sw_coremap(), there is forced assignment like val =3D *(u64 *)pvalue. Parameter pvalue may be pointer to char type or others, there is problem with forced assignment with u64 type. Here the detailed value is passed rather address pointer. Cc: stable@vger.kernel.org Fixes: 3956a52bc05b ("LoongArch: KVM: Add EIOINTC read and write functions") Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index f39929d7bf8a..d2c521b0e923 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -66,10 +66,9 @@ static void eiointc_update_irq(struct loongarch_eiointc = *s, int irq, int level) } =20 static inline void eiointc_update_sw_coremap(struct loongarch_eiointc *s, - int irq, void *pvalue, u32 len, bool notify) + int irq, u64 val, u32 len, bool notify) { int i, cpu; - u64 val =3D *(u64 *)pvalue; =20 for (i =3D 0; i < len; i++) { cpu =3D val & 0xff; @@ -398,7 +397,7 @@ static int loongarch_eiointc_writeb(struct kvm_vcpu *vc= pu, irq =3D offset - EIOINTC_COREMAP_START; index =3D irq; s->coremap.reg_u8[index] =3D data; - eiointc_update_sw_coremap(s, irq, (void *)&data, sizeof(data), true); + eiointc_update_sw_coremap(s, irq, data, sizeof(data), true); break; default: ret =3D -EINVAL; @@ -484,7 +483,7 @@ static int loongarch_eiointc_writew(struct kvm_vcpu *vc= pu, irq =3D offset - EIOINTC_COREMAP_START; index =3D irq >> 1; s->coremap.reg_u16[index] =3D data; - eiointc_update_sw_coremap(s, irq, (void *)&data, sizeof(data), true); + eiointc_update_sw_coremap(s, irq, data, sizeof(data), true); break; default: ret =3D -EINVAL; @@ -570,7 +569,7 @@ static int loongarch_eiointc_writel(struct kvm_vcpu *vc= pu, irq =3D offset - EIOINTC_COREMAP_START; index =3D irq >> 2; s->coremap.reg_u32[index] =3D data; - eiointc_update_sw_coremap(s, irq, (void *)&data, sizeof(data), true); + eiointc_update_sw_coremap(s, irq, data, sizeof(data), true); break; default: ret =3D -EINVAL; @@ -656,7 +655,7 @@ static int loongarch_eiointc_writeq(struct kvm_vcpu *vc= pu, irq =3D offset - EIOINTC_COREMAP_START; index =3D irq >> 3; s->coremap.reg_u64[index] =3D data; - eiointc_update_sw_coremap(s, irq, (void *)&data, sizeof(data), true); + eiointc_update_sw_coremap(s, irq, data, sizeof(data), true); break; default: ret =3D -EINVAL; @@ -809,7 +808,7 @@ static int kvm_eiointc_ctrl_access(struct kvm_device *d= ev, for (i =3D 0; i < (EIOINTC_IRQS / 4); i++) { start_irq =3D i * 4; eiointc_update_sw_coremap(s, start_irq, - (void *)&s->coremap.reg_u32[i], sizeof(u32), false); + s->coremap.reg_u32[i], sizeof(u32), false); } break; default: --=20 2.39.3 From nobody Sat Oct 11 08:33:31 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7CB4F1B960; Wed, 11 Jun 2025 01:47:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606429; cv=none; b=B26IBzDNzXnMt0HDyxOBnBiy+sXq69XF+FIl8++Kyvo5cbNHzvupSyMv5cIvVUMmEw3bLfmBPej+Eo+aNpDZ9x57Gtn5j7tl2vbaJttHvUEBaCn5sEDfLrX305pSaCeayLrMes+D+iLWGQ5/HfIzuQNPApYihZWSzM9GJlnfvdc= ARC-Message-Signature: i=1; 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Wed, 11 Jun 2025 09:47:03 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH v3 2/9] LoongArch: KVM: INTC: Check interrupt route from physical cpu Date: Wed, 11 Jun 2025 09:46:44 +0800 Message-Id: <20250611014651.3042734-3-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250611014651.3042734-1-maobibo@loongson.cn> References: <20250611014651.3042734-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCx7MQL4Eho0EoVAQ--.65102S4 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" With eiointc interrupt controller, physical cpu id is set for irq route. However function kvm_get_vcpu() is used to get destination vCPU when delivering irq. With API kvm_get_vcpu(), logical cpu is used. With API kvm_get_vcpu_by_cpuid(), vCPU can be searched from physical cpu id. Cc: stable@vger.kernel.org Fixes: 3956a52bc05b ("LoongArch: KVM: Add EIOINTC read and write functions") Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index d2c521b0e923..0b648c56b0c3 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -9,7 +9,8 @@ =20 static void eiointc_set_sw_coreisr(struct loongarch_eiointc *s) { - int ipnum, cpu, irq_index, irq_mask, irq; + int ipnum, cpu, irq_index, irq_mask, irq, cpuid; + struct kvm_vcpu *vcpu; =20 for (irq =3D 0; irq < EIOINTC_IRQS; irq++) { ipnum =3D s->ipmap.reg_u8[irq / 32]; @@ -20,7 +21,12 @@ static void eiointc_set_sw_coreisr(struct loongarch_eioi= ntc *s) irq_index =3D irq / 32; irq_mask =3D BIT(irq & 0x1f); =20 - cpu =3D s->coremap.reg_u8[irq]; + cpuid =3D s->coremap.reg_u8[irq]; + vcpu =3D kvm_get_vcpu_by_cpuid(s->kvm, cpuid); + if (vcpu =3D=3D NULL) + continue; + + cpu =3D vcpu->vcpu_id; if (!!(s->coreisr.reg_u32[cpu][irq_index] & irq_mask)) set_bit(irq, s->sw_coreisr[cpu][ipnum]); else @@ -68,17 +74,23 @@ static void eiointc_update_irq(struct loongarch_eiointc= *s, int irq, int level) static inline void eiointc_update_sw_coremap(struct loongarch_eiointc *s, int irq, u64 val, u32 len, bool notify) { - int i, cpu; + int i, cpu, cpuid; + struct kvm_vcpu *vcpu; =20 for (i =3D 0; i < len; i++) { - cpu =3D val & 0xff; + cpuid =3D val & 0xff; val =3D val >> 8; =20 if (!(s->status & BIT(EIOINTC_ENABLE_CPU_ENCODE))) { - cpu =3D ffs(cpu) - 1; - cpu =3D (cpu >=3D 4) ? 0 : cpu; + cpuid =3D ffs(cpuid) - 1; + cpuid =3D (cpuid >=3D 4) ? 0 : cpuid; } =20 + vcpu =3D kvm_get_vcpu_by_cpuid(s->kvm, cpuid); + if (vcpu =3D=3D NULL) + continue; + + cpu =3D vcpu->vcpu_id; if (s->sw_coremap[irq + i] =3D=3D cpu) continue; =20 --=20 2.39.3 From nobody Sat Oct 11 08:33:31 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B88E4191F95; Wed, 11 Jun 2025 01:47:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606431; cv=none; b=j1AIYk0MlS3UV/3sbv0JAncrjIQUyAjPRbMz+3iP6RA32NJ9epN6HZ8bU2PxLwtf+tjAckso8Ttx86anDTUcxp9sJbx//gViiftQhW4JXRhMP+ggBhPpS8FX4nVZNMNPOyFWsG6NkK/pjgFunzAoc9/o7UzkpgL/U6opR1/8WVY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606431; c=relaxed/simple; bh=uD27TLOkmLE97SKX+m1nAjFPEUD7oQ+EyEzUgNGPZHs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=l9YBYNoSj00xQuUi4fesUCE+DKFEJbkHtEFTnfUh6hBhyp/O2ndG2X3C2yoqSi/pqlb6uf4OOUxviM4aQftvwyXdVWyaoTcj+PVPpBP2gT4Mzi4EnnkXqqKQCR7YcLArbvyoEckf4cLqI+hrs8VAgUrZ1JZ8Azb2rZ0ebbl4CDA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8BxYa8a4EhoqUITAQ--.7282S3; Wed, 11 Jun 2025 09:47:06 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCx7MQL4Eho0EoVAQ--.65102S5; Wed, 11 Jun 2025 09:47:05 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH v3 3/9] LoongArch: KVM: INTC: Disable update property num_cpu and feature Date: Wed, 11 Jun 2025 09:46:45 +0800 Message-Id: <20250611014651.3042734-4-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250611014651.3042734-1-maobibo@loongson.cn> References: <20250611014651.3042734-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCx7MQL4Eho0EoVAQ--.65102S5 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Property num_cpu and feature is read-only once eiointc is created, which is set with KVM_DEV_LOONGARCH_EXTIOI_GRP_CTRL attr group before device creation. Attr group KVM_DEV_LOONGARCH_EXTIOI_GRP_SW_STATUS is to update register and software state for migration and reset usage, property num_cpu and feature can not be update again if it is created already. Here discard write operation with property num_cpu and feature in attr group KVM_DEV_LOONGARCH_EXTIOI_GRP_CTRL. Cc: stable@vger.kernel.org Fixes: 1ad7efa552fd ("LoongArch: KVM: Add EIOINTC user mode read and write = functions") Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index 0b648c56b0c3..b48511f903b5 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -910,9 +910,22 @@ static int kvm_eiointc_sw_status_access(struct kvm_dev= ice *dev, data =3D (void __user *)attr->addr; switch (addr) { case KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_NUM_CPU: + /* + * Property num_cpu and feature is read-only once eiointc is + * created with KVM_DEV_LOONGARCH_EXTIOI_GRP_CTRL group API + * + * Disable writing with KVM_DEV_LOONGARCH_EXTIOI_GRP_SW_STATUS + * group API + */ + if (is_write) + return ret; + p =3D &s->num_cpu; break; case KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_FEATURE: + if (is_write) + return ret; + p =3D &s->features; break; case KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_STATE: --=20 2.39.3 From nobody Sat Oct 11 08:33:31 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 972E819924E; Wed, 11 Jun 2025 01:47:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606431; cv=none; b=T6fwTGFJv/C0tZtWa+WoFwJVZVTt+Z9O9JL+sLwFODyvcaKfKBnrHkPSTyW54g4LYQC+cUZPe7lTEl1q+fuGnecG/HRdYa0K3TuvBSG32D1rR+Az7EDVFaMZkQ7MCVEawcFtvP0YPTaYWX52vgY+BEMZIrIgkb1g9SFwWrRfz24= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606431; c=relaxed/simple; bh=4dgF6RJ7bI5hBN44C1WIAmrE0lxo5AKxgJ+qtTI3OIw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ZNma1mr7s2HwRNir6ofxMR+LCe2xfZQg754VA5kf+iPePy5dg7chQWejZHj7n6hj3c2KqtiLD+rmHj3HR3oSzsrAtnFLNcb98fsFwxaGvKHoVwKy0hEtLazMiRTLEQN45RVtV3zhDiyR6jCe4R/Sk7grGIibnEsOJ1F+IFBoIJg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxOGob4EhorUITAQ--.50548S3; Wed, 11 Jun 2025 09:47:07 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCx7MQL4Eho0EoVAQ--.65102S6; Wed, 11 Jun 2025 09:47:07 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH v3 4/9] LoongArch: KVM: INTC: Check validation of num_cpu from user space Date: Wed, 11 Jun 2025 09:46:46 +0800 Message-Id: <20250611014651.3042734-5-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250611014651.3042734-1-maobibo@loongson.cn> References: <20250611014651.3042734-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCx7MQL4Eho0EoVAQ--.65102S6 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" The maximum supported cpu number is EIOINTC_ROUTE_MAX_VCPUS about irqchip eiointc, here add validation about cpu number to avoid array pointer overflow. Cc: stable@vger.kernel.org Fixes: 1ad7efa552fd ("LoongArch: KVM: Add EIOINTC user mode read and write = functions") Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index b48511f903b5..ed80bf290755 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -798,7 +798,7 @@ static int kvm_eiointc_ctrl_access(struct kvm_device *d= ev, int ret =3D 0; unsigned long flags; unsigned long type =3D (unsigned long)attr->attr; - u32 i, start_irq; + u32 i, start_irq, val; void __user *data; struct loongarch_eiointc *s =3D dev->kvm->arch.eiointc; =20 @@ -806,7 +806,12 @@ static int kvm_eiointc_ctrl_access(struct kvm_device *= dev, spin_lock_irqsave(&s->lock, flags); switch (type) { case KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_NUM_CPU: - if (copy_from_user(&s->num_cpu, data, 4)) + if (copy_from_user(&val, data, 4) =3D=3D 0) { + if (val < EIOINTC_ROUTE_MAX_VCPUS) + s->num_cpu =3D val; + else + ret =3D -EINVAL; + } else ret =3D -EFAULT; break; case KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_FEATURE: @@ -835,7 +840,7 @@ static int kvm_eiointc_regs_access(struct kvm_device *d= ev, struct kvm_device_attr *attr, bool is_write) { - int addr, cpuid, offset, ret =3D 0; + int addr, cpu, offset, ret =3D 0; unsigned long flags; void *p =3D NULL; void __user *data; @@ -843,7 +848,7 @@ static int kvm_eiointc_regs_access(struct kvm_device *d= ev, =20 s =3D dev->kvm->arch.eiointc; addr =3D attr->attr; - cpuid =3D addr >> 16; + cpu =3D addr >> 16; addr &=3D 0xffff; data =3D (void __user *)attr->addr; switch (addr) { @@ -868,8 +873,11 @@ static int kvm_eiointc_regs_access(struct kvm_device *= dev, p =3D &s->isr.reg_u32[offset]; break; case EIOINTC_COREISR_START ... EIOINTC_COREISR_END: + if (cpu >=3D s->num_cpu) + return -EINVAL; + offset =3D (addr - EIOINTC_COREISR_START) / 4; - p =3D &s->coreisr.reg_u32[cpuid][offset]; + p =3D &s->coreisr.reg_u32[cpu][offset]; break; case EIOINTC_COREMAP_START ... EIOINTC_COREMAP_END: offset =3D (addr - EIOINTC_COREMAP_START) / 4; --=20 2.39.3 From nobody Sat Oct 11 08:33:31 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id CDFA61B81DC; Wed, 11 Jun 2025 01:47:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606435; cv=none; b=iaKMiZTYa9Sw0EnMVGqV4qTWprB0kH1npR6kBL4LuGyJint+BD+HeywDLUXYFLYHHInH9c/yQ/HsLRXlyJ4rzfO43u/NpPfvIsQzbw6azkFoc3sVexwcriRliRZzyGZOspPEZsjpoKxZoGDXS+G5Agl6TTtLfKBLo1B0LFqTlfs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606435; c=relaxed/simple; bh=HOHcURIPteDflYVHmtZS9DkZpLOo2uCpk98aZBpsWxk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=JnGlU/o8fj7CutEYFQrGBv/L2a4ujt8BtruhswELmd2wZN0Q3U8IYzXAYEDkvz3gXG42pGYPjVXKzryHw387CFetzzlIcmaeOY+UI+tcSSzaMvk7pnvWea4t/o2KMU4x8MLyHNxHp4FRyl2gj3KDhj+31yYrJWOCKiPjgSSypDE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxC3Ie4EhosEITAQ--.47015S3; Wed, 11 Jun 2025 09:47:10 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCx7MQL4Eho0EoVAQ--.65102S7; Wed, 11 Jun 2025 09:47:10 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH v3 5/9] LoongArch: KVM: INTC: Avoid overflow with array index Date: Wed, 11 Jun 2025 09:46:47 +0800 Message-Id: <20250611014651.3042734-6-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250611014651.3042734-1-maobibo@loongson.cn> References: <20250611014651.3042734-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCx7MQL4Eho0EoVAQ--.65102S7 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Variable index is modified and reused as array index when modify register EIOINTC_ENABLE. There will be array index overflow problem. Cc: stable@vger.kernel.org Fixes: 3956a52bc05b ("LoongArch: KVM: Add EIOINTC read and write functions") Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index ed80bf290755..0bc870796f56 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -447,17 +447,16 @@ static int loongarch_eiointc_writew(struct kvm_vcpu *= vcpu, break; case EIOINTC_ENABLE_START ... EIOINTC_ENABLE_END: index =3D (offset - EIOINTC_ENABLE_START) >> 1; - old_data =3D s->enable.reg_u32[index]; + old_data =3D s->enable.reg_u16[index]; s->enable.reg_u16[index] =3D data; /* * 1: enable irq. * update irq when isr is set. */ data =3D s->enable.reg_u16[index] & ~old_data & s->isr.reg_u16[index]; - index =3D index << 1; for (i =3D 0; i < sizeof(data); i++) { u8 mask =3D (data >> (i * 8)) & 0xff; - eiointc_enable_irq(vcpu, s, index + i, mask, 1); + eiointc_enable_irq(vcpu, s, index * 2 + i, mask, 1); } /* * 0: disable irq. @@ -466,7 +465,7 @@ static int loongarch_eiointc_writew(struct kvm_vcpu *vc= pu, data =3D ~s->enable.reg_u16[index] & old_data & s->isr.reg_u16[index]; for (i =3D 0; i < sizeof(data); i++) { u8 mask =3D (data >> (i * 8)) & 0xff; - eiointc_enable_irq(vcpu, s, index, mask, 0); + eiointc_enable_irq(vcpu, s, index * 2 + i, mask, 0); } break; case EIOINTC_BOUNCE_START ... EIOINTC_BOUNCE_END: @@ -540,10 +539,9 @@ static int loongarch_eiointc_writel(struct kvm_vcpu *v= cpu, * update irq when isr is set. */ data =3D s->enable.reg_u32[index] & ~old_data & s->isr.reg_u32[index]; - index =3D index << 2; for (i =3D 0; i < sizeof(data); i++) { u8 mask =3D (data >> (i * 8)) & 0xff; - eiointc_enable_irq(vcpu, s, index + i, mask, 1); + eiointc_enable_irq(vcpu, s, index * 4 + i, mask, 1); } /* * 0: disable irq. @@ -552,7 +550,7 @@ static int loongarch_eiointc_writel(struct kvm_vcpu *vc= pu, data =3D ~s->enable.reg_u32[index] & old_data & s->isr.reg_u32[index]; for (i =3D 0; i < sizeof(data); i++) { u8 mask =3D (data >> (i * 8)) & 0xff; - eiointc_enable_irq(vcpu, s, index, mask, 0); + eiointc_enable_irq(vcpu, s, index * 4 + i, mask, 0); } break; case EIOINTC_BOUNCE_START ... EIOINTC_BOUNCE_END: @@ -626,10 +624,9 @@ static int loongarch_eiointc_writeq(struct kvm_vcpu *v= cpu, * update irq when isr is set. */ data =3D s->enable.reg_u64[index] & ~old_data & s->isr.reg_u64[index]; - index =3D index << 3; for (i =3D 0; i < sizeof(data); i++) { u8 mask =3D (data >> (i * 8)) & 0xff; - eiointc_enable_irq(vcpu, s, index + i, mask, 1); + eiointc_enable_irq(vcpu, s, index * 8 + i, mask, 1); } /* * 0: disable irq. @@ -638,7 +635,7 @@ static int loongarch_eiointc_writeq(struct kvm_vcpu *vc= pu, data =3D ~s->enable.reg_u64[index] & old_data & s->isr.reg_u64[index]; for (i =3D 0; i < sizeof(data); i++) { u8 mask =3D (data >> (i * 8)) & 0xff; - eiointc_enable_irq(vcpu, s, index, mask, 0); + eiointc_enable_irq(vcpu, s, index * 8 + i, mask, 0); } break; case EIOINTC_BOUNCE_START ... EIOINTC_BOUNCE_END: --=20 2.39.3 From nobody Sat Oct 11 08:33:31 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B65031B4254; Wed, 11 Jun 2025 01:47:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606434; cv=none; b=nlPq6adojlLR/HKiCW3pAF6OABRKYMVRdkwvMQYO5d2Ahm9drgC1sNp08Anjc/fQNRANenGkfUA0FtZFAL2GQLTwAoEQa3wDXkjP6PxseFlMnTHFVTz1o51i4qxuY5zMCnYoGmiTXRtUzn85PnuoDNCgCrK3P4xSA3KgMADQn0A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606434; c=relaxed/simple; bh=SNB7/uo+BEtvvj2zMKE1kZhoT92jnXSU2Wqs2dvqsOQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=QHb46PfGlGv3vwa0XlE7H9UoO3BZy7PmOl4T7zl/j4OBEGXkP7AZYxzP8AEjt0NBmsTuTJn8maudl3EHrKnW/XrM3kIAsY803hCAahzBmb3oFSuF7WbkhG9Ag1CzUTGeuQ5+UvNwJUdjY5xjDhxaWlkbryD8uvkjNQWpPiKvaw8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8BxLHIf4EhoskITAQ--.12461S3; Wed, 11 Jun 2025 09:47:11 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCx7MQL4Eho0EoVAQ--.65102S8; Wed, 11 Jun 2025 09:47:10 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v3 6/9] LoongArch: KVM: INTC: Use standard bitops API with eiointc Date: Wed, 11 Jun 2025 09:46:48 +0800 Message-Id: <20250611014651.3042734-7-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250611014651.3042734-1-maobibo@loongson.cn> References: <20250611014651.3042734-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCx7MQL4Eho0EoVAQ--.65102S8 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Standard bitops APIs such test_bit() is used here, rather than manually calculate the offset and mask. Also use non-atomic API __set_bit() and __clear_bit() rather than set_bit() and clear_bit(), since global spinlock is held already. Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 27 +++++++++++---------------- 1 file changed, 11 insertions(+), 16 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index 0bc870796f56..0a3c5cd0993a 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -9,7 +9,7 @@ =20 static void eiointc_set_sw_coreisr(struct loongarch_eiointc *s) { - int ipnum, cpu, irq_index, irq_mask, irq, cpuid; + int ipnum, cpu, irq, cpuid; struct kvm_vcpu *vcpu; =20 for (irq =3D 0; irq < EIOINTC_IRQS; irq++) { @@ -18,8 +18,6 @@ static void eiointc_set_sw_coreisr(struct loongarch_eioin= tc *s) ipnum =3D count_trailing_zeros(ipnum); ipnum =3D (ipnum >=3D 0 && ipnum < 4) ? ipnum : 0; } - irq_index =3D irq / 32; - irq_mask =3D BIT(irq & 0x1f); =20 cpuid =3D s->coremap.reg_u8[irq]; vcpu =3D kvm_get_vcpu_by_cpuid(s->kvm, cpuid); @@ -27,16 +25,16 @@ static void eiointc_set_sw_coreisr(struct loongarch_eio= intc *s) continue; =20 cpu =3D vcpu->vcpu_id; - if (!!(s->coreisr.reg_u32[cpu][irq_index] & irq_mask)) - set_bit(irq, s->sw_coreisr[cpu][ipnum]); + if (test_bit(irq, (unsigned long *)s->coreisr.reg_u32[cpu])) + __set_bit(irq, s->sw_coreisr[cpu][ipnum]); else - clear_bit(irq, s->sw_coreisr[cpu][ipnum]); + __clear_bit(irq, s->sw_coreisr[cpu][ipnum]); } } =20 static void eiointc_update_irq(struct loongarch_eiointc *s, int irq, int l= evel) { - int ipnum, cpu, found, irq_index, irq_mask; + int ipnum, cpu, found; struct kvm_vcpu *vcpu; struct kvm_interrupt vcpu_irq; =20 @@ -48,19 +46,16 @@ static void eiointc_update_irq(struct loongarch_eiointc= *s, int irq, int level) =20 cpu =3D s->sw_coremap[irq]; vcpu =3D kvm_get_vcpu(s->kvm, cpu); - irq_index =3D irq / 32; - irq_mask =3D BIT(irq & 0x1f); - if (level) { /* if not enable return false */ - if (((s->enable.reg_u32[irq_index]) & irq_mask) =3D=3D 0) + if (!test_bit(irq, (unsigned long *)s->enable.reg_u32)) return; - s->coreisr.reg_u32[cpu][irq_index] |=3D irq_mask; + __set_bit(irq, (unsigned long *)s->coreisr.reg_u32[cpu]); found =3D find_first_bit(s->sw_coreisr[cpu][ipnum], EIOINTC_IRQS); - set_bit(irq, s->sw_coreisr[cpu][ipnum]); + __set_bit(irq, s->sw_coreisr[cpu][ipnum]); } else { - s->coreisr.reg_u32[cpu][irq_index] &=3D ~irq_mask; - clear_bit(irq, s->sw_coreisr[cpu][ipnum]); + __clear_bit(irq, (unsigned long *)s->coreisr.reg_u32[cpu]); + __clear_bit(irq, s->sw_coreisr[cpu][ipnum]); found =3D find_first_bit(s->sw_coreisr[cpu][ipnum], EIOINTC_IRQS); } =20 @@ -110,8 +105,8 @@ void eiointc_set_irq(struct loongarch_eiointc *s, int i= rq, int level) unsigned long flags; unsigned long *isr =3D (unsigned long *)s->isr.reg_u8; =20 - level ? set_bit(irq, isr) : clear_bit(irq, isr); spin_lock_irqsave(&s->lock, flags); + level ? __set_bit(irq, isr) : __clear_bit(irq, isr); eiointc_update_irq(s, irq, level); spin_unlock_irqrestore(&s->lock, flags); } --=20 2.39.3 From nobody Sat Oct 11 08:33:31 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 874601C6FFB; Wed, 11 Jun 2025 01:47:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606435; cv=none; b=WpCQ7WX8RH62c/Nzboa4YJ823iZjPVypHIaYMqMSRZ8GyHJzS65ecT9c34YcvDYX98AEOMyVaA2/87/Tf4bXyRsuLtxPhuH2C5Sxbf1yYrCaOA94vVTWoOap57jLL+aoxo+6iAID/dcef8RJcBlM7mHEBpCmGyfTfbU39Q/qXAA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606435; c=relaxed/simple; bh=2m9/vuV3j46QGITAqf7bOKrk3jOUuBuESFmNz+39bVs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=GOMa7h+bdUAUuZuvR/xPE1TQyz8iem3hB7rvpG0zrMGYeSEgrOKLz71PgRTB/G9oUMY8ZWtGpMsUtWkQQlLhmD5pB/NGjz9yfCdZkujd2r5mW75XVneLTdSiPS9J7wBgjkrW/pEenUIOXbik4PaBVSoNcb5gIuwdpeipQKTAivY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxjXIf4Ehot0ITAQ--.47174S3; Wed, 11 Jun 2025 09:47:11 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCx7MQL4Eho0EoVAQ--.65102S9; Wed, 11 Jun 2025 09:47:11 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v3 7/9] LoongArch: KVM: INTC: Remove unused parameter len Date: Wed, 11 Jun 2025 09:46:49 +0800 Message-Id: <20250611014651.3042734-8-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250611014651.3042734-1-maobibo@loongson.cn> References: <20250611014651.3042734-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCx7MQL4Eho0EoVAQ--.65102S9 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Parameter len is unused in some functions with eiointc emulation driver, remove it here. Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 32 +++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index 0a3c5cd0993a..1dad8342d84e 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -131,7 +131,7 @@ static inline void eiointc_enable_irq(struct kvm_vcpu *= vcpu, } =20 static int loongarch_eiointc_readb(struct kvm_vcpu *vcpu, struct loongarch= _eiointc *s, - gpa_t addr, int len, void *val) + gpa_t addr, void *val) { int index, ret =3D 0; u8 data =3D 0; @@ -173,7 +173,7 @@ static int loongarch_eiointc_readb(struct kvm_vcpu *vcp= u, struct loongarch_eioin } =20 static int loongarch_eiointc_readw(struct kvm_vcpu *vcpu, struct loongarch= _eiointc *s, - gpa_t addr, int len, void *val) + gpa_t addr, void *val) { int index, ret =3D 0; u16 data =3D 0; @@ -215,7 +215,7 @@ static int loongarch_eiointc_readw(struct kvm_vcpu *vcp= u, struct loongarch_eioin } =20 static int loongarch_eiointc_readl(struct kvm_vcpu *vcpu, struct loongarch= _eiointc *s, - gpa_t addr, int len, void *val) + gpa_t addr, void *val) { int index, ret =3D 0; u32 data =3D 0; @@ -257,7 +257,7 @@ static int loongarch_eiointc_readl(struct kvm_vcpu *vcp= u, struct loongarch_eioin } =20 static int loongarch_eiointc_readq(struct kvm_vcpu *vcpu, struct loongarch= _eiointc *s, - gpa_t addr, int len, void *val) + gpa_t addr, void *val) { int index, ret =3D 0; u64 data =3D 0; @@ -315,16 +315,16 @@ static int kvm_eiointc_read(struct kvm_vcpu *vcpu, spin_lock_irqsave(&eiointc->lock, flags); switch (len) { case 1: - ret =3D loongarch_eiointc_readb(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_readb(vcpu, eiointc, addr, val); break; case 2: - ret =3D loongarch_eiointc_readw(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_readw(vcpu, eiointc, addr, val); break; case 4: - ret =3D loongarch_eiointc_readl(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_readl(vcpu, eiointc, addr, val); break; case 8: - ret =3D loongarch_eiointc_readq(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_readq(vcpu, eiointc, addr, val); break; default: WARN_ONCE(1, "%s: Abnormal address access: addr 0x%llx, size %d\n", @@ -337,7 +337,7 @@ static int kvm_eiointc_read(struct kvm_vcpu *vcpu, =20 static int loongarch_eiointc_writeb(struct kvm_vcpu *vcpu, struct loongarch_eiointc *s, - gpa_t addr, int len, const void *val) + gpa_t addr, const void *val) { int index, irq, bits, ret =3D 0; u8 cpu; @@ -416,7 +416,7 @@ static int loongarch_eiointc_writeb(struct kvm_vcpu *vc= pu, =20 static int loongarch_eiointc_writew(struct kvm_vcpu *vcpu, struct loongarch_eiointc *s, - gpa_t addr, int len, const void *val) + gpa_t addr, const void *val) { int i, index, irq, bits, ret =3D 0; u8 cpu; @@ -501,7 +501,7 @@ static int loongarch_eiointc_writew(struct kvm_vcpu *vc= pu, =20 static int loongarch_eiointc_writel(struct kvm_vcpu *vcpu, struct loongarch_eiointc *s, - gpa_t addr, int len, const void *val) + gpa_t addr, const void *val) { int i, index, irq, bits, ret =3D 0; u8 cpu; @@ -586,7 +586,7 @@ static int loongarch_eiointc_writel(struct kvm_vcpu *vc= pu, =20 static int loongarch_eiointc_writeq(struct kvm_vcpu *vcpu, struct loongarch_eiointc *s, - gpa_t addr, int len, const void *val) + gpa_t addr, const void *val) { int i, index, irq, bits, ret =3D 0; u8 cpu; @@ -686,16 +686,16 @@ static int kvm_eiointc_write(struct kvm_vcpu *vcpu, spin_lock_irqsave(&eiointc->lock, flags); switch (len) { case 1: - ret =3D loongarch_eiointc_writeb(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_writeb(vcpu, eiointc, addr, val); break; case 2: - ret =3D loongarch_eiointc_writew(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_writew(vcpu, eiointc, addr, val); break; case 4: - ret =3D loongarch_eiointc_writel(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_writel(vcpu, eiointc, addr, val); break; case 8: - ret =3D loongarch_eiointc_writeq(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_writeq(vcpu, eiointc, addr, val); break; default: WARN_ONCE(1, "%s: Abnormal address access: addr 0x%llx, size %d\n", --=20 2.39.3 From nobody Sat Oct 11 08:33:31 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 389741C5499; Wed, 11 Jun 2025 01:47:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8AxbeIf4EhoukITAQ--.9216S3; Wed, 11 Jun 2025 09:47:11 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCx7MQL4Eho0EoVAQ--.65102S10; Wed, 11 Jun 2025 09:47:11 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v3 8/9] LoongArch: KVM: INTC: Add stat information with kernel irqchip Date: Wed, 11 Jun 2025 09:46:50 +0800 Message-Id: <20250611014651.3042734-9-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250611014651.3042734-1-maobibo@loongson.cn> References: <20250611014651.3042734-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCx7MQL4Eho0EoVAQ--.65102S10 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Move stat information about kernel irqchip from VM to vCPU, since all vm exiting events should be vCPU relative. And also add entry with structure kvm_vcpu_stats_desc[], so that it can display with directory /sys/kernel/debug/kvm. Signed-off-by: Bibo Mao --- arch/loongarch/include/asm/kvm_host.h | 12 ++++++------ arch/loongarch/kvm/intc/eiointc.c | 4 ++-- arch/loongarch/kvm/intc/ipi.c | 28 ++++----------------------- arch/loongarch/kvm/intc/pch_pic.c | 4 ++-- arch/loongarch/kvm/vcpu.c | 8 +++++++- 5 files changed, 21 insertions(+), 35 deletions(-) diff --git a/arch/loongarch/include/asm/kvm_host.h b/arch/loongarch/include= /asm/kvm_host.h index a3c4cc46c892..0cecbd038bb3 100644 --- a/arch/loongarch/include/asm/kvm_host.h +++ b/arch/loongarch/include/asm/kvm_host.h @@ -50,12 +50,6 @@ struct kvm_vm_stat { struct kvm_vm_stat_generic generic; u64 pages; u64 hugepages; - u64 ipi_read_exits; - u64 ipi_write_exits; - u64 eiointc_read_exits; - u64 eiointc_write_exits; - u64 pch_pic_read_exits; - u64 pch_pic_write_exits; }; =20 struct kvm_vcpu_stat { @@ -65,6 +59,12 @@ struct kvm_vcpu_stat { u64 cpucfg_exits; u64 signal_exits; u64 hypercall_exits; + u64 ipi_read_exits; + u64 ipi_write_exits; + u64 eiointc_read_exits; + u64 eiointc_write_exits; + u64 pch_pic_read_exits; + u64 pch_pic_write_exits; }; =20 #define KVM_MEM_HUGEPAGE_CAPABLE (1UL << 0) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index 1dad8342d84e..8b0d9376eb54 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -311,7 +311,7 @@ static int kvm_eiointc_read(struct kvm_vcpu *vcpu, return -EINVAL; } =20 - vcpu->kvm->stat.eiointc_read_exits++; + vcpu->stat.eiointc_read_exits++; spin_lock_irqsave(&eiointc->lock, flags); switch (len) { case 1: @@ -682,7 +682,7 @@ static int kvm_eiointc_write(struct kvm_vcpu *vcpu, return -EINVAL; } =20 - vcpu->kvm->stat.eiointc_write_exits++; + vcpu->stat.eiointc_write_exits++; spin_lock_irqsave(&eiointc->lock, flags); switch (len) { case 1: diff --git a/arch/loongarch/kvm/intc/ipi.c b/arch/loongarch/kvm/intc/ipi.c index fe734dc062ed..e658d5b37c04 100644 --- a/arch/loongarch/kvm/intc/ipi.c +++ b/arch/loongarch/kvm/intc/ipi.c @@ -268,36 +268,16 @@ static int kvm_ipi_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, gpa_t addr, int len, void *val) { - int ret; - struct loongarch_ipi *ipi; - - ipi =3D vcpu->kvm->arch.ipi; - if (!ipi) { - kvm_err("%s: ipi irqchip not valid!\n", __func__); - return -EINVAL; - } - ipi->kvm->stat.ipi_read_exits++; - ret =3D loongarch_ipi_readl(vcpu, addr, len, val); - - return ret; + vcpu->stat.ipi_read_exits++; + return loongarch_ipi_readl(vcpu, addr, len, val); } =20 static int kvm_ipi_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, gpa_t addr, int len, const void *val) { - int ret; - struct loongarch_ipi *ipi; - - ipi =3D vcpu->kvm->arch.ipi; - if (!ipi) { - kvm_err("%s: ipi irqchip not valid!\n", __func__); - return -EINVAL; - } - ipi->kvm->stat.ipi_write_exits++; - ret =3D loongarch_ipi_writel(vcpu, addr, len, val); - - return ret; + vcpu->stat.ipi_write_exits++; + return loongarch_ipi_writel(vcpu, addr, len, val); } =20 static const struct kvm_io_device_ops kvm_ipi_ops =3D { diff --git a/arch/loongarch/kvm/intc/pch_pic.c b/arch/loongarch/kvm/intc/pc= h_pic.c index 08fce845f668..6f00ffe05c54 100644 --- a/arch/loongarch/kvm/intc/pch_pic.c +++ b/arch/loongarch/kvm/intc/pch_pic.c @@ -196,7 +196,7 @@ static int kvm_pch_pic_read(struct kvm_vcpu *vcpu, } =20 /* statistics of pch pic reading */ - vcpu->kvm->stat.pch_pic_read_exits++; + vcpu->stat.pch_pic_read_exits++; ret =3D loongarch_pch_pic_read(s, addr, len, val); =20 return ret; @@ -303,7 +303,7 @@ static int kvm_pch_pic_write(struct kvm_vcpu *vcpu, } =20 /* statistics of pch pic writing */ - vcpu->kvm->stat.pch_pic_write_exits++; + vcpu->stat.pch_pic_write_exits++; ret =3D loongarch_pch_pic_write(s, addr, len, val); =20 return ret; diff --git a/arch/loongarch/kvm/vcpu.c b/arch/loongarch/kvm/vcpu.c index 5af32ec62cb1..d1b8c50941ca 100644 --- a/arch/loongarch/kvm/vcpu.c +++ b/arch/loongarch/kvm/vcpu.c @@ -20,7 +20,13 @@ const struct _kvm_stats_desc kvm_vcpu_stats_desc[] =3D { STATS_DESC_COUNTER(VCPU, idle_exits), STATS_DESC_COUNTER(VCPU, cpucfg_exits), STATS_DESC_COUNTER(VCPU, signal_exits), - STATS_DESC_COUNTER(VCPU, hypercall_exits) + STATS_DESC_COUNTER(VCPU, hypercall_exits), + STATS_DESC_COUNTER(VCPU, ipi_read_exits), + STATS_DESC_COUNTER(VCPU, ipi_write_exits), + STATS_DESC_COUNTER(VCPU, eiointc_read_exits), + STATS_DESC_COUNTER(VCPU, eiointc_write_exits), + STATS_DESC_COUNTER(VCPU, pch_pic_read_exits), + STATS_DESC_COUNTER(VCPU, pch_pic_write_exits) }; =20 const struct kvm_stats_header kvm_vcpu_stats_header =3D { --=20 2.39.3 From nobody Sat Oct 11 08:33:31 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2EAE6145A05; Wed, 11 Jun 2025 01:50:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606607; cv=none; b=V1YEPv4iFXdX7qF4HUGj1gvL+JctTrd/yP9sj94oruHky5FW9SH7DxBQAKL8y78k7mMH94DDuua2w718TV6/FkSlMWm2nOVMSsBTr6fkcZv1qUCy6qnuze5ZollSlljEtZJLpthXLYVCYVULl+gP0+zH5kdbTfIB6BLpXgIBkfg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606607; c=relaxed/simple; bh=oKbfmTtc9yGOjWmt4vhFPEeeHjc4/0/VRxxExKFF9s0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=dcvoRT7ejtFh2HubeBVv4RzeTPF5DrA5LI8+LuX17cBrF70trU1gv1/Q0jL4K9cIJvMqFGuana+L5ARjokwplzXEtpFRpoyT/Bdm7UyEUhr7iU/krFb3l3ICzHsk5qO296+bvKPTJZ9xmRIdJCHHZK8XavSXHye6QxA2Pv7Ae/s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxbKzK4Eho0EMTAQ--.47519S3; Wed, 11 Jun 2025 09:50:02 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMBxHcXJ4EhoCEwVAQ--.64107S2; Wed, 11 Jun 2025 09:50:01 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v3 8/9] LoongArch: KVM: INTC: Add stat information with kernel irqchip Date: Wed, 11 Jun 2025 09:50:01 +0800 Message-Id: <20250611015001.3042819-1-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250611014651.3042734-1-maobibo@loongson.cn> References: <20250611014651.3042734-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMBxHcXJ4EhoCEwVAQ--.64107S2 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Move stat information about kernel irqchip from VM to vCPU, since all vm exiting events should be vCPU relative. And also add entry with structure kvm_vcpu_stats_desc[], so that it can display with directory /sys/kernel/debug/kvm. Signed-off-by: Bibo Mao --- arch/loongarch/include/asm/kvm_host.h | 12 ++++++------ arch/loongarch/kvm/intc/eiointc.c | 4 ++-- arch/loongarch/kvm/intc/ipi.c | 28 ++++----------------------- arch/loongarch/kvm/intc/pch_pic.c | 4 ++-- arch/loongarch/kvm/vcpu.c | 8 +++++++- 5 files changed, 21 insertions(+), 35 deletions(-) diff --git a/arch/loongarch/include/asm/kvm_host.h b/arch/loongarch/include= /asm/kvm_host.h index a3c4cc46c892..0cecbd038bb3 100644 --- a/arch/loongarch/include/asm/kvm_host.h +++ b/arch/loongarch/include/asm/kvm_host.h @@ -50,12 +50,6 @@ struct kvm_vm_stat { struct kvm_vm_stat_generic generic; u64 pages; u64 hugepages; - u64 ipi_read_exits; - u64 ipi_write_exits; - u64 eiointc_read_exits; - u64 eiointc_write_exits; - u64 pch_pic_read_exits; - u64 pch_pic_write_exits; }; =20 struct kvm_vcpu_stat { @@ -65,6 +59,12 @@ struct kvm_vcpu_stat { u64 cpucfg_exits; u64 signal_exits; u64 hypercall_exits; + u64 ipi_read_exits; + u64 ipi_write_exits; + u64 eiointc_read_exits; + u64 eiointc_write_exits; + u64 pch_pic_read_exits; + u64 pch_pic_write_exits; }; =20 #define KVM_MEM_HUGEPAGE_CAPABLE (1UL << 0) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index 1dad8342d84e..8b0d9376eb54 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -311,7 +311,7 @@ static int kvm_eiointc_read(struct kvm_vcpu *vcpu, return -EINVAL; } =20 - vcpu->kvm->stat.eiointc_read_exits++; + vcpu->stat.eiointc_read_exits++; spin_lock_irqsave(&eiointc->lock, flags); switch (len) { case 1: @@ -682,7 +682,7 @@ static int kvm_eiointc_write(struct kvm_vcpu *vcpu, return -EINVAL; } =20 - vcpu->kvm->stat.eiointc_write_exits++; + vcpu->stat.eiointc_write_exits++; spin_lock_irqsave(&eiointc->lock, flags); switch (len) { case 1: diff --git a/arch/loongarch/kvm/intc/ipi.c b/arch/loongarch/kvm/intc/ipi.c index fe734dc062ed..e658d5b37c04 100644 --- a/arch/loongarch/kvm/intc/ipi.c +++ b/arch/loongarch/kvm/intc/ipi.c @@ -268,36 +268,16 @@ static int kvm_ipi_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, gpa_t addr, int len, void *val) { - int ret; - struct loongarch_ipi *ipi; - - ipi =3D vcpu->kvm->arch.ipi; - if (!ipi) { - kvm_err("%s: ipi irqchip not valid!\n", __func__); - return -EINVAL; - } - ipi->kvm->stat.ipi_read_exits++; - ret =3D loongarch_ipi_readl(vcpu, addr, len, val); - - return ret; + vcpu->stat.ipi_read_exits++; + return loongarch_ipi_readl(vcpu, addr, len, val); } =20 static int kvm_ipi_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, gpa_t addr, int len, const void *val) { - int ret; - struct loongarch_ipi *ipi; - - ipi =3D vcpu->kvm->arch.ipi; - if (!ipi) { - kvm_err("%s: ipi irqchip not valid!\n", __func__); - return -EINVAL; - } - ipi->kvm->stat.ipi_write_exits++; - ret =3D loongarch_ipi_writel(vcpu, addr, len, val); - - return ret; + vcpu->stat.ipi_write_exits++; + return loongarch_ipi_writel(vcpu, addr, len, val); } =20 static const struct kvm_io_device_ops kvm_ipi_ops =3D { diff --git a/arch/loongarch/kvm/intc/pch_pic.c b/arch/loongarch/kvm/intc/pc= h_pic.c index 08fce845f668..6f00ffe05c54 100644 --- a/arch/loongarch/kvm/intc/pch_pic.c +++ b/arch/loongarch/kvm/intc/pch_pic.c @@ -196,7 +196,7 @@ static int kvm_pch_pic_read(struct kvm_vcpu *vcpu, } =20 /* statistics of pch pic reading */ - vcpu->kvm->stat.pch_pic_read_exits++; + vcpu->stat.pch_pic_read_exits++; ret =3D loongarch_pch_pic_read(s, addr, len, val); =20 return ret; @@ -303,7 +303,7 @@ static int kvm_pch_pic_write(struct kvm_vcpu *vcpu, } =20 /* statistics of pch pic writing */ - vcpu->kvm->stat.pch_pic_write_exits++; + vcpu->stat.pch_pic_write_exits++; ret =3D loongarch_pch_pic_write(s, addr, len, val); =20 return ret; diff --git a/arch/loongarch/kvm/vcpu.c b/arch/loongarch/kvm/vcpu.c index 5af32ec62cb1..d1b8c50941ca 100644 --- a/arch/loongarch/kvm/vcpu.c +++ b/arch/loongarch/kvm/vcpu.c @@ -20,7 +20,13 @@ const struct _kvm_stats_desc kvm_vcpu_stats_desc[] =3D { STATS_DESC_COUNTER(VCPU, idle_exits), STATS_DESC_COUNTER(VCPU, cpucfg_exits), STATS_DESC_COUNTER(VCPU, signal_exits), - STATS_DESC_COUNTER(VCPU, hypercall_exits) + STATS_DESC_COUNTER(VCPU, hypercall_exits), + STATS_DESC_COUNTER(VCPU, ipi_read_exits), + STATS_DESC_COUNTER(VCPU, ipi_write_exits), + STATS_DESC_COUNTER(VCPU, eiointc_read_exits), + STATS_DESC_COUNTER(VCPU, eiointc_write_exits), + STATS_DESC_COUNTER(VCPU, pch_pic_read_exits), + STATS_DESC_COUNTER(VCPU, pch_pic_write_exits) }; =20 const struct kvm_stats_header kvm_vcpu_stats_header =3D { --=20 2.39.3 From nobody Sat Oct 11 08:33:31 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1DE6419A; Wed, 11 Jun 2025 01:51:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606709; cv=none; b=UYLOLycDH+S6u2Z8iSaVjUmaB51w1vv6SSQuBMGL601+VgLwoG/IfzUhgoymW01gKafbCAI1NTN7T+dcZjQjktg+eCczxpXhJ7M9I7J/iIWOHk5cVDn1R8bxxaq5QApr+S0u3tpjpMGKukNM8gbwXMTlIkA0aTw6nMajRbzih0U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749606709; c=relaxed/simple; bh=WR+OC66bsWbh7oerKCupNJIST5tHLZ3Uqr/wnP0OJvs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=spqRnyu0tZIbDzjxyBJnihzu2YFg+yCSe4dqo4TtU3/Pim6FiP8yMsI1o6EOtSkX1Q1vh7SB5z6RLMj9xwFUrMKv0VKmTipD5W+Yx1LBADisYh/DbXqVWFIY6R1W70Uev3O/73CXcLi8H3hbEg/vQMfKexUTFwzwP9WVxsl4kN8= ARC-Authentication-Results: i=1; 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charset="utf-8" IOCSR instruction supports 1/2/4/8 bytes access, the address should be naturally aligned with its access size. Here address alignment check is added in eiointc kernel emulation. At the same time len must be 1/2/4/8 bytes from iocsr exit emulation function kvm_emu_iocsr(), remove the default case in switch case statements. Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index 8b0d9376eb54..4e9d12300cc4 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -311,6 +311,12 @@ static int kvm_eiointc_read(struct kvm_vcpu *vcpu, return -EINVAL; } =20 + /* len must be 1/2/4/8 from function kvm_emu_iocsr() */ + if (addr & (len - 1)) { + kvm_err("%s: eiointc not aligned addr %llx len %d\n", __func__, addr, le= n); + return -EINVAL; + } + vcpu->stat.eiointc_read_exits++; spin_lock_irqsave(&eiointc->lock, flags); switch (len) { @@ -323,12 +329,9 @@ static int kvm_eiointc_read(struct kvm_vcpu *vcpu, case 4: ret =3D loongarch_eiointc_readl(vcpu, eiointc, addr, val); break; - case 8: + default: ret =3D loongarch_eiointc_readq(vcpu, eiointc, addr, val); break; - default: - WARN_ONCE(1, "%s: Abnormal address access: addr 0x%llx, size %d\n", - __func__, addr, len); } spin_unlock_irqrestore(&eiointc->lock, flags); =20 @@ -682,6 +685,11 @@ static int kvm_eiointc_write(struct kvm_vcpu *vcpu, return -EINVAL; } =20 + if (addr & (len - 1)) { + kvm_err("%s: eiointc not aligned addr %llx len %d\n", __func__, addr, le= n); + return -EINVAL; + } + vcpu->stat.eiointc_write_exits++; spin_lock_irqsave(&eiointc->lock, flags); switch (len) { @@ -694,12 +702,9 @@ static int kvm_eiointc_write(struct kvm_vcpu *vcpu, case 4: ret =3D loongarch_eiointc_writel(vcpu, eiointc, addr, val); break; - case 8: + default: ret =3D loongarch_eiointc_writeq(vcpu, eiointc, addr, val); break; - default: - WARN_ONCE(1, "%s: Abnormal address access: addr 0x%llx, size %d\n", - __func__, addr, len); } spin_unlock_irqrestore(&eiointc->lock, flags); =20 --=20 2.39.3