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Peter Anvin" , linux-kernel@vger.kernel.org, Andrew Cooper , Dave Hansen Subject: [RFC PATCH] x86/cpu: Mark Ice Lake model 7D and 9D as unreleased Message-ID: <20250611-icelake-cleanup-v1-1-0f82472dbc8f@linux.intel.com> X-B4-Tracking: v=1; b=H4sIAOfDSWgC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDI1MDU0MT3czk1JzE7FTd5JzUxLzSAt0U80QLY0MjA5MUSzMloK6CotS0zAq widFKQW7OILEAxxBnD6XY2loAnoUQhm8AAAA= X-Change-ID: 20250514-icelake-cleanup-d7a831204d96 X-Mailer: b4 0.14.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" These models were never officially released, but they made it into intel-family.h. There is no evidence that these models are being used in production. As a matter of fact, Intel's affected CPU list[1] does not contain these models. During CPU mitigations it gets confusing whether to include these models with other Ice Lake models or not. Add the comment in the intel-family.h to indicate that these models were never released. Also taint and warn about these unreleased models, except when running as a guest. [1] https://www.intel.com/content/www/us/en/developer/topic-technology/soft= ware-security-guidance/processors-affected-consolidated-product-cpu-model.h= tml Suggested-by: Andrew Cooper Suggested-by: Dave Hansen Signed-off-by: Pawan Gupta --- Please scream if you believe that the assumptions made in this patch are incorrect. --- arch/x86/include/asm/intel-family.h | 4 ++-- arch/x86/kernel/cpu/intel.c | 12 ++++++++++++ 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/int= el-family.h index be10c188614fe24ad41e2e1912b8d5640c6ea171..948e0a057a9629dc57671e4c666= b5f62e762d4bb 100644 --- a/arch/x86/include/asm/intel-family.h +++ b/arch/x86/include/asm/intel-family.h @@ -110,9 +110,9 @@ =20 #define INTEL_ICELAKE_X IFM(6, 0x6A) /* Sunny Cove */ #define INTEL_ICELAKE_D IFM(6, 0x6C) /* Sunny Cove */ -#define INTEL_ICELAKE IFM(6, 0x7D) /* Sunny Cove */ +#define INTEL_ICELAKE IFM(6, 0x7D) /* Sunny Cove, never released */ #define INTEL_ICELAKE_L IFM(6, 0x7E) /* Sunny Cove */ -#define INTEL_ICELAKE_NNPI IFM(6, 0x9D) /* Sunny Cove */ +#define INTEL_ICELAKE_NNPI IFM(6, 0x9D) /* Sunny Cove, never released */ =20 #define INTEL_ROCKETLAKE IFM(6, 0xA7) /* Cypress Cove */ =20 diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 076eaa41b8c81b2dd9be129d14dc7c8041eb2e79..b7eb8d5ee4351bf4a31e6a2792d= 24f7dbc0773ed 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -337,9 +337,21 @@ static void early_init_intel(struct cpuinfo_x86 *c) detect_tme_early(c); } =20 +static const struct x86_cpu_id unreleased_cpus[] =3D { + X86_MATCH_VFM(INTEL_ICELAKE, 0), + X86_MATCH_VFM(INTEL_ICELAKE_NNPI, 0), + {}, +}; + static void bsp_init_intel(struct cpuinfo_x86 *c) { resctrl_cpu_detect(c); + + if (x86_match_cpu(unreleased_cpus) && !cpu_has(c, X86_FEATURE_HYPERVISOR)= ) { + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK); + WARN_ONCE(1, "WARNING: CPU family=3D0x%x, model=3D0x%x is unreleased, ta= inting\n", + c->x86, c->x86_model); + } } =20 #ifdef CONFIG_X86_32 --- base-commit: 19272b37aa4f83ca52bdf9c16d5d81bdd1354494 change-id: 20250514-icelake-cleanup-d7a831204d96 Best regards, --=20 Pawan