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Wed, 11 Jun 2025 02:34:33 -0700 (PDT) From: Peter Griffin Date: Wed, 11 Jun 2025 10:34:25 +0100 Subject: [PATCH v2 1/2] arm64: dts: exynos: gs101: Add 'local-timer-stop' to cpuidle nodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250611-gs101-cpuidle-v2-1-4fa811ec404d@linaro.org> References: <20250611-gs101-cpuidle-v2-0-4fa811ec404d@linaro.org> In-Reply-To: <20250611-gs101-cpuidle-v2-0-4fa811ec404d@linaro.org> To: =?utf-8?q?Andr=C3=A9_Draszik?= , Tudor Ambarus , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Krzysztof Kozlowski Cc: William Mcvicker , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel-team@android.com, Peter Griffin , Will Deacon , Youngmin Nam X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=0EFC8E6F5578750D56B549FCCEE8B8D6023472BA From: Will Deacon In preparation for switching to the architected timer as the primary clockevents device, mark the cpuidle nodes with the 'local-timer-stop' property to indicate that an alternative clockevents device must be used for waking up from the "c2" idle state. Signed-off-by: Will Deacon [Original commit from https://android.googlesource.com/kernel/gs/+/a896fd98= 638047989513d05556faebd28a62b27c] Signed-off-by: Will McVicker Reviewed-by: Youngmin Nam Tested-by: Youngmin Nam Fixes: ea89fdf24fd9 ("arm64: dts: exynos: google: Add initial Google gs101 = SoC support") Signed-off-by: Peter Griffin --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot= /dts/exynos/google/gs101.dtsi index 48c691fd0a3ae430b5d66b402610d23b72b144d7..94aa0ffb9a9760c58818c041700= 1fd187b048ea8 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -155,6 +155,7 @@ ananke_cpu_sleep: cpu-ananke-sleep { idle-state-name =3D "c2"; compatible =3D "arm,idle-state"; arm,psci-suspend-param =3D <0x0010000>; + local-timer-stop; entry-latency-us =3D <70>; exit-latency-us =3D <160>; min-residency-us =3D <2000>; @@ -164,6 +165,7 @@ enyo_cpu_sleep: cpu-enyo-sleep { idle-state-name =3D "c2"; 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a=openpgp; fpr=0EFC8E6F5578750D56B549FCCEE8B8D6023472BA Register cpu pm notifiers for gs101 which call the gs101_cpu_pmu_online/offline callbacks which in turn program the ACPM hint. This is required to actually enter the idle state. A couple of corner cases are handled, namely when the system is rebooting or suspending we ignore the request. Additionally the request is ignored if the CPU is in CPU hot plug. Note: this patch has a runtime dependency on adding 'local-timer-stop' dt property to the CPU nodes. This informs the time framework to switch to a broadcast timer as the local timer will be shutdown. Without that DT property specified the system hangs in early boot with this patch applied. Signed-off-by: Peter Griffin --- Changes in v2 * Add ifdef CONFIG_PM_SLEEP to avoid Fix warning: unused variable 'cpupm_pm_ops' [-Wunused-const-variable] (0= -day) --- drivers/soc/samsung/exynos-pmu.c | 137 +++++++++++++++++++++++++++++++++++= ++-- 1 file changed, 133 insertions(+), 4 deletions(-) diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-= pmu.c index a77288f49d249f890060c595556708334383c910..7f72ecd60994f18bb639dd8e09e= 1c6ff6158066b 100644 --- a/drivers/soc/samsung/exynos-pmu.c +++ b/drivers/soc/samsung/exynos-pmu.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -15,6 +16,7 @@ #include #include #include +#include #include =20 #include @@ -35,6 +37,10 @@ struct exynos_pmu_context { const struct exynos_pmu_data *pmu_data; struct regmap *pmureg; struct regmap *pmuintrgen; + spinlock_t cpupm_lock; /* serialization lock */ + bool __percpu *hotplug_ing; + atomic_t sys_suspended; + atomic_t sys_rebooting; }; =20 void __iomem *pmu_base_addr; @@ -336,7 +342,7 @@ EXPORT_SYMBOL_GPL(exynos_get_pmu_regmap_by_phandle); #define CPU_INFORM_CLEAR 0 #define CPU_INFORM_C2 1 =20 -static int gs101_cpuhp_pmu_online(unsigned int cpu) +static int gs101_cpu_pmu_online(unsigned int cpu) { unsigned int cpuhint =3D smp_processor_id(); u32 reg, mask; @@ -358,10 +364,26 @@ static int gs101_cpuhp_pmu_online(unsigned int cpu) return 0; } =20 -static int gs101_cpuhp_pmu_offline(unsigned int cpu) +static int gs101_cpuhp_pmu_online(unsigned int cpu) +{ + gs101_cpu_pmu_online(cpu); + + /* + * Mark this CPU as having finished the hotplug. + * This means this CPU can now enter C2 idle state. + */ + *per_cpu_ptr(pmu_context->hotplug_ing, cpu) =3D false; + + return 0; +} + +static int gs101_cpu_pmu_offline(unsigned int cpu) { u32 reg, mask; - unsigned int cpuhint =3D smp_processor_id(); + unsigned int cpuhint; + + spin_lock(&pmu_context->cpupm_lock); + cpuhint =3D smp_processor_id(); =20 /* set cpu inform hint */ regmap_write(pmu_context->pmureg, GS101_CPU_INFORM(cpuhint), @@ -379,16 +401,89 @@ static int gs101_cpuhp_pmu_offline(unsigned int cpu) regmap_read(pmu_context->pmuintrgen, GS101_GRP1_INTR_BID_UPEND, ®); regmap_write(pmu_context->pmuintrgen, GS101_GRP1_INTR_BID_CLEAR, reg & mask); + + spin_unlock(&pmu_context->cpupm_lock); return 0; } =20 +static int gs101_cpuhp_pmu_offline(unsigned int cpu) +{ + /* + * Mark this CPU as entering hotplug. So as not to confuse + * ACPM the CPU entering hotplug should not enter C2 idle state. + */ + *per_cpu_ptr(pmu_context->hotplug_ing, cpu) =3D true; + + gs101_cpu_pmu_offline(cpu); + + return 0; +} + +static int gs101_cpu_pm_notify_callback(struct notifier_block *self, + unsigned long action, void *v) +{ + int cpu =3D smp_processor_id(); + + switch (action) { + case CPU_PM_ENTER: + /* + * Ignore CPU_PM_ENTER event in reboot or + * suspend sequence. + */ + + if (atomic_read(&pmu_context->sys_suspended) || + atomic_read(&pmu_context->sys_rebooting)) + return NOTIFY_OK; + + if (*per_cpu_ptr(pmu_context->hotplug_ing, cpu)) + return NOTIFY_BAD; + + gs101_cpu_pmu_offline(cpu); + + break; + case CPU_PM_EXIT: + + if (atomic_read(&pmu_context->sys_rebooting)) + return NOTIFY_OK; + + gs101_cpu_pmu_online(cpu); + + break; + } + + return NOTIFY_OK; +} + +static struct notifier_block gs101_cpu_pm_notifier =3D { + .notifier_call =3D gs101_cpu_pm_notify_callback, + .priority =3D INT_MAX /* we want to be called first */ +}; + +static int exynos_cpupm_reboot_notifier(struct notifier_block *nb, + unsigned long event, void *v) +{ + switch (event) { + case SYS_POWER_OFF: + case SYS_RESTART: + atomic_set(&pmu_context->sys_rebooting, 1); + break; + } + + return NOTIFY_OK; +} + +static struct notifier_block exynos_cpupm_reboot_nb =3D { + .priority =3D INT_MAX, + .notifier_call =3D exynos_cpupm_reboot_notifier, +}; + static int exynos_pmu_probe(struct platform_device *pdev) { struct device *dev =3D &pdev->dev; struct regmap_config pmu_regmcfg; struct regmap *regmap; struct resource *res; - int ret; + int ret, cpu; =20 pmu_base_addr =3D devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(pmu_base_addr)) @@ -444,6 +539,12 @@ static int exynos_pmu_probe(struct platform_device *pd= ev) */ dev_warn(&pdev->dev, "pmu-intr-gen syscon unavailable\n"); } else { + pmu_context->hotplug_ing =3D alloc_percpu(bool); + + /* set PMU to power on */ + for_each_online_cpu(cpu) + gs101_cpuhp_pmu_online(cpu); + cpuhp_setup_state(CPUHP_BP_PREPARE_DYN, "soc/exynos-pmu:prepare", gs101_cpuhp_pmu_online, NULL); @@ -451,6 +552,12 @@ static int exynos_pmu_probe(struct platform_device *pd= ev) cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "soc/exynos-pmu:online", NULL, gs101_cpuhp_pmu_offline); + + cpu_pm_register_notifier(&gs101_cpu_pm_notifier); + spin_lock_init(&pmu_context->cpupm_lock); + atomic_set(&pmu_context->sys_rebooting, 0); + atomic_set(&pmu_context->sys_suspended, 0); + register_reboot_notifier(&exynos_cpupm_reboot_nb); } } =20 @@ -471,10 +578,32 @@ static int exynos_pmu_probe(struct platform_device *p= dev) return 0; } =20 +#ifdef CONFIG_PM_SLEEP +static int exynos_cpupm_suspend_noirq(struct device *dev) +{ + atomic_set(&pmu_context->sys_suspended, 1); + return 0; +} + +static int exynos_cpupm_resume_noirq(struct device *dev) +{ + atomic_set(&pmu_context->sys_suspended, 0); + return 0; +} + +static const struct dev_pm_ops cpupm_pm_ops =3D { + .suspend_noirq =3D exynos_cpupm_suspend_noirq, + .resume_noirq =3D exynos_cpupm_resume_noirq, +}; +#endif + static struct platform_driver exynos_pmu_driver =3D { .driver =3D { .name =3D "exynos-pmu", .of_match_table =3D exynos_pmu_of_device_ids, +#ifdef CONFIG_PM_SLEEP + .pm =3D &cpupm_pm_ops, +#endif }, .probe =3D exynos_pmu_probe, }; --=20 2.50.0.rc1.591.g9c95f17f64-goog