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Tue, 10 Jun 2025 03:34:57 -0400 From: Jorge Marques Date: Tue, 10 Jun 2025 09:34:35 +0200 Subject: [PATCH v3 2/8] dt-bindings: iio: adc: Add adi,ad4052 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250610-iio-driver-ad4052-v3-2-cf1e44c516d4@analog.com> References: <20250610-iio-driver-ad4052-v3-0-cf1e44c516d4@analog.com> In-Reply-To: <20250610-iio-driver-ad4052-v3-0-cf1e44c516d4@analog.com> To: Jonathan Cameron , Lars-Peter Clausen , Michael Hennerich , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Corbet , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= CC: , , , , , Jorge Marques X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1749540886; l=7557; i=jorge.marques@analog.com; s=20250303; h=from:subject:message-id; bh=YGNBbAmxGFyyZoPX38c/y8+uQSUZrM5W1KEjtKOY3G8=; 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Each variant of the family differs in speed and resolution, resulting in different scan types and spi word sizes, that are matched by the compatible with the chip_info. The device contains one input (cnv) and two outputs (gp0, gp1). The outputs can be configured for range of options, such as threshold and data ready. The spi-max-frequency refers to the configuration mode maximum access speed. The ADC mode speed depends on the vio input voltage. Signed-off-by: Jorge Marques --- .../devicetree/bindings/iio/adc/adi,ad4052.yaml | 167 +++++++++++++++++= ++++ MAINTAINERS | 6 + include/dt-bindings/iio/adc/adi,ad4052.h | 17 +++ 3 files changed, 190 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4052.yaml b/Do= cumentation/devicetree/bindings/iio/adc/adi,ad4052.yaml new file mode 100644 index 0000000000000000000000000000000000000000..2cf197e2d872d9a3d4f7210121a= 1e38f784f92dc --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4052.yaml @@ -0,0 +1,167 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2025 Analog Devices Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad4052.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD4052 ADC family device driver + +maintainers: + - Jorge Marques + +description: | + Analog Devices AD4052 Single Channel Precision SAR ADC family + + https://www.analog.com/media/en/technical-documentation/data-sheets/ad40= 50-ad4056.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/ad40= 52-ad4058.pdf + +properties: + compatible: + enum: + - adi,ad4050 + - adi,ad4052 + - adi,ad4056 + - adi,ad4058 + + reg: + maxItems: 1 + + interrupts: + items: + - description: Signal coming from the GP0 pin. + - description: Signal coming from the GP1 pin. + + interrupt-names: + items: + - const: gp0 + - const: gp1 + + cnv-gpios: + description: The Convert Input (CNV). If omitted, CNV is tied to SPI C= S. + maxItems: 1 + + pwms: + maxItems: 1 + description: PWM connected to the CNV pin. + + trigger-sources: + minItems: 1 + maxItems: 2 + description: + Describes the output pin and event associated. + + "#trigger-source-cells": + const: 2 + description: | + Output pins used as trigger source. + + Cell 0 defines the event: + * 0 =3D Data ready + * 1 =3D Min threshold + * 2 =3D Max threshold + * 3 =3D Either threshold + * 4 =3D CHOP control + * 5 =3D Device enable + * 6 =3D Device ready (only GP1) + + Cell 1 defines which pin: + * 0 =3D GP0 + * 1 =3D GP1 + + For convenience, macros for these values are available in + dt-bindings/iio/adc/adi,ad4052.h. + + spi-max-frequency: + maximum: 83333333 + + vdd-supply: + description: Analog power supply. + + vio-supply: + description: Digital interface logic power supply. + + ref-supply: + description: | + Reference voltage to set the ADC full-scale range. If not present, + vdd-supply is used as the reference voltage. + +required: + - compatible + - reg + - vdd-supply + - vio-supply + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + spi { + #address-cells =3D <1>; + #size-cells =3D <0>; + + adc@0 { + compatible =3D "adi,ad4052"; + reg =3D <0>; + vdd-supply =3D <&vdd>; + vio-supply =3D <&vio>; + ref-supply =3D <&ref>; + spi-max-frequency =3D <83333333>; + + #trigger-source-cells =3D <2>; + trigger-sources =3D <&adc AD4052_TRIGGER_EVENT_EITHER_THRESH + AD4052_TRIGGER_PIN_GP0 + &adc AD4052_TRIGGER_EVENT_DATA_READY + AD4052_TRIGGER_PIN_GP1>; + interrupt-parent =3D <&gpio>; + interrupts =3D <0 0 IRQ_TYPE_EDGE_RISING>, + <0 1 IRQ_TYPE_EDGE_FALLING>; + interrupt-names =3D "gp0", "gp1"; + cnv-gpios =3D <&gpio 2 GPIO_ACTIVE_HIGH>; + }; + }; + - | + #include + #include + #include + + rx_dma { + #dma-cells =3D <1>; + }; + + spi { + #address-cells =3D <1>; + #size-cells =3D <0>; + + dmas =3D <&rx_dma 0>; + dma-names =3D "offload0-rx"; + trigger-sources =3D <&adc AD4052_TRIGGER_EVENT_DATA_READY + AD4052_TRIGGER_PIN_GP1>; + + adc@0 { + compatible =3D "adi,ad4052"; + reg =3D <0>; + vdd-supply =3D <&vdd>; + vio-supply =3D <&vio>; + spi-max-frequency =3D <83333333>; + pwms =3D <&adc_trigger 0 10000 0>; + + #trigger-source-cells =3D <2>; + trigger-sources =3D <&adc AD4052_TRIGGER_EVENT_EITHER_THRESH + AD4052_TRIGGER_PIN_GP0 + &adc AD4052_TRIGGER_EVENT_DATA_READY + AD4052_TRIGGER_PIN_GP1>; + interrupt-parent =3D <&gpio>; + interrupts =3D <0 0 IRQ_TYPE_EDGE_RISING>, + <0 1 IRQ_TYPE_EDGE_FALLING>; + interrupt-names =3D "gp0", "gp1"; + cnv-gpios =3D <&gpio 2 GPIO_ACTIVE_HIGH>; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index c02d83560058f7ea75e24509b4d87ef293df6773..d000c7de7ff9eba390f87593bc2= b1847f966f48b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1337,6 +1337,12 @@ F: Documentation/devicetree/bindings/iio/adc/adi,ad4= 030.yaml F: Documentation/iio/ad4030.rst F: drivers/iio/adc/ad4030.c =20 +ANALOG DEVICES INC AD4052 DRIVER +M: Jorge Marques +S: Supported +W: https://ez.analog.com/linux-software-drivers +F: Documentation/devicetree/bindings/iio/adc/adi,ad4052.yaml + ANALOG DEVICES INC AD4080 DRIVER M: Antoniu Miclaus L: linux-iio@vger.kernel.org diff --git a/include/dt-bindings/iio/adc/adi,ad4052.h b/include/dt-bindings= /iio/adc/adi,ad4052.h new file mode 100644 index 0000000000000000000000000000000000000000..37db5d9d10e788d5e7fb715c4ba= 9077e555131d5 --- /dev/null +++ b/include/dt-bindings/iio/adc/adi,ad4052.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ + +#ifndef _DT_BINDINGS_ADI_AD4052_H +#define _DT_BINDINGS_ADI_AD4052_H + +#define AD4052_TRIGGER_EVENT_DATA_READY 0 +#define AD4052_TRIGGER_EVENT_MIN_THRESH 1 +#define AD4052_TRIGGER_EVENT_MAX_THRESH 2 +#define AD4052_TRIGGER_EVENT_EITHER_THRESH 3 +#define AD4052_TRIGGER_EVENT_CHOP 4 +#define AD4052_TRIGGER_EVENT_DEV_ENABLED 5 +#define AD4052_TRIGGER_EVENT_DEV_READY 6 + +#define AD4052_TRIGGER_PIN_GP0 0 +#define AD4052_TRIGGER_PIN_GP1 1 + +#endif /* _DT_BINDINGS_ADI_AD4052_H */ --=20 2.49.0