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[80.116.51.117]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45213754973sm25686345e9.35.2025.06.06.07.20.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Jun 2025 07:20:44 -0700 (PDT) From: Angelo Dureghello X-Google-Original-From: Angelo Dureghello Date: Fri, 06 Jun 2025 16:19:21 +0200 Subject: [PATCH v9 6/7] iio: adc: ad7606: rename chan_scale to a more generic chan_info Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250606-wip-bl-ad7606-calibration-v9-6-6e014a1f92a2@baylibre.com> References: <20250606-wip-bl-ad7606-calibration-v9-0-6e014a1f92a2@baylibre.com> In-Reply-To: <20250606-wip-bl-ad7606-calibration-v9-0-6e014a1f92a2@baylibre.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Lars-Peter Clausen , Michael Hennerich , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Hennerich , devicetree@vger.kernel.org, Angelo Dureghello X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=13558; i=adureghello@baylibre.com; h=from:subject:message-id; bh=jM36RN95wuoXc1xpOLlSkdVG60WLPaOM5HAG18IsH9o=; b=owGbwMvMwCXGf3bn1e/btlsznlZLYshw+vGs8PPbQ80BZb7CIq8rcouE3kbvW5dx+IYw09sft jd3PM436ShlYRDjYpAVU2SpS4wwCb0dKqW8gHE2zBxWJpAhDFycAjCRmRmMDHtlstfnqiYXu0/9 N9NNNdDpsPyFzfP/fOuY+P/FsalbC7IZ/lelvJnvNmllYYTXvCjJ5U6LJicf0njW+3PvrDjHI09 UWDgA X-Developer-Key: i=adureghello@baylibre.com; a=openpgp; fpr=703CDFAD8B573EB00850E38366D1CB9419AF3953 From: Angelo Dureghello Non functional, renaming chan-related chan_scale structure to a more generic chan_info, to host other chan specific settings, not just scale-related. Signed-off-by: Angelo Dureghello --- drivers/iio/adc/ad7606.c | 142 +++++++++++++++++++++++--------------------= ---- drivers/iio/adc/ad7606.h | 8 +-- 2 files changed, 75 insertions(+), 75 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index e5878974a28293664dd8dbded5fffcea6db31ef3..d19682186e7cd73a60541f62adf= 08d987ba24ec3 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -283,21 +283,21 @@ static int ad7606_16bit_chan_scale_setup(struct iio_d= ev *indio_dev, struct iio_chan_spec *chan) { struct ad7606_state *st =3D iio_priv(indio_dev); - struct ad7606_chan_scale *cs =3D &st->chan_scales[chan->scan_index]; + struct ad7606_chan_info *ci =3D &st->chan_info[chan->scan_index]; =20 if (!st->sw_mode_en) { /* tied to logic low, analog input range is +/- 5V */ - cs->range =3D 0; - cs->scale_avail =3D ad7606_16bit_hw_scale_avail; - cs->num_scales =3D ARRAY_SIZE(ad7606_16bit_hw_scale_avail); + ci->range =3D 0; + ci->scale_avail =3D ad7606_16bit_hw_scale_avail; + ci->num_scales =3D ARRAY_SIZE(ad7606_16bit_hw_scale_avail); return 0; } =20 /* Scale of 0.076293 is only available in sw mode */ /* After reset, in software mode, =C2=B110 V is set by default */ - cs->range =3D 2; - cs->scale_avail =3D ad7606_16bit_sw_scale_avail; - cs->num_scales =3D ARRAY_SIZE(ad7606_16bit_sw_scale_avail); + ci->range =3D 2; + ci->scale_avail =3D ad7606_16bit_sw_scale_avail; + ci->num_scales =3D ARRAY_SIZE(ad7606_16bit_sw_scale_avail); =20 return 0; } @@ -359,14 +359,14 @@ static int ad7606c_18bit_chan_scale_setup(struct iio_= dev *indio_dev, struct iio_chan_spec *chan) { struct ad7606_state *st =3D iio_priv(indio_dev); - struct ad7606_chan_scale *cs =3D &st->chan_scales[chan->scan_index]; + struct ad7606_chan_info *ci =3D &st->chan_info[chan->scan_index]; bool bipolar, differential; int ret; =20 if (!st->sw_mode_en) { - cs->range =3D 0; - cs->scale_avail =3D ad7606_18bit_hw_scale_avail; - cs->num_scales =3D ARRAY_SIZE(ad7606_18bit_hw_scale_avail); + ci->range =3D 0; + ci->scale_avail =3D ad7606_18bit_hw_scale_avail; + ci->num_scales =3D ARRAY_SIZE(ad7606_18bit_hw_scale_avail); return 0; } =20 @@ -376,12 +376,12 @@ static int ad7606c_18bit_chan_scale_setup(struct iio_= dev *indio_dev, return ret; =20 if (differential) { - cs->scale_avail =3D ad7606c_18bit_differential_bipolar_scale_avail; - cs->num_scales =3D + ci->scale_avail =3D ad7606c_18bit_differential_bipolar_scale_avail; + ci->num_scales =3D ARRAY_SIZE(ad7606c_18bit_differential_bipolar_scale_avail); /* Bipolar differential ranges start at 8 (b1000) */ - cs->reg_offset =3D 8; - cs->range =3D 1; + ci->reg_offset =3D 8; + ci->range =3D 1; chan->differential =3D 1; chan->channel2 =3D chan->channel; =20 @@ -391,23 +391,23 @@ static int ad7606c_18bit_chan_scale_setup(struct iio_= dev *indio_dev, chan->differential =3D 0; =20 if (bipolar) { - cs->scale_avail =3D ad7606c_18bit_single_ended_bipolar_scale_avail; - cs->num_scales =3D + ci->scale_avail =3D ad7606c_18bit_single_ended_bipolar_scale_avail; + ci->num_scales =3D ARRAY_SIZE(ad7606c_18bit_single_ended_bipolar_scale_avail); /* Bipolar single-ended ranges start at 0 (b0000) */ - cs->reg_offset =3D 0; - cs->range =3D 3; + ci->reg_offset =3D 0; + ci->range =3D 3; chan->scan_type.sign =3D 's'; =20 return 0; } =20 - cs->scale_avail =3D ad7606c_18bit_single_ended_unipolar_scale_avail; - cs->num_scales =3D + ci->scale_avail =3D ad7606c_18bit_single_ended_unipolar_scale_avail; + ci->num_scales =3D ARRAY_SIZE(ad7606c_18bit_single_ended_unipolar_scale_avail); /* Unipolar single-ended ranges start at 5 (b0101) */ - cs->reg_offset =3D 5; - cs->range =3D 1; + ci->reg_offset =3D 5; + ci->range =3D 1; chan->scan_type.sign =3D 'u'; =20 return 0; @@ -417,14 +417,14 @@ static int ad7606c_16bit_chan_scale_setup(struct iio_= dev *indio_dev, struct iio_chan_spec *chan) { struct ad7606_state *st =3D iio_priv(indio_dev); - struct ad7606_chan_scale *cs =3D &st->chan_scales[chan->scan_index]; + struct ad7606_chan_info *ci =3D &st->chan_info[chan->scan_index]; bool bipolar, differential; int ret; =20 if (!st->sw_mode_en) { - cs->range =3D 0; - cs->scale_avail =3D ad7606_16bit_hw_scale_avail; - cs->num_scales =3D ARRAY_SIZE(ad7606_16bit_hw_scale_avail); + ci->range =3D 0; + ci->scale_avail =3D ad7606_16bit_hw_scale_avail; + ci->num_scales =3D ARRAY_SIZE(ad7606_16bit_hw_scale_avail); return 0; } =20 @@ -434,12 +434,12 @@ static int ad7606c_16bit_chan_scale_setup(struct iio_= dev *indio_dev, return ret; =20 if (differential) { - cs->scale_avail =3D ad7606c_16bit_differential_bipolar_scale_avail; - cs->num_scales =3D + ci->scale_avail =3D ad7606c_16bit_differential_bipolar_scale_avail; + ci->num_scales =3D ARRAY_SIZE(ad7606c_16bit_differential_bipolar_scale_avail); /* Bipolar differential ranges start at 8 (b1000) */ - cs->reg_offset =3D 8; - cs->range =3D 1; + ci->reg_offset =3D 8; + ci->range =3D 1; chan->differential =3D 1; chan->channel2 =3D chan->channel; chan->scan_type.sign =3D 's'; @@ -450,23 +450,23 @@ static int ad7606c_16bit_chan_scale_setup(struct iio_= dev *indio_dev, chan->differential =3D 0; =20 if (bipolar) { - cs->scale_avail =3D ad7606c_16bit_single_ended_bipolar_scale_avail; - cs->num_scales =3D + ci->scale_avail =3D ad7606c_16bit_single_ended_bipolar_scale_avail; + ci->num_scales =3D ARRAY_SIZE(ad7606c_16bit_single_ended_bipolar_scale_avail); /* Bipolar single-ended ranges start at 0 (b0000) */ - cs->reg_offset =3D 0; - cs->range =3D 3; + ci->reg_offset =3D 0; + ci->range =3D 3; chan->scan_type.sign =3D 's'; =20 return 0; } =20 - cs->scale_avail =3D ad7606c_16bit_single_ended_unipolar_scale_avail; - cs->num_scales =3D + ci->scale_avail =3D ad7606c_16bit_single_ended_unipolar_scale_avail; + ci->num_scales =3D ARRAY_SIZE(ad7606c_16bit_single_ended_unipolar_scale_avail); /* Unipolar single-ended ranges start at 5 (b0101) */ - cs->reg_offset =3D 5; - cs->range =3D 1; + ci->reg_offset =3D 5; + ci->range =3D 1; chan->scan_type.sign =3D 'u'; =20 return 0; @@ -476,11 +476,11 @@ static int ad7607_chan_scale_setup(struct iio_dev *in= dio_dev, struct iio_chan_spec *chan) { struct ad7606_state *st =3D iio_priv(indio_dev); - struct ad7606_chan_scale *cs =3D &st->chan_scales[chan->scan_index]; + struct ad7606_chan_info *ci =3D &st->chan_info[chan->scan_index]; =20 - cs->range =3D 0; - cs->scale_avail =3D ad7607_hw_scale_avail; - cs->num_scales =3D ARRAY_SIZE(ad7607_hw_scale_avail); + ci->range =3D 0; + ci->scale_avail =3D ad7607_hw_scale_avail; + ci->num_scales =3D ARRAY_SIZE(ad7607_hw_scale_avail); return 0; } =20 @@ -488,11 +488,11 @@ static int ad7608_chan_scale_setup(struct iio_dev *in= dio_dev, struct iio_chan_spec *chan) { struct ad7606_state *st =3D iio_priv(indio_dev); - struct ad7606_chan_scale *cs =3D &st->chan_scales[chan->scan_index]; + struct ad7606_chan_info *ci =3D &st->chan_info[chan->scan_index]; =20 - cs->range =3D 0; - cs->scale_avail =3D ad7606_18bit_hw_scale_avail; - cs->num_scales =3D ARRAY_SIZE(ad7606_18bit_hw_scale_avail); + ci->range =3D 0; + ci->scale_avail =3D ad7606_18bit_hw_scale_avail; + ci->num_scales =3D ARRAY_SIZE(ad7606_18bit_hw_scale_avail); return 0; } =20 @@ -500,11 +500,11 @@ static int ad7609_chan_scale_setup(struct iio_dev *in= dio_dev, struct iio_chan_spec *chan) { struct ad7606_state *st =3D iio_priv(indio_dev); - struct ad7606_chan_scale *cs =3D &st->chan_scales[chan->scan_index]; + struct ad7606_chan_info *ci =3D &st->chan_info[chan->scan_index]; =20 - cs->range =3D 0; - cs->scale_avail =3D ad7609_hw_scale_avail; - cs->num_scales =3D ARRAY_SIZE(ad7609_hw_scale_avail); + ci->range =3D 0; + ci->scale_avail =3D ad7609_hw_scale_avail; + ci->num_scales =3D ARRAY_SIZE(ad7609_hw_scale_avail); return 0; } =20 @@ -743,7 +743,7 @@ static int ad7606_read_raw(struct iio_dev *indio_dev, { int ret, ch =3D 0; struct ad7606_state *st =3D iio_priv(indio_dev); - struct ad7606_chan_scale *cs; + struct ad7606_chan_info *ci; struct pwm_state cnvst_pwm_state; =20 switch (m) { @@ -758,9 +758,9 @@ static int ad7606_read_raw(struct iio_dev *indio_dev, case IIO_CHAN_INFO_SCALE: if (st->sw_mode_en) ch =3D chan->scan_index; - cs =3D &st->chan_scales[ch]; - *val =3D cs->scale_avail[cs->range][0]; - *val2 =3D cs->scale_avail[cs->range][1]; + ci =3D &st->chan_info[ch]; + *val =3D ci->scale_avail[ci->range][0]; + *val2 =3D ci->scale_avail[ci->range][1]; return IIO_VAL_INT_PLUS_MICRO; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: *val =3D st->oversampling; @@ -795,12 +795,12 @@ static ssize_t in_voltage_scale_available_show(struct= device *dev, { struct iio_dev *indio_dev =3D dev_to_iio_dev(dev); struct ad7606_state *st =3D iio_priv(indio_dev); - struct ad7606_chan_scale *cs =3D &st->chan_scales[0]; - const unsigned int (*vals)[2] =3D cs->scale_avail; + struct ad7606_chan_info *ci =3D &st->chan_info[0]; + const unsigned int (*vals)[2] =3D ci->scale_avail; unsigned int i; size_t len =3D 0; =20 - for (i =3D 0; i < cs->num_scales; i++) + for (i =3D 0; i < ci->num_scales; i++) len +=3D scnprintf(buf + len, PAGE_SIZE - len, "%u.%06u ", vals[i][0], vals[i][1]); buf[len - 1] =3D '\n'; @@ -901,7 +901,7 @@ static int ad7606_write_raw(struct iio_dev *indio_dev, { struct ad7606_state *st =3D iio_priv(indio_dev); unsigned int scale_avail_uv[AD760X_MAX_SCALES]; - struct ad7606_chan_scale *cs; + struct ad7606_chan_info *ci; int i, ret, ch =3D 0; =20 guard(mutex)(&st->lock); @@ -910,21 +910,21 @@ static int ad7606_write_raw(struct iio_dev *indio_dev, case IIO_CHAN_INFO_SCALE: if (st->sw_mode_en) ch =3D chan->scan_index; - cs =3D &st->chan_scales[ch]; - for (i =3D 0; i < cs->num_scales; i++) { - scale_avail_uv[i] =3D cs->scale_avail[i][0] * MICRO + - cs->scale_avail[i][1]; + ci =3D &st->chan_info[ch]; + for (i =3D 0; i < ci->num_scales; i++) { + scale_avail_uv[i] =3D ci->scale_avail[i][0] * MICRO + + ci->scale_avail[i][1]; } val =3D (val * MICRO) + val2; - i =3D find_closest(val, scale_avail_uv, cs->num_scales); + i =3D find_closest(val, scale_avail_uv, ci->num_scales); =20 if (!iio_device_claim_direct(indio_dev)) return -EBUSY; - ret =3D st->write_scale(indio_dev, ch, i + cs->reg_offset); + ret =3D st->write_scale(indio_dev, ch, i + ci->reg_offset); iio_device_release_direct(indio_dev); if (ret < 0) return ret; - cs->range =3D i; + ci->range =3D i; =20 return 0; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: @@ -1115,7 +1115,7 @@ static int ad7606_read_avail(struct iio_dev *indio_de= v, long info) { struct ad7606_state *st =3D iio_priv(indio_dev); - struct ad7606_chan_scale *cs; + struct ad7606_chan_info *ci; unsigned int ch =3D 0; =20 switch (info) { @@ -1130,9 +1130,9 @@ static int ad7606_read_avail(struct iio_dev *indio_de= v, if (st->sw_mode_en) ch =3D chan->scan_index; =20 - cs =3D &st->chan_scales[ch]; - *vals =3D (int *)cs->scale_avail; - *length =3D cs->num_scales * 2; + ci =3D &st->chan_info[ch]; + *vals =3D (int *)ci->scale_avail; + *length =3D ci->num_scales * 2; *type =3D IIO_VAL_INT_PLUS_MICRO; =20 return IIO_AVAIL_LIST; @@ -1655,7 +1655,7 @@ static int ad7606_resume(struct device *dev) struct ad7606_state *st =3D iio_priv(indio_dev); =20 if (st->gpio_standby) { - gpiod_set_value(st->gpio_range, st->chan_scales[0].range); + gpiod_set_value(st->gpio_range, st->chan_info[0].range); gpiod_set_value(st->gpio_standby, 1); ad7606_reset(st); } diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index f613583a7fa4095115b0b28e3f8e51cd32b93524..26db8e3c724f47f68b7d5323f5d= 1db75b3334540 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -86,14 +86,14 @@ struct ad7606_chip_info { }; =20 /** - * struct ad7606_chan_scale - channel scale configuration + * struct ad7606_chan_info - channel configuration * @scale_avail: pointer to the array which stores the available scales * @num_scales: number of elements stored in the scale_avail array * @range: voltage range selection, selects which scale to apply * @reg_offset: offset for the register value, to be applied when * writing the value of 'range' to the register value */ -struct ad7606_chan_scale { +struct ad7606_chan_info { #define AD760X_MAX_SCALES 16 const unsigned int (*scale_avail)[2]; unsigned int num_scales; @@ -106,7 +106,7 @@ struct ad7606_chan_scale { * @dev: pointer to kernel device * @chip_info: entry in the table of chips that describes this device * @bops: bus operations (SPI or parallel) - * @chan_scales: scale configuration for channels + * @chan_info: scale configuration for channels * @oversampling: oversampling selection * @cnvst_pwm: pointer to the PWM device connected to the cnvst pin * @base_address: address from where to read data in parallel operation @@ -137,7 +137,7 @@ struct ad7606_state { struct device *dev; const struct ad7606_chip_info *chip_info; const struct ad7606_bus_ops *bops; - struct ad7606_chan_scale chan_scales[AD760X_MAX_CHANNELS]; + struct ad7606_chan_info chan_info[AD760X_MAX_CHANNELS]; unsigned int oversampling; struct pwm_device *cnvst_pwm; void __iomem *base_address; --=20 2.49.0