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Darwish" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1749151506; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1LVvx7eIEVDJLIVUqt5/zmHhvKagbb+ZKbwzhn6boLs=; b=OdZmDhv0S/p4nfyvazaKvRR/lNJl0UQ2tP7eKAJW/sVRahk6W/9TKII+P4tLUBOuGtbyVH JtFNPWR24P+tARsUFtgGbTD/GcIWLFQkpqd6GEWaQ1xDHXyOFI5aAaBL7WyF52JqBxjfiZ hlCTD8IS0BuOBc+YTIWPi2lDEx6eyIta4ljKrB5aNB7H6oiuWvUcqykZxtEcdBoRWfzXiU 65LWZTmOdKPcLMBTy6X4vi585IKaAk3CIYe+3mBVvHdl1aPsTbhaQUC8bqPWED1U6Ex3PT wZ6QuEOVdvN4YWotn9O9UM4ztlJAZRGQ86lgeVybmRmIv6lOHxPrv5gBXCNawA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1749151506; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1LVvx7eIEVDJLIVUqt5/zmHhvKagbb+ZKbwzhn6boLs=; b=Ac42tVHgyXzvVzjLUJce86qVLFvAwuw4DVW/TfiDLMNqiSA5m2DbnP8Jf+1pDzBuMhgBWi zlcRmgGgpAFVwpBQ== To: Ingo Molnar , Borislav Petkov , Dave Hansen Cc: Thomas Gleixner , Andrew Cooper , "H. Peter Anvin" , Peter Zijlstra , Sean Christopherson , Sohil Mehta , Ard Biesheuvel , John Ogness , x86@kernel.org, x86-cpuid@lists.linux.dev, LKML , "Ahmed S. Darwish" Subject: [PATCH v2 18/27] x86/cpuid: Parse deterministic cache parameters CPUID leaves Date: Thu, 5 Jun 2025 21:23:47 +0200 Message-ID: <20250605192356.82250-19-darwi@linutronix.de> In-Reply-To: <20250605192356.82250-1-darwi@linutronix.de> References: <20250605192356.82250-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add CPUID parser logic for Intel CPUID(0x4) and AMD CPUID(0x8000001d). Define a single cpuid_read_deterministic_cache() parsing function for both leaves, as both have the same subleaf cache enumeration logic. Introduce __define_cpuid_read_function() macro to avoid code duplication between cpuid_read_generic(), the CPUID parser's default read function, and the new cpuid_read_deterministic_cache() one. Signed-off-by: Ahmed S. Darwish --- arch/x86/include/asm/cpuid/types.h | 2 ++ arch/x86/kernel/cpu/cpuid_parser.c | 40 +++++++++++++++++++++++++----- arch/x86/kernel/cpu/cpuid_parser.h | 4 ++- 3 files changed, 39 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/cpuid/types.h b/arch/x86/include/asm/cpui= d/types.h index 7bbf0671cb95..89c399629e58 100644 --- a/arch/x86/include/asm/cpuid/types.h +++ b/arch/x86/include/asm/cpuid/types.h @@ -216,7 +216,9 @@ struct cpuid_leaves { CPUID_LEAF(0x0, 0, 1); CPUID_LEAF(0x1, 0, 1); CPUID_LEAF(0x2, 0, 1); + CPUID_LEAF(0x4, 0, 8); CPUID_LEAF(0x80000000, 0, 1); + CPUID_LEAF(0x8000001d, 0, 8); }; =20 /* diff --git a/arch/x86/kernel/cpu/cpuid_parser.c b/arch/x86/kernel/cpu/cpuid= _parser.c index 4b960b23cab4..1f3b4cd6b411 100644 --- a/arch/x86/kernel/cpu/cpuid_parser.c +++ b/arch/x86/kernel/cpu/cpuid_parser.c @@ -14,15 +14,43 @@ =20 #include "cpuid_parser.h" =20 +/** + * __define_cpuid_read_function() - Generate a CPUID parser read function + * @_suffix: Suffix for the generated function name (full name: cpuid_read= _@_suffix()) + * @_leaf_t: Type to cast the CPUID query output storage pointer + * @_leaf: Name of the CPUID query storage pointer + * @_break_c: Condition to break the CPUID parsing loop, which may referen= ce @_leaf, and + * where @_leaf stores each iteration's CPUID query output. + * + * Define a CPUID parser read function according to the requirements state= d at + * &struct cpuid_parse_entry->read(). + */ +#define __define_cpuid_read_function(_suffix, _leaf_t, _leaf, _break_c) = \ +static void \ +cpuid_read_##_suffix(const struct cpuid_parse_entry *e, struct cpuid_read_= output *output) \ +{ \ + struct _leaf_t *_leaf =3D (struct _leaf_t *)output->regs; \ + \ + static_assert(sizeof(*_leaf) =3D=3D 16); \ + \ + output->info->nr_entries =3D 0; \ + for (int i =3D 0; i < e->maxcnt; i++, _leaf++, output->info->nr_entries++= ) { \ + cpuid_read_subleaf(e->leaf, e->subleaf + i, _leaf); \ + if (_break_c) \ + break; \ + } \ +} + /* * Default CPUID parser read function */ -static void cpuid_read_generic(const struct cpuid_parse_entry *e, struct c= puid_read_output *output) -{ - output->info->nr_entries =3D 0; - for (int i =3D 0; i < e->maxcnt; i++, output->regs++, output->info->nr_en= tries++) - cpuid_read_subleaf(e->leaf, e->subleaf + i, output->regs); -} +__define_cpuid_read_function(generic, cpuid_regs, ignored, false); + +/* + * Shared read function for Intel CPUID leaf 0x4 and AMD CPUID leaf 0x8000= 001d, + * as both have the same subleaf enumeration logic and registers output fo= rmat. + */ +__define_cpuid_read_function(deterministic_cache, leaf_0x4_0, leaf, leaf->= cache_type =3D=3D 0); =20 static void cpuid_read_0x2(const struct cpuid_parse_entry *e, struct cpuid= _read_output *output) { diff --git a/arch/x86/kernel/cpu/cpuid_parser.h b/arch/x86/kernel/cpu/cpuid= _parser.h index 3178e760e2b3..c79c77547a1d 100644 --- a/arch/x86/kernel/cpu/cpuid_parser.h +++ b/arch/x86/kernel/cpu/cpuid_parser.h @@ -97,7 +97,9 @@ struct cpuid_parse_entry { CPUID_PARSE_ENTRY(0x0, 0, generic), \ CPUID_PARSE_ENTRY(0x1, 0, generic), \ CPUID_PARSE_ENTRY(0x2, 0, 0x2), \ - CPUID_PARSE_ENTRY(0x80000000, 0, 0x80000000), + CPUID_PARSE_ENTRY(0x4, 0, deterministic_cache), \ + CPUID_PARSE_ENTRY(0x80000000, 0, 0x80000000), \ + CPUID_PARSE_ENTRY(0x8000001d, 0, deterministic_cache), =20 extern const struct cpuid_parse_entry cpuid_common_parse_entries[]; extern const int cpuid_common_parse_entries_size; --=20 2.49.0