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Thu, 5 Jun 2025 11:11:04 -0400 From: Pop Ioan Daniel To: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , "David Lechner" , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sergiu Cuciurean , "Dragos Bogdan" , Antoniu Miclaus , Olivier Moysan , Javier Carrasco , Matti Vaittinen , Angelo Dureghello , Guillaume Stols , Tobias Sperling , Marcelo Schmitt , Trevor Gamblin , Alisa-Dariana Roman , Ramona Alexandra Nechita , Herve Codina , AngeloGioacchino Del Regno , "Thomas Bonnefille" , =?UTF-8?q?Jo=C3=A3o=20Paulo=20Gon=C3=A7alves?= , Ioan Daniel , , , Subject: [PATCH v7 5/5] iio: adc: ad7405: add ad7405 driver Date: Thu, 5 Jun 2025 18:09:43 +0300 Message-ID: <20250605150948.3091827-6-pop.ioan-daniel@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250605150948.3091827-1-pop.ioan-daniel@analog.com> References: <20250605150948.3091827-1-pop.ioan-daniel@analog.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; 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Signed-off-by: Pop Ioan Daniel Reviewed-by: Nuno S=C3=A1 --- changes in v7: - replace kernel.h with math64.h that define DIV_ROUND_CLOSEST_ULL() - restructure ad7405_set_dec_rate function - fix indentation drivers/iio/adc/Kconfig | 10 ++ drivers/iio/adc/Makefile | 1 + drivers/iio/adc/ad7405.c | 259 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 270 insertions(+) create mode 100644 drivers/iio/adc/ad7405.c diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index ad06cf556785..43af2070e27f 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -251,6 +251,16 @@ config AD7380 To compile this driver as a module, choose M here: the module will be called ad7380. =20 +config AD7405 + tristate "Analog Device AD7405 ADC Driver" + depends on IIO_BACKEND + help + Say yes here to build support for Analog Devices AD7405, ADUM7701, + ADUM7702, ADUM7703 analog to digital converters (ADC). + + To compile this driver as a module, choose M here: the module will be + called ad7405. + config AD7476 tristate "Analog Devices AD7476 1-channel ADCs driver and other similar d= evices from AD and TI" depends on SPI diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile index 07d4b832c42e..8115f30b7862 100644 --- a/drivers/iio/adc/Makefile +++ b/drivers/iio/adc/Makefile @@ -26,6 +26,7 @@ obj-$(CONFIG_AD7291) +=3D ad7291.o obj-$(CONFIG_AD7292) +=3D ad7292.o obj-$(CONFIG_AD7298) +=3D ad7298.o obj-$(CONFIG_AD7380) +=3D ad7380.o +obj-$(CONFIG_AD7405) +=3D ad7405.o obj-$(CONFIG_AD7476) +=3D ad7476.o obj-$(CONFIG_AD7606_IFACE_PARALLEL) +=3D ad7606_par.o obj-$(CONFIG_AD7606_IFACE_SPI) +=3D ad7606_spi.o diff --git a/drivers/iio/adc/ad7405.c b/drivers/iio/adc/ad7405.c new file mode 100644 index 000000000000..c07b90fbd429 --- /dev/null +++ b/drivers/iio/adc/ad7405.c @@ -0,0 +1,259 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Analog Devices AD7405 driver + * + * Copyright 2025 Analog Devices Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +static const unsigned int ad7405_dec_rates_range[] =3D { + 32, 1, 4096, +}; + +struct ad7405_chip_info { + const char *name; + struct iio_chan_spec channel; + const unsigned int full_scale_mv; +}; + +struct ad7405_state { + struct iio_backend *back; + const struct ad7405_chip_info *info; + unsigned int ref_frequency; + unsigned int dec_rate; +}; + +static int ad7405_set_dec_rate(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + unsigned int dec_rate) +{ + struct ad7405_state *st =3D iio_priv(indio_dev); + int ret; + + if (dec_rate > 4096 || dec_rate < 32) + return -EINVAL; + + if (!iio_device_claim_direct(indio_dev)) + return -EBUSY; + + ret =3D iio_backend_oversampling_ratio_set(st->back, chan->scan_index, de= c_rate); + iio_device_release_direct(indio_dev); + + if (ret < 0) + return ret; + + st->dec_rate =3D dec_rate; + + return 0; +} + +static int ad7405_read_raw(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, int *val, + int *val2, long info) +{ + struct ad7405_state *st =3D iio_priv(indio_dev); + + switch (info) { + case IIO_CHAN_INFO_SCALE: + *val =3D st->info->full_scale_mv; + *val2 =3D st->info->channel.scan_type.realbits - 1; + return IIO_VAL_FRACTIONAL_LOG2; + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + *val =3D st->dec_rate; + return IIO_VAL_INT; + case IIO_CHAN_INFO_SAMP_FREQ: + *val =3D DIV_ROUND_CLOSEST_ULL(st->ref_frequency, st->dec_rate); + return IIO_VAL_INT; + case IIO_CHAN_INFO_OFFSET: + *val =3D -(1 << (st->info->channel.scan_type.realbits - 1)); + return IIO_VAL_INT; + default: + return -EINVAL; + } +} + +static int ad7405_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int val, + int val2, long info) +{ + switch (info) { + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + if (val < 0) + return -EINVAL; + return ad7405_set_dec_rate(indio_dev, chan, val); + default: + return -EINVAL; + } +} + +static int ad7405_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long info) +{ + switch (info) { + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + *vals =3D ad7405_dec_rates_range; + *type =3D IIO_VAL_INT; + return IIO_AVAIL_RANGE; + default: + return -EINVAL; + } +} + +static const struct iio_info ad7405_iio_info =3D { + .read_raw =3D &ad7405_read_raw, + .write_raw =3D &ad7405_write_raw, + .read_avail =3D &ad7405_read_avail, +}; + +#define AD7405_IIO_CHANNEL { \ + .type =3D IIO_VOLTAGE, \ + .info_mask_shared_by_type =3D BIT(IIO_CHAN_INFO_SCALE) | \ + BIT(IIO_CHAN_INFO_OFFSET), \ + .info_mask_shared_by_all =3D IIO_CHAN_INFO_SAMP_FREQ | \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + .info_mask_shared_by_all_available =3D \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + .indexed =3D 1, \ + .channel =3D 0, \ + .channel2 =3D 1, \ + .differential =3D 1, \ + .scan_index =3D 0, \ + .scan_type =3D { \ + .sign =3D 'u', \ + .realbits =3D 16, \ + .storagebits =3D 16, \ + }, \ +} + +static const struct ad7405_chip_info ad7405_chip_info =3D { + .name =3D "ad7405", + .full_scale_mv =3D 320, + .channel =3D AD7405_IIO_CHANNEL, +}; + +static const struct ad7405_chip_info adum7701_chip_info =3D { + .name =3D "adum7701", + .full_scale_mv =3D 320, + .channel =3D AD7405_IIO_CHANNEL, +}; + +static const struct ad7405_chip_info adum7702_chip_info =3D { + .name =3D "adum7702", + .full_scale_mv =3D 64, + .channel =3D AD7405_IIO_CHANNEL, +}; + +static const struct ad7405_chip_info adum7703_chip_info =3D { + .name =3D "adum7703", + .full_scale_mv =3D 320, + .channel =3D AD7405_IIO_CHANNEL, +}; + +static const char * const ad7405_power_supplies[] =3D { + "vdd1", "vdd2", +}; + +static int ad7405_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct iio_dev *indio_dev; + struct ad7405_state *st; + struct clk *clk; + int ret; + + indio_dev =3D devm_iio_device_alloc(dev, sizeof(*st)); + if (!indio_dev) + return -ENOMEM; + + st =3D iio_priv(indio_dev); + + st->info =3D device_get_match_data(dev); + if (!st->info) + return dev_err_probe(dev, -EINVAL, "no chip info\n"); + + ret =3D devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(ad7405_power_suppl= ies), + ad7405_power_supplies); + if (ret) + return dev_err_probe(dev, ret, "failed to get and enable supplies"); + + clk =3D devm_clk_get_enabled(dev, NULL); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + st->ref_frequency =3D clk_get_rate(clk); + if (!st->ref_frequency) + return -EINVAL; + + indio_dev->name =3D st->info->name; + indio_dev->channels =3D &st->info->channel; + indio_dev->num_channels =3D 1; + indio_dev->info =3D &ad7405_iio_info; + + st->back =3D devm_iio_backend_get(dev, NULL); + if (IS_ERR(st->back)) + return dev_err_probe(dev, PTR_ERR(st->back), + "failed to get IIO backend"); + + ret =3D iio_backend_chan_enable(st->back, 0); + if (ret) + return ret; + + ret =3D devm_iio_backend_request_buffer(dev, st->back, indio_dev); + if (ret) + return ret; + + ret =3D devm_iio_backend_enable(dev, st->back); + if (ret) + return ret; + + /* + * Set 256 decimation rate. The default value in the AXI_ADC register + * is 0, so we set the register with a decimation rate value that is + * functional for all parts. + */ + ret =3D ad7405_set_dec_rate(indio_dev, &indio_dev->channels[0], 256); + if (ret) + return ret; + + return devm_iio_device_register(dev, indio_dev); +} + +static const struct of_device_id ad7405_of_match[] =3D { + { .compatible =3D "adi,ad7405", .data =3D &ad7405_chip_info, }, + { .compatible =3D "adi,adum7701", .data =3D &adum7701_chip_info, }, + { .compatible =3D "adi,adum7702", .data =3D &adum7702_chip_info, }, + { .compatible =3D "adi,adum7703", .data =3D &adum7703_chip_info, }, + { } +}; +MODULE_DEVICE_TABLE(of, ad7405_of_match); + +static struct platform_driver ad7405_driver =3D { + .driver =3D { + .name =3D "ad7405", + .owner =3D THIS_MODULE, + .of_match_table =3D ad7405_of_match, + }, + .probe =3D ad7405_probe, +}; +module_platform_driver(ad7405_driver); + +MODULE_AUTHOR("Dragos Bogdan "); +MODULE_AUTHOR("Pop Ioan Daniel "); +MODULE_DESCRIPTION("Analog Devices AD7405 driver"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS("IIO_BACKEND"); --=20 2.34.1