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Thu, 05 Jun 2025 15:05:19 -0700 (PDT) From: Gustavo Silva Date: Thu, 05 Jun 2025 19:05:02 -0300 Subject: [PATCH v2 2/3] iio: imu: bmi270: add step counter watermark event Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250605-bmi270-events-v2-2-8b2c07d0c213@gmail.com> References: <20250605-bmi270-events-v2-0-8b2c07d0c213@gmail.com> In-Reply-To: <20250605-bmi270-events-v2-0-8b2c07d0c213@gmail.com> To: Alex Lanzano , Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Gustavo Silva X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1749161110; l=7709; i=gustavograzs@gmail.com; s=20250111; h=from:subject:message-id; bh=HguUGu/bZDJEa5tPw74JL0xBHaO75/9Cub6FaLQFDyE=; b=CTMLaZEOYAYB0RHVi1memO2cWtH/oMSoz8izbmPj1cW7EAxr9l7JoFtGV7yEQuGtYBpjp/TbI xG6I+CUNBc8Dk2u5uetD2Z13stDEAQBBSyFR5mGTCtGZNJCo85yTsGB X-Developer-Key: i=gustavograzs@gmail.com; a=ed25519; pk=g2TFXpo1jMCOCN+rzVoM9NDFNfSMOgVyY0rlyvk4RTM= Add support for generating events when the step counter reaches the configurable watermark. Reviewed-by: Andy Shevchenko Signed-off-by: Gustavo Silva --- drivers/iio/imu/bmi270/bmi270_core.c | 174 +++++++++++++++++++++++++++++++= +++- 1 file changed, 171 insertions(+), 3 deletions(-) diff --git a/drivers/iio/imu/bmi270/bmi270_core.c b/drivers/iio/imu/bmi270/= bmi270_core.c index 6056f7635c5a6e89b670322adfeae0cb7dc5cd9a..0798eb1da3ecc3cecaf7d7d4721= 4bb07f4ec294f 100644 --- a/drivers/iio/imu/bmi270/bmi270_core.c +++ b/drivers/iio/imu/bmi270/bmi270_core.c @@ -8,6 +8,7 @@ #include #include =20 +#include #include #include #include @@ -28,6 +29,9 @@ #define BMI270_ACCEL_X_REG 0x0c #define BMI270_ANG_VEL_X_REG 0x12 =20 +#define BMI270_INT_STATUS_0_REG 0x1c +#define BMI270_INT_STATUS_0_STEP_CNT_MSK BIT(1) + #define BMI270_INT_STATUS_1_REG 0x1d #define BMI270_INT_STATUS_1_ACC_GYR_DRDY_MSK GENMASK(7, 6) =20 @@ -74,6 +78,10 @@ #define BMI270_INT_LATCH_REG 0x55 #define BMI270_INT_LATCH_REG_MSK BIT(0) =20 +#define BMI270_INT1_MAP_FEAT_REG 0x56 +#define BMI270_INT2_MAP_FEAT_REG 0x57 +#define BMI270_INT_MAP_FEAT_STEP_CNT_WTRMRK_MSK BIT(1) + #define BMI270_INT_MAP_DATA_REG 0x58 #define BMI270_INT_MAP_DATA_DRDY_INT1_MSK BIT(2) #define BMI270_INT_MAP_DATA_DRDY_INT2_MSK BIT(6) @@ -94,6 +102,7 @@ #define BMI270_PWR_CTRL_ACCEL_EN_MSK BIT(2) #define BMI270_PWR_CTRL_TEMP_EN_MSK BIT(3) =20 +#define BMI270_STEP_SC26_WTRMRK_MSK GENMASK(9, 0) #define BMI270_STEP_SC26_RST_CNT_MSK BIT(10) #define BMI270_STEP_SC26_EN_CNT_MSK BIT(12) =20 @@ -101,6 +110,10 @@ #define BMI270_TEMP_OFFSET 11776 #define BMI270_TEMP_SCALE 1953125 =20 +/* See page 90 of datasheet. The step counter "holds implicitly a 20x fact= or" */ +#define BMI270_STEP_COUNTER_FACTOR 20 +#define BMI270_STEP_COUNTER_MAX 20460 + #define BMI260_INIT_DATA_FILE "bmi260-init-data.fw" #define BMI270_INIT_DATA_FILE "bmi270-init-data.fw" =20 @@ -396,6 +409,40 @@ static int bmi270_read_steps(struct bmi270_data *data,= int *val) return IIO_VAL_INT; } =20 +static int bmi270_int_map_reg(enum bmi270_irq_pin pin) +{ + switch (pin) { + case BMI270_IRQ_INT1: + return BMI270_INT1_MAP_FEAT_REG; + case BMI270_IRQ_INT2: + return BMI270_INT2_MAP_FEAT_REG; + default: + return -EINVAL; + } +} + +static int bmi270_step_wtrmrk_en(struct bmi270_data *data, bool state) +{ + int ret, reg; + + guard(mutex)(&data->mutex); + if (!data->steps_enabled) + return -EINVAL; + + reg =3D bmi270_int_map_reg(data->irq_pin); + if (reg < 0) + return reg; + + ret =3D regmap_update_bits(data->regmap, reg, + BMI270_INT_MAP_FEAT_STEP_CNT_WTRMRK_MSK, + FIELD_PREP(BMI270_INT_MAP_FEAT_STEP_CNT_WTRMRK_MSK, + state)); + if (ret) + return ret; + + return 0; +} + static int bmi270_set_scale(struct bmi270_data *data, int chan_type, int u= scale) { int i; @@ -552,19 +599,31 @@ static irqreturn_t bmi270_irq_thread_handler(int irq,= void *private) { struct iio_dev *indio_dev =3D private; struct bmi270_data *data =3D iio_priv(indio_dev); - unsigned int status; + unsigned int status0, status1; + s64 timestamp =3D iio_get_time_ns(indio_dev); int ret; =20 scoped_guard(mutex, &data->mutex) { + ret =3D regmap_read(data->regmap, BMI270_INT_STATUS_0_REG, + &status0); + if (ret) + return IRQ_NONE; + ret =3D regmap_read(data->regmap, BMI270_INT_STATUS_1_REG, - &status); + &status1); if (ret) return IRQ_NONE; } =20 - if (FIELD_GET(BMI270_INT_STATUS_1_ACC_GYR_DRDY_MSK, status)) + if (FIELD_GET(BMI270_INT_STATUS_1_ACC_GYR_DRDY_MSK, status1)) iio_trigger_poll_nested(data->trig); =20 + if (FIELD_GET(BMI270_INT_STATUS_0_STEP_CNT_MSK, status0)) + iio_push_event(indio_dev, IIO_UNMOD_EVENT_CODE(IIO_STEPS, 0, + IIO_EV_TYPE_CHANGE, + IIO_EV_DIR_NONE), + timestamp); + return IRQ_HANDLED; } =20 @@ -772,10 +831,117 @@ static int bmi270_read_avail(struct iio_dev *indio_d= ev, } } =20 +static int bmi270_write_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, bool state) +{ + struct bmi270_data *data =3D iio_priv(indio_dev); + + switch (type) { + case IIO_EV_TYPE_CHANGE: + return bmi270_step_wtrmrk_en(data, state); + default: + return -EINVAL; + } +} + +static int bmi270_read_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir) +{ + struct bmi270_data *data =3D iio_priv(indio_dev); + int ret, reg, regval; + + guard(mutex)(&data->mutex); + + switch (chan->type) { + case IIO_STEPS: + reg =3D bmi270_int_map_reg(data->irq_pin); + if (reg) + return reg; + + ret =3D regmap_read(data->regmap, reg, ®val); + if (ret) + return ret; + return FIELD_GET(BMI270_INT_MAP_FEAT_STEP_CNT_WTRMRK_MSK, + regval) ? 1 : 0; + default: + return -EINVAL; + } +} + +static int bmi270_write_event_value(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int val, int val2) +{ + struct bmi270_data *data =3D iio_priv(indio_dev); + unsigned int raw; + + guard(mutex)(&data->mutex); + + switch (type) { + case IIO_EV_TYPE_CHANGE: + if (!in_range(val, 0, BMI270_STEP_COUNTER_MAX + 1)) + return -EINVAL; + + raw =3D val / BMI270_STEP_COUNTER_FACTOR; + return bmi270_update_feature_reg(data, BMI270_SC_26_REG, + BMI270_STEP_SC26_WTRMRK_MSK, + FIELD_PREP(BMI270_STEP_SC26_WTRMRK_MSK, + raw)); + default: + return -EINVAL; + } +} + +static int bmi270_read_event_value(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int *val, int *val2) +{ + struct bmi270_data *data =3D iio_priv(indio_dev); + unsigned int raw; + u16 regval; + int ret; + + guard(mutex)(&data->mutex); + + switch (type) { + case IIO_EV_TYPE_CHANGE: + ret =3D bmi270_read_feature_reg(data, BMI270_SC_26_REG, ®val); + if (ret) + return ret; + + raw =3D FIELD_GET(BMI270_STEP_SC26_WTRMRK_MSK, regval); + *val =3D raw * BMI270_STEP_COUNTER_FACTOR; + return IIO_VAL_INT; + default: + return -EINVAL; + } +} + +static const struct iio_event_spec bmi270_step_wtrmrk_event =3D { + .type =3D IIO_EV_TYPE_CHANGE, + .dir =3D IIO_EV_DIR_NONE, + .mask_shared_by_type =3D BIT(IIO_EV_INFO_ENABLE) | + BIT(IIO_EV_INFO_VALUE), +}; + static const struct iio_info bmi270_info =3D { .read_raw =3D bmi270_read_raw, .write_raw =3D bmi270_write_raw, .read_avail =3D bmi270_read_avail, + .write_event_config =3D bmi270_write_event_config, + .read_event_config =3D bmi270_read_event_config, + .write_event_value =3D bmi270_write_event_value, + .read_event_value =3D bmi270_read_event_value, }; =20 #define BMI270_ACCEL_CHANNEL(_axis) { \ @@ -835,6 +1001,8 @@ static const struct iio_chan_spec bmi270_channels[] = =3D { .info_mask_separate =3D BIT(IIO_CHAN_INFO_ENABLE) | BIT(IIO_CHAN_INFO_PROCESSED), .scan_index =3D -1, /* No buffer support */ + .event_spec =3D &bmi270_step_wtrmrk_event, + .num_event_specs =3D 1, }, IIO_CHAN_SOFT_TIMESTAMP(BMI270_SCAN_TIMESTAMP), }; --=20 2.49.0