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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Jun 2025 16:39:13.9632 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c30e7867-06a7-4d8b-e6ff-08dda386573d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075F2.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB8242 Content-Type: text/plain; charset="utf-8" In cases where we have an issue in the device interrupt path with IOMMU interrupt remapping enabled, dumping valid IRT table entries for the device is very useful and good input for debugging the issue. eg. -> To dump irte entries for a particular device #echo "c4:00.0" > /sys/kernel/debug/iommu/amd/devid #cat /sys/kernel/debug/iommu/amd/irqtbl | less or #echo "0000:c4:00.0" > /sys/kernel/debug/iommu/amd/devid #cat /sys/kernel/debug/iommu/amd/irqtbl | less Signed-off-by: Dheeraj Kumar Srivastava --- drivers/iommu/amd/debugfs.c | 108 ++++++++++++++++++++++++++++++++++++ 1 file changed, 108 insertions(+) diff --git a/drivers/iommu/amd/debugfs.c b/drivers/iommu/amd/debugfs.c index 38d3cab5fd8d..7a056ebcc7c3 100644 --- a/drivers/iommu/amd/debugfs.c +++ b/drivers/iommu/amd/debugfs.c @@ -11,6 +11,7 @@ #include =20 #include "amd_iommu.h" +#include "../irq_remapping.h" =20 static struct dentry *amd_iommu_debugfs; =20 @@ -254,6 +255,111 @@ static int iommu_devtbl_show(struct seq_file *m, void= *unused) } DEFINE_SHOW_ATTRIBUTE(iommu_devtbl); =20 +static void dump_128_irte(struct seq_file *m, struct irq_remap_table *tabl= e, u16 int_tab_len) +{ + struct irte_ga *ptr, *irte; + int index; + + for (index =3D 0; index < int_tab_len; index++) { + ptr =3D (struct irte_ga *)table->table; + irte =3D &ptr[index]; + + if (AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir) && + !irte->lo.fields_vapic.valid) + continue; + else if (!irte->lo.fields_remap.valid) + continue; + seq_printf(m, "IRT[%04d] %016llx %016llx\n", index, irte->hi.val, irte->= lo.val); + } +} + +static void dump_32_irte(struct seq_file *m, struct irq_remap_table *table= , u16 int_tab_len) +{ + union irte *ptr, *irte; + int index; + + for (index =3D 0; index < int_tab_len; index++) { + ptr =3D (union irte *)table->table; + irte =3D &ptr[index]; + + if (!irte->fields.valid) + continue; + seq_printf(m, "IRT[%04d] %08x\n", index, irte->val); + } +} + +static void dump_irte(struct seq_file *m, u16 devid, struct amd_iommu_pci_= seg *pci_seg) +{ + struct dev_table_entry *dev_table; + struct irq_remap_table *table; + struct amd_iommu *iommu; + unsigned long flags; + u16 int_tab_len; + + table =3D pci_seg->irq_lookup_table[devid]; + if (!table) { + seq_printf(m, "IRQ lookup table not set for %04x:%02x:%02x:%x\n", + pci_seg->id, PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid)); + return; + } + + iommu =3D pci_seg->rlookup_table[devid]; + if (!iommu) + return; + + dev_table =3D get_dev_table(iommu); + if (!dev_table) { + seq_puts(m, "Device table not found"); + return; + } + + int_tab_len =3D dev_table[devid].data[2] & DTE_INTTABLEN_MASK; + if (int_tab_len !=3D DTE_INTTABLEN_512 && int_tab_len !=3D DTE_INTTABLEN_= 2K) { + seq_puts(m, "The device's DTE contains an invalid IRT length value."); + return; + } + + seq_printf(m, "DeviceId %04x:%02x:%02x.%x\n", pci_seg->id, PCI_BUS_NUM(de= vid), + PCI_SLOT(devid), PCI_FUNC(devid)); + + raw_spin_lock_irqsave(&table->lock, flags); + if (AMD_IOMMU_GUEST_IR_GA(amd_iommu_guest_ir)) + dump_128_irte(m, table, BIT(int_tab_len >> 1)); + else + dump_32_irte(m, table, BIT(int_tab_len >> 1)); + seq_puts(m, "\n"); + raw_spin_unlock_irqrestore(&table->lock, flags); +} + +static int iommu_irqtbl_show(struct seq_file *m, void *unused) +{ + struct amd_iommu_pci_seg *pci_seg; + u16 devid, seg; + + if (!irq_remapping_enabled) { + seq_puts(m, "Interrupt remapping is disabled\n"); + return 0; + } + + if (sbdf < 0) { + seq_puts(m, "Please provide valid device id input\n"); + return 0; + } + + seg =3D PCI_SBDF_TO_SEGID(sbdf); + devid =3D PCI_SBDF_TO_DEVID(sbdf); + + for_each_pci_segment(pci_seg) { + if (pci_seg->id !=3D seg) + continue; + dump_irte(m, devid, pci_seg); + break; + } + + return 0; +} +DEFINE_SHOW_ATTRIBUTE(iommu_irqtbl); + void amd_iommu_debugfs_setup(void) { struct amd_iommu *iommu; @@ -280,4 +386,6 @@ void amd_iommu_debugfs_setup(void) &devid_fops); debugfs_create_file("devtbl", 0444, amd_iommu_debugfs, NULL, &iommu_devtbl_fops); + debugfs_create_file("irqtbl", 0444, amd_iommu_debugfs, NULL, + &iommu_irqtbl_fops); } --=20 2.25.1