From nobody Fri Dec 19 20:55:44 2025 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E91D28E604; Wed, 4 Jun 2025 10:47:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749034035; cv=none; b=MiOzHzMv6iqKGoPOZypS4PVk9pkrZv9mEYESkm8GlNMFveCNad7c5lk1+1q58Huol9nn9VloqeeLebte+gjycuoBXgOkf0cOFbq0duZsy28gQR1m/ezBQzOp0AEl4D5pycnAoTJgjUu/zfCH5GosxdmEzlHQ00PfzwnRZ++uTEM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749034035; c=relaxed/simple; bh=60Fl1KOrUPbNv5vrl/G82DJcxcAXOwQWTH0HZCHnWek=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=lrcmoaIeAyvs+y05w6h93l3lWk2OQXgBUfWrbiPZ5llQSvOWQ54SbnGHyDF4u66SSeyw8JlG68Jm37I79pfG1GMaH71w/hUEc3NhP+Z1oib6D8L21Te3na4n8O5tGjJ8Y0fdDR7mrAz0p518lYA/GevGgoJmZZfjlRfh5wNpVF4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=SjlOuvRl; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="SjlOuvRl" Received: from fllvem-sh04.itg.ti.com ([10.64.41.54]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTP id 554Al0iU772444; Wed, 4 Jun 2025 05:47:00 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1749034020; bh=ASLg/A5fi+W/LA+IOM+ZsHtSzRzn5LVIqH4St0CX4uE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=SjlOuvRl5xdH1RKUkllJe+gqteEuQ4vJQldUSAn9paJwNBOgQbRQlRS4MsBihKhoF 7ZfA7h/RdfZlAC+v5crpqOCJiUDpOydiTWQRChCiQNKXMPSw7PIWEvQoK6lo82X6v7 Q/xt+9Egr5XClt7lq4FWJNPM4/fnvx40uCq9UmYo= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by fllvem-sh04.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 554Al0Ij091644 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 4 Jun 2025 05:47:00 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 4 Jun 2025 05:46:59 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 4 Jun 2025 05:46:59 -0500 Received: from localhost (jayesh-hp-z2-tower-g5-workstation.dhcp.ti.com [172.24.227.14]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 554AkwXX1917892; Wed, 4 Jun 2025 05:46:59 -0500 From: Jayesh Choudhary To: , , CC: , , , , , , , Subject: [PATCH 1/3] arm64: dts: ti: k3-j721s2-main: Add McASP nodes Date: Wed, 4 Jun 2025 16:16:54 +0530 Message-ID: <20250604104656.38752-2-j-choudhary@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250604104656.38752-1-j-choudhary@ti.com> References: <20250604104656.38752-1-j-choudhary@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Add McASP 0-4 instances and keep them disabled because several required properties are missing as they are board specific. Signed-off-by: Jayesh Choudhary --- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 90 ++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/d= ts/ti/k3-j721s2-main.dtsi index 605f753d3258..6dee0c573980 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -2066,4 +2066,94 @@ gpu: gpu@4e20000000 { power-domain-names =3D "a", "b"; dma-coherent; }; + + mcasp0: mcasp@2b00000 { + compatible =3D "ti,am33xx-mcasp-audio"; + reg =3D <0x00 0x02b00000 0x00 0x2000>, + <0x00 0x02b08000 0x00 0x1000>; + reg-names =3D "mpu","dat"; + interrupts =3D , + ; + interrupt-names =3D "tx", "rx"; + dmas =3D <&main_udmap 0xc400>, <&main_udmap 0x4400>; + dma-names =3D "tx", "rx"; + clocks =3D <&k3_clks 209 0>; + clock-names =3D "fck"; + assigned-clocks =3D <&k3_clks 209 0>; + assigned-clock-parents =3D <&k3_clks 209 1>; + power-domains =3D <&k3_pds 209 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; + }; + + mcasp1: mcasp@2b10000 { + compatible =3D "ti,am33xx-mcasp-audio"; + reg =3D <0x00 0x02b10000 0x00 0x2000>, + <0x00 0x02b18000 0x00 0x1000>; + reg-names =3D "mpu","dat"; + interrupts =3D , + ; + interrupt-names =3D "tx", "rx"; + dmas =3D <&main_udmap 0xc401>, <&main_udmap 0x4401>; + dma-names =3D "tx", "rx"; + clocks =3D <&k3_clks 210 0>; + clock-names =3D "fck"; + assigned-clocks =3D <&k3_clks 210 0>; + assigned-clock-parents =3D <&k3_clks 210 1>; + power-domains =3D <&k3_pds 210 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; + }; + + mcasp2: mcasp@2b20000 { + compatible =3D "ti,am33xx-mcasp-audio"; + reg =3D <0x00 0x02b20000 0x00 0x2000>, + <0x00 0x02b28000 0x00 0x1000>; + reg-names =3D "mpu","dat"; + interrupts =3D , + ; + interrupt-names =3D "tx", "rx"; + dmas =3D <&main_udmap 0xc402>, <&main_udmap 0x4402>; + dma-names =3D "tx", "rx"; + clocks =3D <&k3_clks 211 0>; + clock-names =3D "fck"; + assigned-clocks =3D <&k3_clks 211 0>; + assigned-clock-parents =3D <&k3_clks 211 1>; + power-domains =3D <&k3_pds 211 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; + }; + + mcasp3: mcasp@2b30000 { + compatible =3D "ti,am33xx-mcasp-audio"; + reg =3D <0x00 0x02b30000 0x00 0x2000>, + <0x00 0x02b38000 0x00 0x1000>; + reg-names =3D "mpu","dat"; + interrupts =3D , + ; + interrupt-names =3D "tx", "rx"; + dmas =3D <&main_udmap 0xc403>, <&main_udmap 0x4403>; + dma-names =3D "tx", "rx"; + clocks =3D <&k3_clks 212 0>; + clock-names =3D "fck"; + assigned-clocks =3D <&k3_clks 212 0>; + assigned-clock-parents =3D <&k3_clks 212 1>; + power-domains =3D <&k3_pds 212 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; + }; + + mcasp4: mcasp@2b40000 { + compatible =3D "ti,am33xx-mcasp-audio"; + reg =3D <0x00 0x02b40000 0x00 0x2000>, + <0x00 0x02b48000 0x00 0x1000>; + reg-names =3D "mpu","dat"; + interrupts =3D , + ; + interrupt-names =3D "tx", "rx"; + dmas =3D <&main_udmap 0xc404>, <&main_udmap 0x4404>; + dma-names =3D "tx", "rx"; + clocks =3D <&k3_clks 213 0>; + clock-names =3D "fck"; + assigned-clocks =3D <&k3_clks 213 0>; + assigned-clock-parents =3D <&k3_clks 213 1>; + power-domains =3D <&k3_pds 213 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; + }; }; --=20 2.34.1 From nobody Fri Dec 19 20:55:44 2025 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97AA03FE4; Wed, 4 Jun 2025 10:47:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749034030; cv=none; b=qmax+B/cX5TgABX8dvC46z1Zn/cBvDk+PTwMgs3rXoCvpY8MhcF8VE6rt2YhX0OUvkBucRwwMXJvjzJMmDsHkC0J/f/NJja2DDtGSyXtD+C8YmX1snEMTlM4BB9YIkE41UPzP0jHejlwzERLgakyDnqT6ulTkc/bXiE3pzhWxNw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749034030; c=relaxed/simple; bh=fcBWWL1rS4f5Sk+veiqqjg2rTPrlh664bDCvpXlsWx0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=BWrxl3Utf1LdVf7U57ewdlXz2j1K986/XqRGKunAyP88NlalgTVvVRpx9JqHSF8J1w0jeYM7WUnh0pwo5qlIOiikbBCa8vmo9+MsONTuXb7i8HPpAV6qR4v0bgrlekLppIKwV8A+6r3gpUb/WkBLtBFNI4Ykd2LdrYPVuRG9RcA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=hIkqJzEK; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="hIkqJzEK" Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTP id 554Al12Q3789918; Wed, 4 Jun 2025 05:47:01 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1749034021; bh=URUAuGhJ6oVpvppDA506Q+cOUcLV4A0Cy2nR7TJqxBA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=hIkqJzEKREQcoCXDqFEQCNQ/nmNIeRUyJSWlOTg/9qKw+4smOxu/evYrSiuzmBtCz G7CouK0O7ebdwhwdghsB49tYbz7w8QCqu+XQo+Pr7Ek/ANPwQYYwdFy4KEoYIl08mH IiqwTSy5T95qR1snHUb83a8N96wWUcFz1PlJD5Fg= Received: from DLEE111.ent.ti.com (dlee111.ent.ti.com [157.170.170.22]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 554Al1PE1977638 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 4 Jun 2025 05:47:01 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 4 Jun 2025 05:47:01 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 4 Jun 2025 05:47:00 -0500 Received: from localhost (jayesh-hp-z2-tower-g5-workstation.dhcp.ti.com [172.24.227.14]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 554Al0OL1830865; Wed, 4 Jun 2025 05:47:00 -0500 From: Jayesh Choudhary To: , , CC: , , , , , , , Subject: [PATCH 2/3] arm64: dts: ti: k3-j721s2-main: Add audio_refclk node Date: Wed, 4 Jun 2025 16:16:55 +0530 Message-ID: <20250604104656.38752-3-j-choudhary@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250604104656.38752-1-j-choudhary@ti.com> References: <20250604104656.38752-1-j-choudhary@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" On J721S2 SoC, the AUDIO_REFCLK1 can be used as input to external peripherals when configured through CTRL_MMR. Add audio_refclk1 node which would be used as system clock for audio codec PCM3168A. Signed-off-by: Jayesh Choudhary --- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/d= ts/ti/k3-j721s2-main.dtsi index 6dee0c573980..e21f6092b3f0 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -74,6 +74,15 @@ ehrpwm_tbclk: clock-controller@140 { reg =3D <0x140 0x18>; #clock-cells =3D <1>; }; + + audio_refclk1: clock-controller@42e4 { + compatible =3D "ti,am62-audio-refclk"; + reg =3D <0x42e4 0x4>; + clocks =3D <&k3_clks 157 299>; + assigned-clocks =3D <&k3_clks 157 299>; + assigned-clock-parents =3D <&k3_clks 157 328>; + #clock-cells =3D <0>; + }; }; =20 main_ehrpwm0: pwm@3000000 { --=20 2.34.1 From nobody Fri Dec 19 20:55:44 2025 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4BDE91EFF9B; Wed, 4 Jun 2025 10:47:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749034036; cv=none; b=VYSc8mnZAjzLuiJ87wBqxfJfH2t9pawfO0uCxQGzuwk3krNON8KaFvQKDCFF/nEF9wY6XMXQtEtMTV1h70EMab6Rx2AdrcVuPJvXlLMRhKcFhg7KqkrSBm5fQ+ilw5AbLZnLdnSx3IBDTKsNreHmsKxLCOBq4zUYy2+YlbxSTgk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749034036; c=relaxed/simple; bh=3RWCrKfrLOCVxObemX8XoSert2dO6smO2TERLaJX53o=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=osg8YbMQgGHAWtRaFdzlVpfTW6wLN6FDODCNP91jLa/n5hDhwDJXfJ2EzBPDdAhRZVOKPKXWcj+APmoc/WTRxQds66MhyuSOM0Q6yj5KoYpoliyouaThzGgaA0h6sNjfMXWgi29xMqk/bXdc0B2TS3JlJ05vqadH9/+X2EhP7o8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=Wj797Qna; arc=none smtp.client-ip=198.47.19.246 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Wj797Qna" Received: from lelvem-sh01.itg.ti.com ([10.180.77.71]) by fllvem-ot04.ext.ti.com (8.15.2/8.15.2) with ESMTP id 554Al3lc3781106; Wed, 4 Jun 2025 05:47:03 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1749034023; bh=Li8lzGs5nzskLUkdkX//0GrXtU67DGh9o245ARYwvZc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Wj797QnasjFCRi/mbZXoBb54HHitRtDCVlxR8wufCqH2nh2ivc1zAkPrEniclkMnu AUH1M4VFSN3xLi8pVdGeoFjADhg+YSC2utpeoDBpvUqnP6vuCv4RBDdnV6qTT71S41 x0UTEanMAL2PWbaMDydBLV27LNqQvG12t5F2udgg= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by lelvem-sh01.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 554Al28m283977 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 4 Jun 2025 05:47:03 -0500 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 4 Jun 2025 05:47:02 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 4 Jun 2025 05:47:02 -0500 Received: from localhost (jayesh-hp-z2-tower-g5-workstation.dhcp.ti.com [172.24.227.14]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 554Al1Od1917942; Wed, 4 Jun 2025 05:47:02 -0500 From: Jayesh Choudhary To: , , CC: , , , , , , , Subject: [PATCH 3/3] arm64: dts: ti: k3-j721s2-common-proc-board: Enable analog audio support Date: Wed, 4 Jun 2025 16:16:56 +0530 Message-ID: <20250604104656.38752-4-j-choudhary@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250604104656.38752-1-j-choudhary@ti.com> References: <20250604104656.38752-1-j-choudhary@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The audio support on J721S2-EVM is using PCM3168A codec connected to McASP4 serializers. - Add the nodes for sound-card, audio codec, MAIN_I2C3 and McASP4. - Add pinmux for I2C3, McASP4, AUDIO_EXT_REFCLK1 and WKUP_GPIO_0. - Add necessary GPIO hogs to route the MAIN_I2C3 lines and McASP serializer. - Add idle-state as 1 in mux0 and mux1 to route McASP signals Signed-off-by: Jayesh Choudhary --- .../dts/ti/k3-j721s2-common-proc-board.dts | 131 ++++++++++++++++++ 1 file changed, 131 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/= arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index e2fc1288ed07..9c6a3515847e 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -128,6 +128,28 @@ transceiver4: can-phy4 { standby-gpios =3D <&exp_som 7 GPIO_ACTIVE_HIGH>; mux-states =3D <&mux1 1>; }; + + codec_audio: sound { + compatible =3D "ti,j7200-cpb-audio"; + model =3D "j721e-cpb"; + + ti,cpb-mcasp =3D <&mcasp4>; + ti,cpb-codec =3D <&pcm3168a_1>; + + clocks =3D <&k3_clks 213 0>, <&k3_clks 213 1>, + <&k3_clks 157 299>, <&k3_clks 157 328>; + clock-names =3D "cpb-mcasp-auxclk", "cpb-mcasp-auxclk-48000", + "cpb-codec-scki", "cpb-codec-scki-48000"; + }; + + i2c_mux: mux-controller-2 { + compatible =3D "gpio-mux"; + #mux-state-cells =3D <1>; + mux-gpios =3D <&wkup_gpio0 54 GPIO_ACTIVE_HIGH>; + idle-state =3D <1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&main_i2c3_mux_pins_default>; + }; }; =20 &main_pmx0 { @@ -195,6 +217,22 @@ J721S2_IOPAD(0x03c, PIN_INPUT, 0) /* (U27) MCASP0_AFSX= .MCAN5_RX */ J721S2_IOPAD(0x038, PIN_OUTPUT, 0) /* (AB28) MCASP0_ACLKX.MCAN5_TX */ >; }; + + mcasp4_pins_default: mcasp4-default-pins { + pinctrl-single,pins =3D < + J721S2_IOPAD(0x0c8, PIN_OUTPUT_PULLDOWN, 1) /* (AD28) MCASP4_ACLKX */ + J721S2_IOPAD(0x06c, PIN_OUTPUT_PULLDOWN, 1) /* (V26) MCASP4_AFSX */ + J721S2_IOPAD(0x068, PIN_INPUT_PULLDOWN, 1) /* (U28) MCASP4_AXR1 */ + J721S2_IOPAD(0x0c4, PIN_OUTPUT_PULLDOWN, 1) /* (AB26) MCASP4_AXR2 */ + J721S2_IOPAD(0x070, PIN_OUTPUT_PULLDOWN, 1) /* (R27) MCASP4_AXR3 */ + >; + }; + + audio_ext_refclk1_pins_default: audio-ext-refclk1-default-pins { + pinctrl-single,pins =3D < + J721S2_IOPAD(0x078, PIN_OUTPUT, 1) /* (Y25) MCAN2_RX.AUDIO_EXT_REFCLK1 = */ + >; + }; }; =20 &wkup_pmx2 { @@ -292,6 +330,12 @@ J721S2_WKUP_IOPAD(0x104, PIN_INPUT, 0) /* (N26) MCU_AD= C1_AIN6 */ J721S2_WKUP_IOPAD(0x108, PIN_INPUT, 0) /* (N27) MCU_ADC1_AIN7 */ >; }; + + main_i2c3_mux_pins_default: main-i2c3-mux-default-pins { + pinctrl-single,pins =3D < + J721S2_WKUP_IOPAD(0x038, PIN_OUTPUT, 7) /* (B27) WKUP_GPIO0_54 */ + >; + }; }; =20 &wkup_pmx1 { @@ -367,6 +411,22 @@ exp2: gpio@22 { "MLB_MUX_SEL", "MCAN_MUX_SEL", "MCASP2/SPI3_MUX_SEL", "PCIe_CLKREQn_= MUX_SEL", "CDCI2_RSTZ", "ENET_EXP_PWRDN", "ENET_EXP_RESETZ", "ENET_I2CMUX_SEL", "ENET_EXP_SPARE2", "M2PCIE_RTSZ", "USER_INPUT1", "USER_LED1", "USER_= LED2"; + + p09-hog { + /* P09 - MCASP/TRACE_MUX_S0 */ + gpio-hog; + gpios =3D <9 GPIO_ACTIVE_HIGH>; + output-low; + line-name =3D "MCASP/TRACE_MUX_S0"; + }; + + p10-hog { + /* P10 - MCASP/TRACE_MUX_S1 */ + gpio-hog; + gpios =3D <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "MCASP/TRACE_MUX_S1"; + }; }; }; =20 @@ -539,3 +599,74 @@ &main_mcan5 { pinctrl-0 =3D <&main_mcan5_pins_default>; phys =3D <&transceiver4>; }; + +&mux0 { + idle-state =3D <0>; +}; + +&mux1 { + idle-state =3D <0>; +}; + +&exp_som { + p03-hog { + /* P03 - CANUART_MUX_SEL1 */ + gpio-hog; + gpios =3D <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "CANUART_MUX_SEL1"; + }; +}; + +&k3_clks { + /* Confiure AUDIO_EXT_REFCLK1 pin as output */ + pinctrl-names =3D "default"; + pinctrl-0 =3D <&audio_ext_refclk1_pins_default>; +}; + +&main_i2c3 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&main_i2c3_pins_default>; + clock-frequency =3D <400000>; + mux-states =3D <&i2c_mux 1>; + + exp3: gpio@20 { + compatible =3D "ti,tca6408"; + reg =3D <0x20>; + gpio-controller; + #gpio-cells =3D <2>; + }; + + pcm3168a_1: audio-codec@44 { + compatible =3D "ti,pcm3168a"; + reg =3D <0x44>; + #sound-dai-cells =3D <1>; + reset-gpios =3D <&exp3 0 GPIO_ACTIVE_LOW>; + /* C_AUDIO_REFCLK1 -> MCAN2_RX (Y25) */ + clocks =3D <&audio_refclk1>; + clock-names =3D "scki"; + VDD1-supply =3D <&vsys_3v3>; + VDD2-supply =3D <&vsys_3v3>; + VCCAD1-supply =3D <&vsys_5v0>; + VCCAD2-supply =3D <&vsys_5v0>; + VCCDA1-supply =3D <&vsys_5v0>; + VCCDA2-supply =3D <&vsys_5v0>; + }; +}; + +&mcasp4 { + status =3D "okay"; + #sound-dai-cells =3D <0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mcasp4_pins_default>; + op-mode =3D <0>; /* MCASP_IIS_MODE */ + tdm-slots =3D <2>; + auxclk-fs-ratio =3D <256>; + serial-dir =3D < /* 0: INACTIVE, 1: TX, 2: RX */ + 0 2 1 1 + 0 0 0 0 + 0 0 0 0 + 0 0 0 0 + >; +}; --=20 2.34.1