From nobody Tue Dec 16 06:14:53 2025 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 593921D5ACE; Tue, 3 Jun 2025 10:12:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.182.106 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748945572; cv=none; b=BafDykYM8vxs7TLyLRt8i2PBlMea7i1IeINlx/cyX+CzbJrsu1pFEj49wFcMayOKDC61sSpK/uX/3BXOft67fV0MIXDv+6cu8dO+MN9H055QVL1pN+S7vF9IBfrpEzYCddGmrloE2uKdOkE0DaytN1qIVpd5nykYgKZp9R1hgq0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748945572; c=relaxed/simple; bh=uhWKMUq4SxkHrWCJQIXkkJfpUiPZGQJMAVCk7n/ceZA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=r2PtXgpWzBbpkCEGw43vS2Q/29HTKX2cmodBPlGrngNB8aDaJmdDjfO64wz/0DpOHMZGEFwD8E3DxleujfAbW3X3yOcIbr+GHOWah57BgfLUZn5KQo4ZklmnAGUne6yF2wCeUe8e/W7eCBLrLA7ZRrOfBr8G6IE3VCViHVJsu90= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=uqlu6V+7; arc=none smtp.client-ip=185.132.182.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="uqlu6V+7" Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 5539RZmQ020528; Tue, 3 Jun 2025 12:12:36 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= H1yZJgiwJMRHj8OpFG9/1Htf5NRc6OSP2RzM3XiEJGs=; b=uqlu6V+7CK8o8DiE 7+kqe9qMXZ/UQBDvnEJ+rq42xWLJqTGPv2XNq17OfwRiJhDZ8UuRaest4+DSD31P GTSeA+LFcH7egjpIDPfv9ZZxTFwUB++I5rV7O0ctOynYSHFZi6G+Z0+Ax1yotL/L NUUvp2tlSXROl3ey6s6ZeVA3B0lglsK+gz71EKqWSK2nZk47WPOh/lau+ut1gCBH eGVfnSLmSIAe28vqXRV+5DZ77+4gCll1S8J3nTrrIDlLAclqFaNxTD4qaVpgvxuI NKgtOf+m/njKKCNmX211tiFHlCY02eClwqD9ubVd3XjHfYzDXLXVkTdCF0itKm0O XpL8MQ== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 471g8tbd6d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 03 Jun 2025 12:12:36 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id D3DAC4005B; Tue, 3 Jun 2025 12:11:26 +0200 (CEST) Received: from Webmail-eu.st.com (eqndag1node4.st.com [10.75.129.133]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 21C15A8C942; Tue, 3 Jun 2025 12:10:15 +0200 (CEST) Received: from SAFDAG1NODE1.st.com (10.75.90.17) by EQNDAG1NODE4.st.com (10.75.129.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 3 Jun 2025 12:10:14 +0200 Received: from localhost (10.252.31.160) by SAFDAG1NODE1.st.com (10.75.90.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 3 Jun 2025 12:10:14 +0200 From: Arnaud Pouliquen To: Bjorn Andersson , Mathieu Poirier , Jens Wiklander , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" CC: , , , , , , Arnaud Pouliquen Subject: [RESEND PATCH v16 6/6] remoteproc: stm32: Add support of an OP-TEE TA to load the firmware Date: Tue, 3 Jun 2025 12:08:08 +0200 Message-ID: <20250603100808.1074812-7-arnaud.pouliquen@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250603100808.1074812-1-arnaud.pouliquen@foss.st.com> References: <20250603100808.1074812-1-arnaud.pouliquen@foss.st.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SAFDAG1NODE1.st.com (10.75.90.17) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-06-03_01,2025-06-02_01,2025-03-28_01 Content-Type: text/plain; charset="utf-8" The new TEE remoteproc driver is used to manage remote firmware in a secure, trusted context. The 'st,stm32mp1-m4-tee' compatibility is introduced to delegate the loading of the firmware to the trusted execution context. In such cases, the firmware should be signed and adhere to the image format defined by the TEE. Signed-off-by: Arnaud Pouliquen --- updates vs previous version - rename structures, variables and function from tee_rproc_xxx to rproc_tee_xxx - rework code to take into account rproc_tee_register and rproc_tee_unregister APIs update. - optimize code around dev_err_probe() when rproc_tee_register() fails, --- drivers/remoteproc/stm32_rproc.c | 57 ++++++++++++++++++++++++++++++-- 1 file changed, 54 insertions(+), 3 deletions(-) diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rp= roc.c index b1bda314ca85..829dfd440dbf 100644 --- a/drivers/remoteproc/stm32_rproc.c +++ b/drivers/remoteproc/stm32_rproc.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -255,6 +256,19 @@ static int stm32_rproc_release(struct rproc *rproc) return 0; } =20 +static int stm32_rproc_tee_stop(struct rproc *rproc) +{ + int err; + + stm32_rproc_request_shutdown(rproc); + + err =3D rproc_tee_stop(rproc); + if (err) + return err; + + return stm32_rproc_release(rproc); +} + static int stm32_rproc_prepare(struct rproc *rproc) { struct device *dev =3D rproc->dev.parent; @@ -691,8 +705,20 @@ static const struct rproc_ops st_rproc_ops =3D { .get_boot_addr =3D rproc_elf_get_boot_addr, }; =20 +static const struct rproc_ops st_rproc_tee_ops =3D { + .prepare =3D stm32_rproc_prepare, + .start =3D rproc_tee_start, + .stop =3D stm32_rproc_tee_stop, + .kick =3D stm32_rproc_kick, + .load =3D rproc_tee_load_fw, + .parse_fw =3D rproc_tee_parse_fw, + .find_loaded_rsc_table =3D rproc_tee_find_loaded_rsc_table, + .release_fw =3D rproc_tee_release_fw, +}; + static const struct of_device_id stm32_rproc_match[] =3D { { .compatible =3D "st,stm32mp1-m4" }, + { .compatible =3D "st,stm32mp1-m4-tee" }, {}, }; MODULE_DEVICE_TABLE(of, stm32_rproc_match); @@ -853,15 +879,36 @@ static int stm32_rproc_probe(struct platform_device *= pdev) struct device_node *np =3D dev->of_node; struct rproc *rproc; unsigned int state; + u32 proc_id; int ret; =20 ret =3D dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32)); if (ret) return ret; =20 - rproc =3D devm_rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*dd= ata)); - if (!rproc) - return -ENOMEM; + if (of_device_is_compatible(np, "st,stm32mp1-m4-tee")) { + /* + * Delegate the firmware management to the secure context. + * The firmware loaded has to be signed. + */ + ret =3D of_property_read_u32(np, "st,proc-id", &proc_id); + if (ret) { + dev_err(dev, "failed to read st,rproc-id property\n"); + return ret; + } + + rproc =3D devm_rproc_alloc(dev, np->name, &st_rproc_tee_ops, NULL, sizeo= f(*ddata)); + if (!rproc) + return -ENOMEM; + + ret =3D rproc_tee_register(dev, rproc, proc_id); + if (ret) + return dev_err_probe(dev, ret, "signed firmware not supported by TEE\n= "); + } else { + rproc =3D devm_rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*d= data)); + if (!rproc) + return -ENOMEM; + } =20 ddata =3D rproc->priv; =20 @@ -913,6 +960,8 @@ static int stm32_rproc_probe(struct platform_device *pd= ev) dev_pm_clear_wake_irq(dev); device_init_wakeup(dev, false); } + rproc_tee_unregister(dev, rproc); + return ret; } =20 @@ -933,6 +982,8 @@ static void stm32_rproc_remove(struct platform_device *= pdev) dev_pm_clear_wake_irq(dev); device_init_wakeup(dev, false); } + + rproc_tee_unregister(dev, rproc); } =20 static int stm32_rproc_suspend(struct device *dev) --=20 2.25.1