From nobody Tue Dec 16 14:54:09 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E1D9B664C6; Tue, 3 Jun 2025 09:46:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748943985; cv=none; b=obPr0e1C7+U1oWIWElZBuwrd0JfHAcB0F07EKPDZWnAyctd0YKl71s38IxTBfVJyt7m1Wv2y47ykwPc4D4Z4hjyP661SesDMVIcwHpMjQzx1p8KlHsHJQ2SaQZvDyfc1+2vhEa2mlsVV3DWKzdz/0I4LT3TB4O+RYVunpVJz+2E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748943985; c=relaxed/simple; bh=JYTWJ4bzufmG4/W3c+dyWMhzf9Zd60/BveoZVPfRXoo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=gA2+8iIHakMLs9xInMN2FFMfmEmiQRbEUmZjB05v6yeyklTqSl0mcTeFmnWDTxK+vEHpgrNMfzc9PnLhxQYv7ACxU3zNWbC1wcmewJNkvHBItKBA0gMHPDjBkHDoqpadpakBlX/YdnE28/ERQQEnJx/uWxp/A5az9+REvj1GKMo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxDeNnxD5oTAwKAQ--.63128S3; Tue, 03 Jun 2025 17:46:15 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMDxH+VfxD5ot8gGAQ--.23188S3; Tue, 03 Jun 2025 17:46:14 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH v2 1/7] LoongArch: KVM: Fix interrupt route update with eiointc Date: Tue, 3 Jun 2025 17:46:00 +0800 Message-Id: <20250603094606.1053622-2-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250603094606.1053622-1-maobibo@loongson.cn> References: <20250603094606.1053622-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMDxH+VfxD5ot8gGAQ--.23188S3 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" With function eiointc_update_sw_coremap(), there is forced assignment like val =3D *(u64 *)pvalue. Parameter pvalue may be pointer to char type or others, there is problem with forced assignment with u64 type. Here the detailed value is passed rather address pointer. Cc: stable@vger.kernel.org Fixes: 3956a52bc05b ("LoongArch: KVM: Add EIOINTC read and write functions") Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index f39929d7bf8a..d2c521b0e923 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -66,10 +66,9 @@ static void eiointc_update_irq(struct loongarch_eiointc = *s, int irq, int level) } =20 static inline void eiointc_update_sw_coremap(struct loongarch_eiointc *s, - int irq, void *pvalue, u32 len, bool notify) + int irq, u64 val, u32 len, bool notify) { int i, cpu; - u64 val =3D *(u64 *)pvalue; =20 for (i =3D 0; i < len; i++) { cpu =3D val & 0xff; @@ -398,7 +397,7 @@ static int loongarch_eiointc_writeb(struct kvm_vcpu *vc= pu, irq =3D offset - EIOINTC_COREMAP_START; index =3D irq; s->coremap.reg_u8[index] =3D data; - eiointc_update_sw_coremap(s, irq, (void *)&data, sizeof(data), true); + eiointc_update_sw_coremap(s, irq, data, sizeof(data), true); break; default: ret =3D -EINVAL; @@ -484,7 +483,7 @@ static int loongarch_eiointc_writew(struct kvm_vcpu *vc= pu, irq =3D offset - EIOINTC_COREMAP_START; index =3D irq >> 1; s->coremap.reg_u16[index] =3D data; - eiointc_update_sw_coremap(s, irq, (void *)&data, sizeof(data), true); + eiointc_update_sw_coremap(s, irq, data, sizeof(data), true); break; default: ret =3D -EINVAL; @@ -570,7 +569,7 @@ static int loongarch_eiointc_writel(struct kvm_vcpu *vc= pu, irq =3D offset - EIOINTC_COREMAP_START; index =3D irq >> 2; s->coremap.reg_u32[index] =3D data; - eiointc_update_sw_coremap(s, irq, (void *)&data, sizeof(data), true); + eiointc_update_sw_coremap(s, irq, data, sizeof(data), true); break; default: ret =3D -EINVAL; @@ -656,7 +655,7 @@ static int loongarch_eiointc_writeq(struct kvm_vcpu *vc= pu, irq =3D offset - EIOINTC_COREMAP_START; index =3D irq >> 3; s->coremap.reg_u64[index] =3D data; - eiointc_update_sw_coremap(s, irq, (void *)&data, sizeof(data), true); + eiointc_update_sw_coremap(s, irq, data, sizeof(data), true); break; default: ret =3D -EINVAL; @@ -809,7 +808,7 @@ static int kvm_eiointc_ctrl_access(struct kvm_device *d= ev, for (i =3D 0; i < (EIOINTC_IRQS / 4); i++) { start_irq =3D i * 4; eiointc_update_sw_coremap(s, start_irq, - (void *)&s->coremap.reg_u32[i], sizeof(u32), false); + s->coremap.reg_u32[i], sizeof(u32), false); } break; default: --=20 2.39.3 From nobody Tue Dec 16 14:54:09 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E1D3C54763; Tue, 3 Jun 2025 09:46:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748943985; cv=none; b=c3DrJH1EYcnEEHCY3Joi8HbxVbzBv7iqKY3qOVRpMaOmIpDNRr+t/5UnG9zKZI+cTdO70jWY5o7itJ09UL7JONhhsjBDR0jeq71wvbQDoYq+2PfgepbPHzvNVVsc/2KWQr/P0B2wBF88kpucWeX0BAIvHWbOWUPzwNSPDih+A88= ARC-Message-Signature: i=1; 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Tue, 03 Jun 2025 17:46:15 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH v2 2/7] LoongArch: KVM: Check interrupt route from physical cpu with eiointc Date: Tue, 3 Jun 2025 17:46:01 +0800 Message-Id: <20250603094606.1053622-3-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250603094606.1053622-1-maobibo@loongson.cn> References: <20250603094606.1053622-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMDxH+VfxD5ot8gGAQ--.23188S4 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" With eiointc interrupt controller, physical cpu id is set for irq route. However function kvm_get_vcpu() is used to get destination vCPU when delivering irq. With API kvm_get_vcpu(), logical cpu is used. With API kvm_get_vcpu_by_cpuid(), vCPU can be searched from physical cpu id. Cc: stable@vger.kernel.org Fixes: 3956a52bc05b ("LoongArch: KVM: Add EIOINTC read and write functions") Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index d2c521b0e923..0b648c56b0c3 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -9,7 +9,8 @@ =20 static void eiointc_set_sw_coreisr(struct loongarch_eiointc *s) { - int ipnum, cpu, irq_index, irq_mask, irq; + int ipnum, cpu, irq_index, irq_mask, irq, cpuid; + struct kvm_vcpu *vcpu; =20 for (irq =3D 0; irq < EIOINTC_IRQS; irq++) { ipnum =3D s->ipmap.reg_u8[irq / 32]; @@ -20,7 +21,12 @@ static void eiointc_set_sw_coreisr(struct loongarch_eioi= ntc *s) irq_index =3D irq / 32; irq_mask =3D BIT(irq & 0x1f); =20 - cpu =3D s->coremap.reg_u8[irq]; + cpuid =3D s->coremap.reg_u8[irq]; + vcpu =3D kvm_get_vcpu_by_cpuid(s->kvm, cpuid); + if (vcpu =3D=3D NULL) + continue; + + cpu =3D vcpu->vcpu_id; if (!!(s->coreisr.reg_u32[cpu][irq_index] & irq_mask)) set_bit(irq, s->sw_coreisr[cpu][ipnum]); else @@ -68,17 +74,23 @@ static void eiointc_update_irq(struct loongarch_eiointc= *s, int irq, int level) static inline void eiointc_update_sw_coremap(struct loongarch_eiointc *s, int irq, u64 val, u32 len, bool notify) { - int i, cpu; + int i, cpu, cpuid; + struct kvm_vcpu *vcpu; =20 for (i =3D 0; i < len; i++) { - cpu =3D val & 0xff; + cpuid =3D val & 0xff; val =3D val >> 8; =20 if (!(s->status & BIT(EIOINTC_ENABLE_CPU_ENCODE))) { - cpu =3D ffs(cpu) - 1; - cpu =3D (cpu >=3D 4) ? 0 : cpu; + cpuid =3D ffs(cpuid) - 1; + cpuid =3D (cpuid >=3D 4) ? 0 : cpuid; } =20 + vcpu =3D kvm_get_vcpu_by_cpuid(s->kvm, cpuid); + if (vcpu =3D=3D NULL) + continue; + + cpu =3D vcpu->vcpu_id; if (s->sw_coremap[irq + i] =3D=3D cpu) continue; =20 --=20 2.39.3 From nobody Tue Dec 16 14:54:09 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E58CF1990C7; Tue, 3 Jun 2025 09:46:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748943986; cv=none; b=LCWjJdN0hK33fYfB5t0tUOctXKl6tJ8btLRKx2Zhut6ciBBwVEAGNU0YNLm5RjmqPX0pzctJmx35JqPU4BSjqTpxK3T8WeBjPiQ0eAlhTxEi2nbFLfwqlrx3YlrvhxQwSF/eMBb48zWJnpKW0hIY/SDgh6wGLQdneBqSOaM/97M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748943986; c=relaxed/simple; bh=uD27TLOkmLE97SKX+m1nAjFPEUD7oQ+EyEzUgNGPZHs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=KQEvBpMCBFs/jiiFM09A5iAUzLksE8MRm+JkiihGFuhOvo+uv6f9AVOfU0GSsz79O0VgZielElS4DXrYdcjs3g/QqtY6lvkUPrRoyA0s/LEzvZSPbf7BIf+Gz9lLnzszCrD5rFYOg1988X06yzHNJFOXPzNJ7HWdaeP8uiZWvgI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8AxHHJoxD5oUgwKAQ--.32739S3; Tue, 03 Jun 2025 17:46:17 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMDxH+VfxD5ot8gGAQ--.23188S5; Tue, 03 Jun 2025 17:46:15 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH v2 3/7] LoongArch: KVM: Disable update property num_cpu and feature with eiointc Date: Tue, 3 Jun 2025 17:46:02 +0800 Message-Id: <20250603094606.1053622-4-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250603094606.1053622-1-maobibo@loongson.cn> References: <20250603094606.1053622-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMDxH+VfxD5ot8gGAQ--.23188S5 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Property num_cpu and feature is read-only once eiointc is created, which is set with KVM_DEV_LOONGARCH_EXTIOI_GRP_CTRL attr group before device creation. Attr group KVM_DEV_LOONGARCH_EXTIOI_GRP_SW_STATUS is to update register and software state for migration and reset usage, property num_cpu and feature can not be update again if it is created already. Here discard write operation with property num_cpu and feature in attr group KVM_DEV_LOONGARCH_EXTIOI_GRP_CTRL. Cc: stable@vger.kernel.org Fixes: 1ad7efa552fd ("LoongArch: KVM: Add EIOINTC user mode read and write = functions") Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index 0b648c56b0c3..b48511f903b5 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -910,9 +910,22 @@ static int kvm_eiointc_sw_status_access(struct kvm_dev= ice *dev, data =3D (void __user *)attr->addr; switch (addr) { case KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_NUM_CPU: + /* + * Property num_cpu and feature is read-only once eiointc is + * created with KVM_DEV_LOONGARCH_EXTIOI_GRP_CTRL group API + * + * Disable writing with KVM_DEV_LOONGARCH_EXTIOI_GRP_SW_STATUS + * group API + */ + if (is_write) + return ret; + p =3D &s->num_cpu; break; case KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_FEATURE: + if (is_write) + return ret; + p =3D &s->features; break; case KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_STATE: --=20 2.39.3 From nobody Tue Dec 16 14:54:09 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E592D19F42D; Tue, 3 Jun 2025 09:46:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748943986; cv=none; b=MkZBKc+zIMtbGIULhDNR9vPrSbdBBiDOXV4hYnBHBTD3/1VHRBUVbgANRz6iNyhi9q353KT6u1s36kXeO302vAAbJTuQQAb0OX5QIfgDgG+aBucMheaUm5FIdm6CffdmM0AxrOMiS3BQ+kbVjhSz25WQ0GbsunN8WXe5Accbb98= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748943986; c=relaxed/simple; bh=4dgF6RJ7bI5hBN44C1WIAmrE0lxo5AKxgJ+qtTI3OIw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=qfVdJscFMpr8Xb012CJuaStO8/f6lvH3jZQLwkR639RYQTtx2fvgXq9BafqGBSo+NHLqm3exOA6TngfntpDDclVsUog6hHJ6zoMgmUr81A3XcXWtoHlRNCurMw1fzcWgKZYIeBhxGP0QueLbSFWPOi5w5Yetk3B/Elw0if84BQk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8BxIK9pxD5oVQwKAQ--.30528S3; Tue, 03 Jun 2025 17:46:17 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMDxH+VfxD5ot8gGAQ--.23188S6; Tue, 03 Jun 2025 17:46:16 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH v2 4/7] LoongArch: KVM: Check validation of num_cpu from user space Date: Tue, 3 Jun 2025 17:46:03 +0800 Message-Id: <20250603094606.1053622-5-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250603094606.1053622-1-maobibo@loongson.cn> References: <20250603094606.1053622-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMDxH+VfxD5ot8gGAQ--.23188S6 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" The maximum supported cpu number is EIOINTC_ROUTE_MAX_VCPUS about irqchip eiointc, here add validation about cpu number to avoid array pointer overflow. Cc: stable@vger.kernel.org Fixes: 1ad7efa552fd ("LoongArch: KVM: Add EIOINTC user mode read and write = functions") Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index b48511f903b5..ed80bf290755 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -798,7 +798,7 @@ static int kvm_eiointc_ctrl_access(struct kvm_device *d= ev, int ret =3D 0; unsigned long flags; unsigned long type =3D (unsigned long)attr->attr; - u32 i, start_irq; + u32 i, start_irq, val; void __user *data; struct loongarch_eiointc *s =3D dev->kvm->arch.eiointc; =20 @@ -806,7 +806,12 @@ static int kvm_eiointc_ctrl_access(struct kvm_device *= dev, spin_lock_irqsave(&s->lock, flags); switch (type) { case KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_NUM_CPU: - if (copy_from_user(&s->num_cpu, data, 4)) + if (copy_from_user(&val, data, 4) =3D=3D 0) { + if (val < EIOINTC_ROUTE_MAX_VCPUS) + s->num_cpu =3D val; + else + ret =3D -EINVAL; + } else ret =3D -EFAULT; break; case KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_FEATURE: @@ -835,7 +840,7 @@ static int kvm_eiointc_regs_access(struct kvm_device *d= ev, struct kvm_device_attr *attr, bool is_write) { - int addr, cpuid, offset, ret =3D 0; + int addr, cpu, offset, ret =3D 0; unsigned long flags; void *p =3D NULL; void __user *data; @@ -843,7 +848,7 @@ static int kvm_eiointc_regs_access(struct kvm_device *d= ev, =20 s =3D dev->kvm->arch.eiointc; addr =3D attr->attr; - cpuid =3D addr >> 16; + cpu =3D addr >> 16; addr &=3D 0xffff; data =3D (void __user *)attr->addr; switch (addr) { @@ -868,8 +873,11 @@ static int kvm_eiointc_regs_access(struct kvm_device *= dev, p =3D &s->isr.reg_u32[offset]; break; case EIOINTC_COREISR_START ... EIOINTC_COREISR_END: + if (cpu >=3D s->num_cpu) + return -EINVAL; + offset =3D (addr - EIOINTC_COREISR_START) / 4; - p =3D &s->coreisr.reg_u32[cpuid][offset]; + p =3D &s->coreisr.reg_u32[cpu][offset]; break; case EIOINTC_COREMAP_START ... EIOINTC_COREMAP_END: offset =3D (addr - EIOINTC_COREMAP_START) / 4; --=20 2.39.3 From nobody Tue Dec 16 14:54:09 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id F00A4280CFA; Tue, 3 Jun 2025 09:46:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748943987; cv=none; b=LUD/lYVfan1hoHxm77YpSjZr3zr+6i0PSjC9v4a+OmKuTh2/Q/99YYZm6w02J69d/3YZT3Nekfvb4o3doe/eSj0P6nY5POK1fZIYh6jFYyA74nsa+hmK+I59RQ3eeXzrGr7dOhlnkVQl22Q7J8M+VnzXO6SwcW1PKimIG8rURgs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748943987; c=relaxed/simple; bh=70ZvL63upvJv2/kTPC8mQ+fY+0prGmiAa1gz+ZHnHEk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=cFtb3DNidsiv6i4NjhCidRaKJemgP3MWkqlJT11W41x9FdHV91/WaW43+0/JQagVfgd5c1hd+eYE+M/AD+8JKtbIuvYvIWJ4PooPeCdKGyNyUzfJwS/cUnuUGM/J0h43uXhYIe0Fc8g235KMBy+0X/1vcW2TP2RkdlulHUAfhjE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8CxPuNpxD5oWAwKAQ--.63204S3; Tue, 03 Jun 2025 17:46:17 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMDxH+VfxD5ot8gGAQ--.23188S7; Tue, 03 Jun 2025 17:46:17 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 5/7] LoongArch: KVM: Use standard bitops API with eiointc Date: Tue, 3 Jun 2025 17:46:04 +0800 Message-Id: <20250603094606.1053622-6-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250603094606.1053622-1-maobibo@loongson.cn> References: <20250603094606.1053622-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMDxH+VfxD5ot8gGAQ--.23188S7 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Standard bitops APIs such test_bit() is used here, rather than manually calculate the offset and mask. Also use non-atomic API __set_bit() and __clear_bit() rather than set_bit() and clear_bit(), since global spinlock is held already. Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 27 +++++++++++---------------- 1 file changed, 11 insertions(+), 16 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index ed80bf290755..0692bacddf5d 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -9,7 +9,7 @@ =20 static void eiointc_set_sw_coreisr(struct loongarch_eiointc *s) { - int ipnum, cpu, irq_index, irq_mask, irq, cpuid; + int ipnum, cpu, irq, cpuid; struct kvm_vcpu *vcpu; =20 for (irq =3D 0; irq < EIOINTC_IRQS; irq++) { @@ -18,8 +18,6 @@ static void eiointc_set_sw_coreisr(struct loongarch_eioin= tc *s) ipnum =3D count_trailing_zeros(ipnum); ipnum =3D (ipnum >=3D 0 && ipnum < 4) ? ipnum : 0; } - irq_index =3D irq / 32; - irq_mask =3D BIT(irq & 0x1f); =20 cpuid =3D s->coremap.reg_u8[irq]; vcpu =3D kvm_get_vcpu_by_cpuid(s->kvm, cpuid); @@ -27,16 +25,16 @@ static void eiointc_set_sw_coreisr(struct loongarch_eio= intc *s) continue; =20 cpu =3D vcpu->vcpu_id; - if (!!(s->coreisr.reg_u32[cpu][irq_index] & irq_mask)) - set_bit(irq, s->sw_coreisr[cpu][ipnum]); + if (test_bit(irq, (unsigned long *)s->coreisr.reg_u32[cpu])) + __set_bit(irq, s->sw_coreisr[cpu][ipnum]); else - clear_bit(irq, s->sw_coreisr[cpu][ipnum]); + __clear_bit(irq, s->sw_coreisr[cpu][ipnum]); } } =20 static void eiointc_update_irq(struct loongarch_eiointc *s, int irq, int l= evel) { - int ipnum, cpu, found, irq_index, irq_mask; + int ipnum, cpu, found; struct kvm_vcpu *vcpu; struct kvm_interrupt vcpu_irq; =20 @@ -48,19 +46,16 @@ static void eiointc_update_irq(struct loongarch_eiointc= *s, int irq, int level) =20 cpu =3D s->sw_coremap[irq]; vcpu =3D kvm_get_vcpu(s->kvm, cpu); - irq_index =3D irq / 32; - irq_mask =3D BIT(irq & 0x1f); - if (level) { /* if not enable return false */ - if (((s->enable.reg_u32[irq_index]) & irq_mask) =3D=3D 0) + if (!test_bit(irq, (unsigned long *)s->enable.reg_u32)) return; - s->coreisr.reg_u32[cpu][irq_index] |=3D irq_mask; + __set_bit(irq, (unsigned long *)s->coreisr.reg_u32[cpu]); found =3D find_first_bit(s->sw_coreisr[cpu][ipnum], EIOINTC_IRQS); - set_bit(irq, s->sw_coreisr[cpu][ipnum]); + __set_bit(irq, s->sw_coreisr[cpu][ipnum]); } else { - s->coreisr.reg_u32[cpu][irq_index] &=3D ~irq_mask; - clear_bit(irq, s->sw_coreisr[cpu][ipnum]); + __clear_bit(irq, (unsigned long *)s->coreisr.reg_u32[cpu]); + __clear_bit(irq, s->sw_coreisr[cpu][ipnum]); found =3D find_first_bit(s->sw_coreisr[cpu][ipnum], EIOINTC_IRQS); } =20 @@ -110,8 +105,8 @@ void eiointc_set_irq(struct loongarch_eiointc *s, int i= rq, int level) unsigned long flags; unsigned long *isr =3D (unsigned long *)s->isr.reg_u8; =20 - level ? set_bit(irq, isr) : clear_bit(irq, isr); spin_lock_irqsave(&s->lock, flags); + level ? __set_bit(irq, isr) : __clear_bit(irq, isr); eiointc_update_irq(s, irq, level); spin_unlock_irqrestore(&s->lock, flags); } --=20 2.39.3 From nobody Tue Dec 16 14:54:09 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id F0020280CF8; Tue, 3 Jun 2025 09:46:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748943987; cv=none; b=Y9KwP8b397TlKsD3imiGFQFgSG1z9qahwmA9l2M+Z4bE0sOs1F+qYY+uNWFpGa3hkMUqdJYaN5C8HHEDrJMmYiIDaYyTc8PLVVgotszIewDDzQ5EzVWWubDO9JH3xOVwzFvvzxvY0UgQEglAZ3gtd0vdQiPkgqz5M0HC9DR1Frg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748943987; c=relaxed/simple; bh=kYV3hcI/xKe7ztnZmEHQIHvQrZe1Pfvj7Z8piNeGwf0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=u3HHV6UyW/q/mpQPyGdIDMnmL+bZ/do7fPAVFOlMpcKDGygO+NajvzoXEhVpOXTrp2R6hvs1w6uSTC9rtgocK7bAe/XG27+ziom+HMRb8qGZt7geYvDb+74ciaCm2xbOik16znS44O0D/66z3e/0DBoyKBDrU4bZghPYq40a1B4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8AxWXFpxD5oWwwKAQ--.33288S3; Tue, 03 Jun 2025 17:46:17 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMDxH+VfxD5ot8gGAQ--.23188S8; Tue, 03 Jun 2025 17:46:17 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 6/7] LoongArch: KVM: Remove unused parameter len Date: Tue, 3 Jun 2025 17:46:05 +0800 Message-Id: <20250603094606.1053622-7-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250603094606.1053622-1-maobibo@loongson.cn> References: <20250603094606.1053622-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMDxH+VfxD5ot8gGAQ--.23188S8 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Parameter len is unused in some functions with eiointc emulation driver, remove it here. Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 32 +++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index 0692bacddf5d..0b11edd16d1d 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -131,7 +131,7 @@ static inline void eiointc_enable_irq(struct kvm_vcpu *= vcpu, } =20 static int loongarch_eiointc_readb(struct kvm_vcpu *vcpu, struct loongarch= _eiointc *s, - gpa_t addr, int len, void *val) + gpa_t addr, void *val) { int index, ret =3D 0; u8 data =3D 0; @@ -173,7 +173,7 @@ static int loongarch_eiointc_readb(struct kvm_vcpu *vcp= u, struct loongarch_eioin } =20 static int loongarch_eiointc_readw(struct kvm_vcpu *vcpu, struct loongarch= _eiointc *s, - gpa_t addr, int len, void *val) + gpa_t addr, void *val) { int index, ret =3D 0; u16 data =3D 0; @@ -215,7 +215,7 @@ static int loongarch_eiointc_readw(struct kvm_vcpu *vcp= u, struct loongarch_eioin } =20 static int loongarch_eiointc_readl(struct kvm_vcpu *vcpu, struct loongarch= _eiointc *s, - gpa_t addr, int len, void *val) + gpa_t addr, void *val) { int index, ret =3D 0; u32 data =3D 0; @@ -257,7 +257,7 @@ static int loongarch_eiointc_readl(struct kvm_vcpu *vcp= u, struct loongarch_eioin } =20 static int loongarch_eiointc_readq(struct kvm_vcpu *vcpu, struct loongarch= _eiointc *s, - gpa_t addr, int len, void *val) + gpa_t addr, void *val) { int index, ret =3D 0; u64 data =3D 0; @@ -315,16 +315,16 @@ static int kvm_eiointc_read(struct kvm_vcpu *vcpu, spin_lock_irqsave(&eiointc->lock, flags); switch (len) { case 1: - ret =3D loongarch_eiointc_readb(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_readb(vcpu, eiointc, addr, val); break; case 2: - ret =3D loongarch_eiointc_readw(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_readw(vcpu, eiointc, addr, val); break; case 4: - ret =3D loongarch_eiointc_readl(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_readl(vcpu, eiointc, addr, val); break; case 8: - ret =3D loongarch_eiointc_readq(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_readq(vcpu, eiointc, addr, val); break; default: WARN_ONCE(1, "%s: Abnormal address access: addr 0x%llx, size %d\n", @@ -337,7 +337,7 @@ static int kvm_eiointc_read(struct kvm_vcpu *vcpu, =20 static int loongarch_eiointc_writeb(struct kvm_vcpu *vcpu, struct loongarch_eiointc *s, - gpa_t addr, int len, const void *val) + gpa_t addr, const void *val) { int index, irq, bits, ret =3D 0; u8 cpu; @@ -416,7 +416,7 @@ static int loongarch_eiointc_writeb(struct kvm_vcpu *vc= pu, =20 static int loongarch_eiointc_writew(struct kvm_vcpu *vcpu, struct loongarch_eiointc *s, - gpa_t addr, int len, const void *val) + gpa_t addr, const void *val) { int i, index, irq, bits, ret =3D 0; u8 cpu; @@ -502,7 +502,7 @@ static int loongarch_eiointc_writew(struct kvm_vcpu *vc= pu, =20 static int loongarch_eiointc_writel(struct kvm_vcpu *vcpu, struct loongarch_eiointc *s, - gpa_t addr, int len, const void *val) + gpa_t addr, const void *val) { int i, index, irq, bits, ret =3D 0; u8 cpu; @@ -588,7 +588,7 @@ static int loongarch_eiointc_writel(struct kvm_vcpu *vc= pu, =20 static int loongarch_eiointc_writeq(struct kvm_vcpu *vcpu, struct loongarch_eiointc *s, - gpa_t addr, int len, const void *val) + gpa_t addr, const void *val) { int i, index, irq, bits, ret =3D 0; u8 cpu; @@ -689,16 +689,16 @@ static int kvm_eiointc_write(struct kvm_vcpu *vcpu, spin_lock_irqsave(&eiointc->lock, flags); switch (len) { case 1: - ret =3D loongarch_eiointc_writeb(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_writeb(vcpu, eiointc, addr, val); break; case 2: - ret =3D loongarch_eiointc_writew(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_writew(vcpu, eiointc, addr, val); break; case 4: - ret =3D loongarch_eiointc_writel(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_writel(vcpu, eiointc, addr, val); break; case 8: - ret =3D loongarch_eiointc_writeq(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_writeq(vcpu, eiointc, addr, val); break; default: WARN_ONCE(1, "%s: Abnormal address access: addr 0x%llx, size %d\n", --=20 2.39.3 From nobody Tue Dec 16 14:54:09 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B5B59283FDB; Tue, 3 Jun 2025 09:47:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxvnNqxD5oXgwKAQ--.65478S3; Tue, 03 Jun 2025 17:46:18 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMDxH+VfxD5ot8gGAQ--.23188S9; Tue, 03 Jun 2025 17:46:17 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 7/7] LoongArch: KVM: Add stat information with kernel irqchip Date: Tue, 3 Jun 2025 17:46:06 +0800 Message-Id: <20250603094606.1053622-8-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250603094606.1053622-1-maobibo@loongson.cn> References: <20250603094606.1053622-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMDxH+VfxD5ot8gGAQ--.23188S9 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Move stat information about kernel irqchip from VM to vCPU, since all vm exiting event should be vCPU relative. And also add entry with structure kvm_vcpu_stats_desc[], so that it can display with directory /sys/kernel/debug/kvm. Signed-off-by: Bibo Mao --- arch/loongarch/include/asm/kvm_host.h | 12 ++++++------ arch/loongarch/kvm/intc/eiointc.c | 4 ++-- arch/loongarch/kvm/intc/ipi.c | 28 ++++----------------------- arch/loongarch/kvm/intc/pch_pic.c | 4 ++-- arch/loongarch/kvm/vcpu.c | 8 +++++++- 5 files changed, 21 insertions(+), 35 deletions(-) diff --git a/arch/loongarch/include/asm/kvm_host.h b/arch/loongarch/include= /asm/kvm_host.h index a3c4cc46c892..0cecbd038bb3 100644 --- a/arch/loongarch/include/asm/kvm_host.h +++ b/arch/loongarch/include/asm/kvm_host.h @@ -50,12 +50,6 @@ struct kvm_vm_stat { struct kvm_vm_stat_generic generic; u64 pages; u64 hugepages; - u64 ipi_read_exits; - u64 ipi_write_exits; - u64 eiointc_read_exits; - u64 eiointc_write_exits; - u64 pch_pic_read_exits; - u64 pch_pic_write_exits; }; =20 struct kvm_vcpu_stat { @@ -65,6 +59,12 @@ struct kvm_vcpu_stat { u64 cpucfg_exits; u64 signal_exits; u64 hypercall_exits; + u64 ipi_read_exits; + u64 ipi_write_exits; + u64 eiointc_read_exits; + u64 eiointc_write_exits; + u64 pch_pic_read_exits; + u64 pch_pic_write_exits; }; =20 #define KVM_MEM_HUGEPAGE_CAPABLE (1UL << 0) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index 0b11edd16d1d..0e7c975f5e74 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -311,7 +311,7 @@ static int kvm_eiointc_read(struct kvm_vcpu *vcpu, return -EINVAL; } =20 - vcpu->kvm->stat.eiointc_read_exits++; + vcpu->stat.eiointc_read_exits++; spin_lock_irqsave(&eiointc->lock, flags); switch (len) { case 1: @@ -685,7 +685,7 @@ static int kvm_eiointc_write(struct kvm_vcpu *vcpu, return -EINVAL; } =20 - vcpu->kvm->stat.eiointc_write_exits++; + vcpu->stat.eiointc_write_exits++; spin_lock_irqsave(&eiointc->lock, flags); switch (len) { case 1: diff --git a/arch/loongarch/kvm/intc/ipi.c b/arch/loongarch/kvm/intc/ipi.c index fe734dc062ed..e658d5b37c04 100644 --- a/arch/loongarch/kvm/intc/ipi.c +++ b/arch/loongarch/kvm/intc/ipi.c @@ -268,36 +268,16 @@ static int kvm_ipi_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, gpa_t addr, int len, void *val) { - int ret; - struct loongarch_ipi *ipi; - - ipi =3D vcpu->kvm->arch.ipi; - if (!ipi) { - kvm_err("%s: ipi irqchip not valid!\n", __func__); - return -EINVAL; - } - ipi->kvm->stat.ipi_read_exits++; - ret =3D loongarch_ipi_readl(vcpu, addr, len, val); - - return ret; + vcpu->stat.ipi_read_exits++; + return loongarch_ipi_readl(vcpu, addr, len, val); } =20 static int kvm_ipi_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, gpa_t addr, int len, const void *val) { - int ret; - struct loongarch_ipi *ipi; - - ipi =3D vcpu->kvm->arch.ipi; - if (!ipi) { - kvm_err("%s: ipi irqchip not valid!\n", __func__); - return -EINVAL; - } - ipi->kvm->stat.ipi_write_exits++; - ret =3D loongarch_ipi_writel(vcpu, addr, len, val); - - return ret; + vcpu->stat.ipi_write_exits++; + return loongarch_ipi_writel(vcpu, addr, len, val); } =20 static const struct kvm_io_device_ops kvm_ipi_ops =3D { diff --git a/arch/loongarch/kvm/intc/pch_pic.c b/arch/loongarch/kvm/intc/pc= h_pic.c index 08fce845f668..6f00ffe05c54 100644 --- a/arch/loongarch/kvm/intc/pch_pic.c +++ b/arch/loongarch/kvm/intc/pch_pic.c @@ -196,7 +196,7 @@ static int kvm_pch_pic_read(struct kvm_vcpu *vcpu, } =20 /* statistics of pch pic reading */ - vcpu->kvm->stat.pch_pic_read_exits++; + vcpu->stat.pch_pic_read_exits++; ret =3D loongarch_pch_pic_read(s, addr, len, val); =20 return ret; @@ -303,7 +303,7 @@ static int kvm_pch_pic_write(struct kvm_vcpu *vcpu, } =20 /* statistics of pch pic writing */ - vcpu->kvm->stat.pch_pic_write_exits++; + vcpu->stat.pch_pic_write_exits++; ret =3D loongarch_pch_pic_write(s, addr, len, val); =20 return ret; diff --git a/arch/loongarch/kvm/vcpu.c b/arch/loongarch/kvm/vcpu.c index 5af32ec62cb1..d1b8c50941ca 100644 --- a/arch/loongarch/kvm/vcpu.c +++ b/arch/loongarch/kvm/vcpu.c @@ -20,7 +20,13 @@ const struct _kvm_stats_desc kvm_vcpu_stats_desc[] =3D { STATS_DESC_COUNTER(VCPU, idle_exits), STATS_DESC_COUNTER(VCPU, cpucfg_exits), STATS_DESC_COUNTER(VCPU, signal_exits), - STATS_DESC_COUNTER(VCPU, hypercall_exits) + STATS_DESC_COUNTER(VCPU, hypercall_exits), + STATS_DESC_COUNTER(VCPU, ipi_read_exits), + STATS_DESC_COUNTER(VCPU, ipi_write_exits), + STATS_DESC_COUNTER(VCPU, eiointc_read_exits), + STATS_DESC_COUNTER(VCPU, eiointc_write_exits), + STATS_DESC_COUNTER(VCPU, pch_pic_read_exits), + STATS_DESC_COUNTER(VCPU, pch_pic_write_exits) }; =20 const struct kvm_stats_header kvm_vcpu_stats_header =3D { --=20 2.39.3