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[84.248.220.251]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-553378a13basm1524325e87.81.2025.06.02.01.54.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Jun 2025 01:54:50 -0700 (PDT) From: Abdiel Janulgue To: acourbot@nvidia.com, dakr@kernel.org Cc: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Valentin Obst , linux-kernel@vger.kernel.org (open list), Marek Szyprowski , Robin Murphy , airlied@redhat.com, rust-for-linux@vger.kernel.org, iommu@lists.linux.dev (open list:DMA MAPPING HELPERS), Petr Tesarik , Andrew Morton , Herbert Xu , Sui Jingfeng , Randy Dunlap , Michael Kelley , Abdiel Janulgue Subject: [PATCH v4 1/3] rust: dma: clarify wording and be consistent in `coherent` nomenclature Date: Mon, 2 Jun 2025 11:53:11 +0300 Message-ID: <20250602085444.1925053-2-abdiel.janulgue@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250602085444.1925053-1-abdiel.janulgue@gmail.com> References: <20250602085444.1925053-1-abdiel.janulgue@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In the kernel, `consistent` and `coherent` are used interchangeably for the region described in this api. Stick with `coherent` nomenclature to show that dma_alloc_coherent() is being used, in addition to improving the clarity in the DMA mapping attributes documentation. Reviewed-by: Benno Lossin Signed-off-by: Abdiel Janulgue Reviewed-by: Andreas Hindborg --- rust/kernel/dma.rs | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs index 35fd8a638473..c3fe39e7eb0b 100644 --- a/rust/kernel/dma.rs +++ b/rust/kernel/dma.rs @@ -89,7 +89,7 @@ pub mod attrs { /// Forces contiguous allocation of the buffer in physical memory. pub const DMA_ATTR_FORCE_CONTIGUOUS: Attrs =3D Attrs(bindings::DMA_ATT= R_FORCE_CONTIGUOUS); =20 - /// This is a hint to the DMA-mapping subsystem that it's probably not= worth the time to try + /// Hints DMA-mapping subsystem that it's probably not worth the time = to try /// to allocate memory to in a way that gives better TLB efficiency. pub const DMA_ATTR_ALLOC_SINGLE_PAGES: Attrs =3D Attrs(bindings::DMA_A= TTR_ALLOC_SINGLE_PAGES); =20 @@ -97,7 +97,7 @@ pub mod attrs { /// `__GFP_NOWARN`). pub const DMA_ATTR_NO_WARN: Attrs =3D Attrs(bindings::DMA_ATTR_NO_WARN= ); =20 - /// Used to indicate that the buffer is fully accessible at an elevate= d privilege level (and + /// Indicates that the buffer is fully accessible at an elevated privi= lege level (and /// ideally inaccessible or at least read-only at lesser-privileged le= vels). pub const DMA_ATTR_PRIVILEGED: Attrs =3D Attrs(bindings::DMA_ATTR_PRIV= ILEGED); } @@ -105,7 +105,7 @@ pub mod attrs { /// An abstraction of the `dma_alloc_coherent` API. /// /// This is an abstraction around the `dma_alloc_coherent` API which is us= ed to allocate and map -/// large consistent DMA regions. +/// large coherent DMA regions. /// /// A [`CoherentAllocation`] instance contains a pointer to the allocated = region (in the /// processor's virtual address space) and the device address which can be= given to the device @@ -115,7 +115,7 @@ pub mod attrs { /// # Invariants /// /// For the lifetime of an instance of [`CoherentAllocation`], the `cpu_ad= dr` is a valid pointer -/// to an allocated region of consistent memory and `dma_handle` is the DM= A address base of +/// to an allocated region of coherent memory and `dma_handle` is the DMA = address base of /// the region. // TODO // @@ -138,7 +138,7 @@ pub struct CoherentAllocation { } =20 impl CoherentAllocation { - /// Allocates a region of `size_of:: * count` of consistent memory. + /// Allocates a region of `size_of:: * count` of coherent memory. /// /// # Examples /// --=20 2.43.0