From nobody Thu Dec 18 14:10:50 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8FF49DDAB; Mon, 2 Jun 2025 17:27:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748885256; cv=none; b=J79j7SghPnwZ/ehZBo/nTbQ2bRNJ9nFtyaHnH5zcHZDS4AI9+NgC4XHP1rMyfxh9ZZEJ32OXCK9ln9VyOQvd/+1RM9RoQuIN2KI8HPTQYeVexZMhPGawTc3jUuhVqDdXxMtiuRKiZ2xGl7v1WJrJ6rt3LdpV+RAq5P0VWx0JWg8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748885256; c=relaxed/simple; bh=5uM1KEccZGwSr12tN15CoRzVQnItiD4rKHjSysiJ9Hg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RK1wXJGzlKWkW3QqMeXEBqN0vqLqKZm89SW7YG6qnNy6KMLhXDUu06DsdU5osCmj8M0+6XQo8/+4Vsp6zTZw6WHQI0g/WSSEAjPv5fW6YpA1HsFudklBUl26/p5iOR/P8Ye2cTVWei1Z0I+TeHYtDrM6xoOZv8npz9DknaJH3+I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=FeonM7BL; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="FeonM7BL" Received: by smtp.kernel.org (Postfix) with ESMTPS id 074F2C4CEF0; Mon, 2 Jun 2025 17:27:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1748885256; bh=5uM1KEccZGwSr12tN15CoRzVQnItiD4rKHjSysiJ9Hg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=FeonM7BLHPnum07msX5p8Om5dLPcbjDb1gYFoCbWo7Kdn7rVILISZC6wpsZ5178KR OL46jrkQrbNkfNJfnvShVn1O3qZBbyByhAwyuxep886/rJ+LFXlogxNJUVkuyYMAPF 0x9eux44Arxf4CP8BAFc0CsVWd65NaHqzdeEcaCmBVyW6GE8J4YTLpbIUCjjcBuo1e Uy47Z5xhxsalFpN8gr58IH2j2C8lfeosBWJWEVJic+5lzg5/HnaUv7Tv8tDqscg1Pm h34KOe+VeAZsyWsfWMxsaPx6/j+OMlZsVvzEodQZGnm3GcUxwnhaU0+sdJYPgSJzOz IB6W/M26f0SIQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0B29C5B559; Mon, 2 Jun 2025 17:27:35 +0000 (UTC) From: Vincent Knecht via B4 Relay Date: Mon, 02 Jun 2025 19:27:27 +0200 Subject: [PATCH v4 1/4] media: qcom: camss: vfe: Add VBIF setting support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250602-camss-8x39-vbif-v4-1-32c277d8f9bf@mailoo.org> References: <20250602-camss-8x39-vbif-v4-0-32c277d8f9bf@mailoo.org> In-Reply-To: <20250602-camss-8x39-vbif-v4-0-32c277d8f9bf@mailoo.org> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Apitzsch?= , phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Vincent Knecht X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1748885254; l=5704; i=vincent.knecht@mailoo.org; s=20250414; h=from:subject:message-id; bh=BNIKW/RwpPNnHWbIEWBtf7KbBZ0Sem2j1RciQTI5Pzg=; b=ln2mZkNtX8QALbFStuWytkKNVBm90ENDowHvcNjpQfb57D7xRSVz6ilNtafz5J8SAP7BpiwPY PWFmhNjy4HcAVQw2QIJq0jW5lFbE6NGs0icFfBOzcHUXjUjje/xBafA X-Developer-Key: i=vincent.knecht@mailoo.org; a=ed25519; pk=MFCVQkhL3+d3NHDzNPWpyZ4isxJvT+QTqValj5gSkm4= X-Endpoint-Received: by B4 Relay for vincent.knecht@mailoo.org/20250414 with auth_id=377 X-Original-From: Vincent Knecht Reply-To: vincent.knecht@mailoo.org From: Vincent Knecht Some devices need writing values to VFE VBIF registers. Add helper functions to do this. Reviewed-by: Bryan O'Donoghue Signed-off-by: Vincent Knecht --- drivers/media/platform/qcom/camss/Makefile | 1 + drivers/media/platform/qcom/camss/camss-vfe-4-1.c | 12 +++++++++++ drivers/media/platform/qcom/camss/camss-vfe-vbif.c | 25 ++++++++++++++++++= ++++ drivers/media/platform/qcom/camss/camss-vfe-vbif.h | 19 ++++++++++++++++ drivers/media/platform/qcom/camss/camss-vfe.c | 9 ++++++++ drivers/media/platform/qcom/camss/camss-vfe.h | 3 +++ 6 files changed, 69 insertions(+) diff --git a/drivers/media/platform/qcom/camss/Makefile b/drivers/media/pla= tform/qcom/camss/Makefile index d26a9c24a430a831e0d865db4d96142da5276653..4c66d29ae505ae5adc717ae98f7= 7fb736a6e15b9 100644 --- a/drivers/media/platform/qcom/camss/Makefile +++ b/drivers/media/platform/qcom/camss/Makefile @@ -21,6 +21,7 @@ qcom-camss-objs +=3D \ camss-vfe-680.o \ camss-vfe-780.o \ camss-vfe-gen1.o \ + camss-vfe-vbif.o \ camss-vfe.o \ camss-video.o \ camss-format.o \ diff --git a/drivers/media/platform/qcom/camss/camss-vfe-4-1.c b/drivers/me= dia/platform/qcom/camss/camss-vfe-4-1.c index 901677293d971cf761944a660ef719af38203f22..9cf1ccdb2fe7ca9bf89b746af83= 6e1035b457a8f 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe-4-1.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-4-1.c @@ -15,6 +15,7 @@ #include "camss.h" #include "camss-vfe.h" #include "camss-vfe-gen1.h" +#include "camss-vfe-vbif.h" =20 #define VFE_0_HW_VERSION 0x000 =20 @@ -733,6 +734,7 @@ static void vfe_set_qos(struct vfe_device *vfe) { u32 val =3D VFE_0_BUS_BDG_QOS_CFG_0_CFG; u32 val7 =3D VFE_0_BUS_BDG_QOS_CFG_7_CFG; + int ret; =20 writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_0); writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_1); @@ -742,6 +744,16 @@ static void vfe_set_qos(struct vfe_device *vfe) writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_5); writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_6); writel_relaxed(val7, vfe->base + VFE_0_BUS_BDG_QOS_CFG_7); + + /* SoC-specific VBIF settings */ + if (vfe->res->has_vbif) { + ret =3D vfe_vbif_apply_settings(vfe); + if (ret < 0) { + dev_err_ratelimited(vfe->camss->dev, + "VFE: VBIF error %d\n", + ret); + } + } } =20 static void vfe_set_ds(struct vfe_device *vfe) diff --git a/drivers/media/platform/qcom/camss/camss-vfe-vbif.c b/drivers/m= edia/platform/qcom/camss/camss-vfe-vbif.c new file mode 100644 index 0000000000000000000000000000000000000000..691335f231a6001e6c535431a18= b2e21ddc832c9 --- /dev/null +++ b/drivers/media/platform/qcom/camss/camss-vfe-vbif.c @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * camss-vfe-vbif.c + * + * Qualcomm MSM Camera Subsystem - VFE VBIF Module + * + * Copyright (c) 2025, The Linux Foundation. All rights reserved. + * + */ + +#include + +#include "camss.h" +#include "camss-vfe.h" +#include "camss-vfe-vbif.h" + +void vfe_vbif_write_reg(struct vfe_device *vfe, u32 reg, u32 val) +{ + writel_relaxed(val, vfe->vbif_base + reg); +} + +int vfe_vbif_apply_settings(struct vfe_device *vfe) +{ + return 0; +} diff --git a/drivers/media/platform/qcom/camss/camss-vfe-vbif.h b/drivers/m= edia/platform/qcom/camss/camss-vfe-vbif.h new file mode 100644 index 0000000000000000000000000000000000000000..502db629e961f67723b14a7c8c9= ca973fe4c267c --- /dev/null +++ b/drivers/media/platform/qcom/camss/camss-vfe-vbif.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * camss-vfe-vbif.h + * + * Qualcomm MSM Camera Subsystem - VFE VBIF Module + * + * Copyright (c) 2025, The Linux Foundation. All rights reserved. + * + */ +#ifndef QC_MSM_CAMSS_VFE_VBIF_H +#define QC_MSM_CAMSS_VFE_VBIF_H + +#include "camss-vfe.h" + +void vfe_vbif_write_reg(struct vfe_device *vfe, u32 reg, u32 val); + +int vfe_vbif_apply_settings(struct vfe_device *vfe); + +#endif /* QC_MSM_CAMSS_VFE_VBIF_H */ diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/= platform/qcom/camss/camss-vfe.c index 4bca6c3abaff9b898ea879674a3ff8f3592d3139..ac8e5e9471a426bec5d989abd5e= 082f5fa027364 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -1807,6 +1807,15 @@ int msm_vfe_subdev_init(struct camss *camss, struct = vfe_device *vfe, return PTR_ERR(vfe->base); } =20 + if (vfe->res->has_vbif) { + vfe->vbif_base =3D devm_platform_ioremap_resource_byname(pdev, + vfe->res->vbif_name); + if (IS_ERR(vfe->vbif_base)) { + dev_err(dev, "could not map vbif memory\n"); + return PTR_ERR(vfe->vbif_base); + } + } + /* Interrupt */ =20 ret =3D platform_get_irq_byname(pdev, res->interrupt[0]); diff --git a/drivers/media/platform/qcom/camss/camss-vfe.h b/drivers/media/= platform/qcom/camss/camss-vfe.h index a23f666be7531e0366c73faea44ed245e7a8e30f..614e932c33da78e02e0800ce653= 4af7b14822f83 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.h +++ b/drivers/media/platform/qcom/camss/camss-vfe.h @@ -136,6 +136,8 @@ struct vfe_subdev_resources { u8 line_num; bool has_pd; char *pd_name; + bool has_vbif; + char *vbif_name; const struct vfe_hw_ops *hw_ops; const struct camss_formats *formats_rdi; const struct camss_formats *formats_pix; @@ -145,6 +147,7 @@ struct vfe_device { struct camss *camss; u8 id; void __iomem *base; + void __iomem *vbif_base; u32 irq; char irq_name[30]; struct camss_clock *clock; --=20 2.49.0 From nobody Thu Dec 18 14:10:50 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8FFC21B4232; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250602-camss-8x39-vbif-v4-2-32c277d8f9bf@mailoo.org> References: <20250602-camss-8x39-vbif-v4-0-32c277d8f9bf@mailoo.org> In-Reply-To: <20250602-camss-8x39-vbif-v4-0-32c277d8f9bf@mailoo.org> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Apitzsch?= , phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Vincent Knecht X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1748885254; l=10622; i=vincent.knecht@mailoo.org; s=20250414; h=from:subject:message-id; bh=phi7FRr4SKoTWswvu2OhqIOX+PPeA/X5iHf1I/IuMRQ=; b=JPzoMjRersutGV9Ngwrdey20ejcdg0xZQ6SJFVRLyMupT1vQF5bkiMpYbxJl3VKQd8+kjpQtq VVUl6LwWYdLBUZA5Mw8EEPeTiCuePVYYtffuv5c6KspX6RWBPxt+uxL X-Developer-Key: i=vincent.knecht@mailoo.org; a=ed25519; pk=MFCVQkhL3+d3NHDzNPWpyZ4isxJvT+QTqValj5gSkm4= X-Endpoint-Received: by B4 Relay for vincent.knecht@mailoo.org/20250414 with auth_id=377 X-Original-From: Vincent Knecht Reply-To: vincent.knecht@mailoo.org From: Vincent Knecht The camera subsystem for the MSM8939 is the same as MSM8916 except with 3 CSID instead of 2, and some higher clock rates. As a quirk, this SoC needs writing values to 2 VFE VBIF registers (see downstream msm8939-camera.dtsi vbif-{regs,settings} properties). This fixes black stripes across sensor and garbage in CSID TPG outputs. Add support for the MSM8939 camera subsystem. Reviewed-by: Bryan O'Donoghue Signed-off-by: Vincent Knecht --- drivers/media/platform/qcom/camss/camss-csiphy.c | 1 + drivers/media/platform/qcom/camss/camss-ispif.c | 8 +- drivers/media/platform/qcom/camss/camss-vfe-vbif.c | 6 + drivers/media/platform/qcom/camss/camss-vfe.c | 1 + drivers/media/platform/qcom/camss/camss.c | 157 +++++++++++++++++= ++++ drivers/media/platform/qcom/camss/camss.h | 1 + 6 files changed, 172 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/med= ia/platform/qcom/camss/camss-csiphy.c index c622efcc92ff3781d7fc3ace0253c2d64c91e847..6311fc2975aa1345e430a477c8a= 6476f1d7e5663 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy.c @@ -605,6 +605,7 @@ int msm_csiphy_subdev_init(struct camss *camss, return PTR_ERR(csiphy->base); =20 if (camss->res->version =3D=3D CAMSS_8x16 || + camss->res->version =3D=3D CAMSS_8x39 || camss->res->version =3D=3D CAMSS_8x53 || camss->res->version =3D=3D CAMSS_8x96) { csiphy->base_clk_mux =3D diff --git a/drivers/media/platform/qcom/camss/camss-ispif.c b/drivers/medi= a/platform/qcom/camss/camss-ispif.c index 2dc585c6123dd248a5bacd9c7a88cb5375644311..aaf3caa42d33dcb641651e7f5bc= 0c2a564d85bfa 100644 --- a/drivers/media/platform/qcom/camss/camss-ispif.c +++ b/drivers/media/platform/qcom/camss/camss-ispif.c @@ -1112,6 +1112,8 @@ int msm_ispif_subdev_init(struct camss *camss, /* Number of ISPIF lines - same as number of CSID hardware modules */ if (camss->res->version =3D=3D CAMSS_8x16) ispif->line_num =3D 2; + else if (camss->res->version =3D=3D CAMSS_8x39) + ispif->line_num =3D 3; else if (camss->res->version =3D=3D CAMSS_8x96 || camss->res->version =3D=3D CAMSS_8x53 || camss->res->version =3D=3D CAMSS_660) @@ -1128,7 +1130,8 @@ int msm_ispif_subdev_init(struct camss *camss, ispif->line[i].ispif =3D ispif; ispif->line[i].id =3D i; =20 - if (camss->res->version =3D=3D CAMSS_8x16) { + if (camss->res->version =3D=3D CAMSS_8x16 || + camss->res->version =3D=3D CAMSS_8x39) { ispif->line[i].formats =3D ispif_formats_8x16; ispif->line[i].nformats =3D ARRAY_SIZE(ispif_formats_8x16); @@ -1162,7 +1165,8 @@ int msm_ispif_subdev_init(struct camss *camss, ispif->irq =3D ret; snprintf(ispif->irq_name, sizeof(ispif->irq_name), "%s_%s", dev_name(dev), MSM_ISPIF_NAME); - if (camss->res->version =3D=3D CAMSS_8x16) + if (camss->res->version =3D=3D CAMSS_8x16 || + camss->res->version =3D=3D CAMSS_8x39) ret =3D devm_request_irq(dev, ispif->irq, ispif_isr_8x16, IRQF_TRIGGER_RISING, ispif->irq_name, ispif); else if (camss->res->version =3D=3D CAMSS_8x96 || diff --git a/drivers/media/platform/qcom/camss/camss-vfe-vbif.c b/drivers/m= edia/platform/qcom/camss/camss-vfe-vbif.c index 691335f231a6001e6c535431a18b2e21ddc832c9..911f8da02f1fbb500ab9564978e= 2b0dddf93e84e 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe-vbif.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-vbif.c @@ -14,6 +14,9 @@ #include "camss-vfe.h" #include "camss-vfe-vbif.h" =20 +#define VBIF_FIXED_SORT_EN 0x30 +#define VBIF_FIXED_SORT_SEL0 0x34 + void vfe_vbif_write_reg(struct vfe_device *vfe, u32 reg, u32 val) { writel_relaxed(val, vfe->vbif_base + reg); @@ -21,5 +24,8 @@ void vfe_vbif_write_reg(struct vfe_device *vfe, u32 reg, = u32 val) =20 int vfe_vbif_apply_settings(struct vfe_device *vfe) { + vfe_vbif_write_reg(vfe, VBIF_FIXED_SORT_EN, 0xfff); + vfe_vbif_write_reg(vfe, VBIF_FIXED_SORT_SEL0, 0x555000); + return 0; } diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/= platform/qcom/camss/camss-vfe.c index ac8e5e9471a426bec5d989abd5e082f5fa027364..3ad7f2296c504cdedcd9a0c1b41= 8d543fa413381 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -290,6 +290,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 = sink_code, =20 switch (vfe->camss->res->version) { case CAMSS_8x16: + case CAMSS_8x39: case CAMSS_8x53: switch (sink_code) { case MEDIA_BUS_FMT_YUYV8_1X16: diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/plat= form/qcom/camss/camss.c index 06f42875702f02f9d8d83d06ddaa972eacb593f8..6a68876a00a8d6eaf3ef55e8fde= 0d266f567879a 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -154,6 +154,149 @@ static const struct camss_subdev_resources vfe_res_8x= 16[] =3D { } }; =20 +static const struct camss_subdev_resources csiphy_res_8x39[] =3D { + /* CSIPHY0 */ + { + .regulators =3D { "vdda" }, + .clock =3D { "top_ahb", "ispif_ahb", "ahb", "csiphy0_timer" }, + .clock_rate =3D { { 0 }, + { 40000000, 80000000 }, + { 0 }, + { 100000000, 200000000 } }, + .reg =3D { "csiphy0", "csiphy0_clk_mux" }, + .interrupt =3D { "csiphy0" }, + .csiphy =3D { + .id =3D 0, + .hw_ops =3D &csiphy_ops_2ph_1_0, + .formats =3D &csiphy_formats_8x16 + } + }, + + /* CSIPHY1 */ + { + .regulators =3D { "vdda" }, + .clock =3D { "top_ahb", "ispif_ahb", "ahb", "csiphy1_timer" }, + .clock_rate =3D { { 0 }, + { 40000000, 80000000 }, + { 0 }, + { 100000000, 200000000 } }, + .reg =3D { "csiphy1", "csiphy1_clk_mux" }, + .interrupt =3D { "csiphy1" }, + .csiphy =3D { + .id =3D 1, + .hw_ops =3D &csiphy_ops_2ph_1_0, + .formats =3D &csiphy_formats_8x16 + } + } +}; + +static const struct camss_subdev_resources csid_res_8x39[] =3D { + /* CSID0 */ + { + .regulators =3D {}, + .clock =3D { "top_ahb", "ispif_ahb", "csi0_ahb", "ahb", + "csi0", "csi0_phy", "csi0_pix", "csi0_rdi" }, + .clock_rate =3D { { 0 }, + { 40000000, 80000000 }, + { 0 }, + { 0 }, + { 100000000, 200000000 }, + { 0 }, + { 0 }, + { 0 } }, + .reg =3D { "csid0" }, + .interrupt =3D { "csid0" }, + .csid =3D { + .hw_ops =3D &csid_ops_4_1, + .parent_dev_ops =3D &vfe_parent_dev_ops, + .formats =3D &csid_formats_4_1 + } + }, + + /* CSID1 */ + { + .regulators =3D {}, + .clock =3D { "top_ahb", "ispif_ahb", "csi1_ahb", "ahb", + "csi1", "csi1_phy", "csi1_pix", "csi1_rdi" }, + .clock_rate =3D { { 0 }, + { 40000000, 80000000 }, + { 0 }, + { 0 }, + { 100000000, 200000000 }, + { 0 }, + { 0 }, + { 0 } }, + .reg =3D { "csid1" }, + .interrupt =3D { "csid1" }, + .csid =3D { + .hw_ops =3D &csid_ops_4_1, + .parent_dev_ops =3D &vfe_parent_dev_ops, + .formats =3D &csid_formats_4_1 + } + }, + + /* CSID2 */ + { + .regulators =3D {}, + .clock =3D { "top_ahb", "ispif_ahb", "csi2_ahb", "ahb", + "csi2", "csi2_phy", "csi2_pix", "csi2_rdi" }, + .clock_rate =3D { { 0 }, + { 40000000, 80000000 }, + { 0 }, + { 0 }, + { 100000000, 200000000 }, + { 0 }, + { 0 }, + { 0 } }, + .reg =3D { "csid2" }, + .interrupt =3D { "csid2" }, + .csid =3D { + .hw_ops =3D &csid_ops_4_1, + .parent_dev_ops =3D &vfe_parent_dev_ops, + .formats =3D &csid_formats_4_1 + } + }, +}; + +static const struct camss_subdev_resources ispif_res_8x39 =3D { + /* ISPIF */ + .clock =3D { "top_ahb", "ispif_ahb", "ahb", + "csi0", "csi0_pix", "csi0_rdi", + "csi1", "csi1_pix", "csi1_rdi", + "csi2", "csi2_pix", "csi2_rdi" }, + .clock_for_reset =3D { "vfe0", "csi_vfe0" }, + .reg =3D { "ispif", "csi_clk_mux" }, + .interrupt =3D { "ispif" }, +}; + +static const struct camss_subdev_resources vfe_res_8x39[] =3D { + /* VFE0 */ + { + .regulators =3D {}, + .clock =3D { "top_ahb", "ispif_ahb", "vfe0", "csi_vfe0", + "vfe_ahb", "vfe_axi", "ahb" }, + .clock_rate =3D { { 0 }, + { 40000000, 80000000 }, + { 50000000, 80000000, 100000000, 160000000, + 177780000, 200000000, 266670000, 320000000, + 400000000, 465000000, 480000000, 600000000 }, + { 0 }, + { 0 }, + { 0 }, + { 0 } }, + .reg =3D { "vfe0" }, + .interrupt =3D { "vfe0" }, + .vfe =3D { + .line_num =3D 3, + .has_vbif =3D true, + .vbif_name =3D "vfe0_vbif", + .hw_ops =3D &vfe_ops_4_1, + .formats_rdi =3D &vfe_formats_rdi_8x16, + .formats_pix =3D &vfe_formats_pix_8x16 + } + } +}; + static const struct camss_subdev_resources csid_res_8x53[] =3D { /* CSID0 */ { @@ -3585,6 +3728,7 @@ static int camss_probe(struct platform_device *pdev) return -ENOMEM; =20 if (camss->res->version =3D=3D CAMSS_8x16 || + camss->res->version =3D=3D CAMSS_8x39 || camss->res->version =3D=3D CAMSS_8x53 || camss->res->version =3D=3D CAMSS_8x96) { camss->ispif =3D devm_kcalloc(dev, 1, sizeof(*camss->ispif), GFP_KERNEL); @@ -3727,6 +3871,18 @@ static const struct camss_resources msm8916_resource= s =3D { .link_entities =3D camss_link_entities }; =20 +static const struct camss_resources msm8939_resources =3D { + .version =3D CAMSS_8x39, + .csiphy_res =3D csiphy_res_8x39, + .csid_res =3D csid_res_8x39, + .ispif_res =3D &ispif_res_8x39, + .vfe_res =3D vfe_res_8x39, + .csiphy_num =3D ARRAY_SIZE(csiphy_res_8x39), + .csid_num =3D ARRAY_SIZE(csid_res_8x39), + .vfe_num =3D ARRAY_SIZE(vfe_res_8x39), + .link_entities =3D camss_link_entities +}; + static const struct camss_resources msm8953_resources =3D { .version =3D CAMSS_8x53, .icc_res =3D icc_res_8x53, @@ -3863,6 +4019,7 @@ static const struct camss_resources x1e80100_resource= s =3D { =20 static const struct of_device_id camss_dt_match[] =3D { { .compatible =3D "qcom,msm8916-camss", .data =3D &msm8916_resources }, + { .compatible =3D "qcom,msm8939-camss", .data =3D &msm8939_resources }, { .compatible =3D "qcom,msm8953-camss", .data =3D &msm8953_resources }, { .compatible =3D "qcom,msm8996-camss", .data =3D &msm8996_resources }, { .compatible =3D "qcom,sc7280-camss", .data =3D &sc7280_resources }, diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/plat= form/qcom/camss/camss.h index 63c0afee154a02194820016ccf554620d6521c8b..be11cf3af478627fa48827e70d5= f0673939e1e63 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -80,6 +80,7 @@ enum camss_version { CAMSS_660, CAMSS_7280, CAMSS_8x16, + CAMSS_8x39, CAMSS_8x53, CAMSS_8x96, CAMSS_8250, --=20 2.49.0 From nobody Thu Dec 18 14:10:50 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ABE8C2040B6; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250602-camss-8x39-vbif-v4-3-32c277d8f9bf@mailoo.org> References: <20250602-camss-8x39-vbif-v4-0-32c277d8f9bf@mailoo.org> In-Reply-To: <20250602-camss-8x39-vbif-v4-0-32c277d8f9bf@mailoo.org> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Apitzsch?= , phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Vincent Knecht , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1748885254; l=7885; i=vincent.knecht@mailoo.org; s=20250414; h=from:subject:message-id; bh=yYUtWEOzJyaJ+JLFfjjzqA4bQzs3SgM9hhVhnVPcc24=; b=dEdN1sNfyl0JnHtQnDRa91XQbSZo8Ss0JiGD7Q4g1OU/H63O0bXhEy1edflMwBd+pweqL793I dJ+FAbkr74tBN5Y4lfbKVaswY/lpnIBsIkJeEFjnM/uihe/ZMGlW4B7 X-Developer-Key: i=vincent.knecht@mailoo.org; a=ed25519; pk=MFCVQkhL3+d3NHDzNPWpyZ4isxJvT+QTqValj5gSkm4= X-Endpoint-Received: by B4 Relay for vincent.knecht@mailoo.org/20250414 with auth_id=377 X-Original-From: Vincent Knecht Reply-To: vincent.knecht@mailoo.org From: Vincent Knecht Add bindings for qcom,msm8939-camss in order to support the camera subsystem for MSM8939. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Vincent Knecht --- .../bindings/media/qcom,msm8939-camss.yaml | 254 +++++++++++++++++= ++++ 1 file changed, 254 insertions(+) diff --git a/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yam= l b/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml new file mode 100644 index 0000000000000000000000000000000000000000..59bf16888a8235495a2080e512c= e179583bcd25d --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml @@ -0,0 +1,254 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,msm8939-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm MSM8939 Camera Subsystem (CAMSS) + +maintainers: + - Vincent Knecht + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms + +properties: + compatible: + const: qcom,msm8939-camss + + reg: + maxItems: 11 + + reg-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csiphy0 + - const: csiphy0_clk_mux + - const: csiphy1 + - const: csiphy1_clk_mux + - const: csi_clk_mux + - const: ispif + - const: vfe0 + - const: vfe0_vbif + + clocks: + maxItems: 24 + + clock-names: + items: + - const: ahb + - const: csi0 + - const: csi0_ahb + - const: csi0_phy + - const: csi0_pix + - const: csi0_rdi + - const: csi1 + - const: csi1_ahb + - const: csi1_phy + - const: csi1_pix + - const: csi1_rdi + - const: csi2 + - const: csi2_ahb + - const: csi2_phy + - const: csi2_pix + - const: csi2_rdi + - const: csiphy0_timer + - const: csiphy1_timer + - const: csi_vfe0 + - const: ispif_ahb + - const: top_ahb + - const: vfe0 + - const: vfe_ahb + - const: vfe_axi + + interrupts: + maxItems: 7 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csiphy0 + - const: csiphy1 + - const: ispif + - const: vfe0 + + iommus: + maxItems: 1 + + power-domains: + items: + - description: VFE GDSC - Video Front End, Global Distributed Switch + Controller. + + vdda-supply: + description: + Definition of the regulator used as analog power supply. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + patternProperties: + "^port@[0-1]$": + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + bus-type: + enum: + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + + required: + - data-lanes + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - interrupt-names + - iommus + - power-domains + - vdda-supply + - ports + +additionalProperties: false + +examples: + - | + #include + #include + + isp@1b08000 { + compatible =3D "qcom,msm8939-camss"; + + reg =3D <0x01b08000 0x100>, + <0x01b08400 0x100>, + <0x01b08800 0x100>, + <0x01b0ac00 0x200>, + <0x01b00030 0x4>, + <0x01b0b000 0x200>, + <0x01b00038 0x4>, + <0x01b00020 0x10>, + <0x01b0a000 0x500>, + <0x01b10000 0x1000>, + <0x01b40000 0x200>; + + reg-names =3D "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy0_clk_mux", + "csiphy1", + "csiphy1_clk_mux", + "csi_clk_mux", + "ispif", + "vfe0", + "vfe0_vbif"; + + clocks =3D <&gcc GCC_CAMSS_AHB_CLK>, + <&gcc GCC_CAMSS_CSI0_CLK>, + <&gcc GCC_CAMSS_CSI0_AHB_CLK>, + <&gcc GCC_CAMSS_CSI0PHY_CLK>, + <&gcc GCC_CAMSS_CSI0PIX_CLK>, + <&gcc GCC_CAMSS_CSI0RDI_CLK>, + <&gcc GCC_CAMSS_CSI1_CLK>, + <&gcc GCC_CAMSS_CSI1_AHB_CLK>, + <&gcc GCC_CAMSS_CSI1PHY_CLK>, + <&gcc GCC_CAMSS_CSI1PIX_CLK>, + <&gcc GCC_CAMSS_CSI1RDI_CLK>, + <&gcc GCC_CAMSS_CSI2_CLK>, + <&gcc GCC_CAMSS_CSI2_AHB_CLK>, + <&gcc GCC_CAMSS_CSI2PHY_CLK>, + <&gcc GCC_CAMSS_CSI2PIX_CLK>, + <&gcc GCC_CAMSS_CSI2RDI_CLK>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, + <&gcc GCC_CAMSS_CSI_VFE0_CLK>, + <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_VFE0_CLK>, + <&gcc GCC_CAMSS_VFE_AHB_CLK>, + <&gcc GCC_CAMSS_VFE_AXI_CLK>; + + clock-names =3D "ahb", + "csi0", + "csi0_ahb", + "csi0_phy", + "csi0_pix", + "csi0_rdi", + "csi1", + "csi1_ahb", + "csi1_phy", + "csi1_pix", + "csi1_rdi", + "csi2", + "csi2_ahb", + "csi2_phy", + "csi2_pix", + "csi2_rdi", + "csiphy0_timer", + "csiphy1_timer", + "csi_vfe0", + "ispif_ahb", + "top_ahb", + "vfe0", + "vfe_ahb", + "vfe_axi"; + + interrupts =3D , + , + , + , + , + , + ; + + interrupt-names =3D "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "ispif", + "vfe0"; + + iommus =3D <&apps_iommu 3>; + + power-domains =3D <&gcc VFE_GDSC>; + + vdda-supply =3D <®_2v8>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@1 { + reg =3D <1>; + csiphy1_ep: endpoint { + clock-lanes =3D <1>; + data-lanes =3D <0 2>; + remote-endpoint =3D <&sensor_ep>; + }; + }; + }; + }; --=20 2.49.0 From nobody Thu Dec 18 14:10:50 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D0297226D08; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250602-camss-8x39-vbif-v4-4-32c277d8f9bf@mailoo.org> References: <20250602-camss-8x39-vbif-v4-0-32c277d8f9bf@mailoo.org> In-Reply-To: <20250602-camss-8x39-vbif-v4-0-32c277d8f9bf@mailoo.org> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Apitzsch?= , phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Vincent Knecht , Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1748885254; l=5488; i=vincent.knecht@mailoo.org; s=20250414; h=from:subject:message-id; bh=5p1p0R/aaMrHpxB3z9krUa7Xk1pgghKa87CxjRkiJx4=; b=BGxkyb2SRP93XuRtoMHCjEVHnriU8nZ34ThRCTUrRAbq4CjNugtgaKi7uMEC+F6cq140J1Shp la6APvz4nwHDQkJjxo9hVlY7M4PdJ3dJNMEYl72G6hHtx8D9dzbeU6h X-Developer-Key: i=vincent.knecht@mailoo.org; a=ed25519; pk=MFCVQkhL3+d3NHDzNPWpyZ4isxJvT+QTqValj5gSkm4= X-Endpoint-Received: by B4 Relay for vincent.knecht@mailoo.org/20250414 with auth_id=377 X-Original-From: Vincent Knecht Reply-To: vincent.knecht@mailoo.org From: Vincent Knecht Add the camera subsystem and CCI used to interface with cameras on the Snapdragon 615. Reviewed-by: Konrad Dybcio Signed-off-by: Vincent Knecht --- arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi | 4 + arch/arm64/boot/dts/qcom/msm8939.dtsi | 146 +++++++++++++++++++++++= ++++ 2 files changed, 150 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi b/arch/arm64/boot= /dts/qcom/msm8939-pm8916.dtsi index adb96cd8d643e5fde1ac95c0fc3c9c3c3efb07e8..659d127b1bc3570d137ca986e4e= acf600c183e5e 100644 --- a/arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi @@ -11,6 +11,10 @@ #include "msm8939.dtsi" #include "pm8916.dtsi" =20 +&camss { + vdda-supply =3D <&pm8916_l2>; +}; + &mdss_dsi0 { vdda-supply =3D <&pm8916_l2>; vddio-supply =3D <&pm8916_l6>; diff --git a/arch/arm64/boot/dts/qcom/msm8939.dtsi b/arch/arm64/boot/dts/qc= om/msm8939.dtsi index 68b92fdb996c26e7a1aadedf0f52e1afca85c4ab..082542b54d96adaed3e6b49bc36= 82005ea018a72 100644 --- a/arch/arm64/boot/dts/qcom/msm8939.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8939.dtsi @@ -1434,6 +1434,145 @@ mdss_dsi1_phy: phy@1aa0300 { }; }; =20 + camss: isp@1b08000 { + compatible =3D "qcom,msm8939-camss"; + reg =3D <0x01b08000 0x100>, + <0x01b08400 0x100>, + <0x01b08800 0x100>, + <0x01b0ac00 0x200>, + <0x01b00030 0x4>, + <0x01b0b000 0x200>, + <0x01b00038 0x4>, + <0x01b00020 0x10>, + <0x01b0a000 0x500>, + <0x01b10000 0x1000>, + <0x01b40000 0x200>; + reg-names =3D "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy0_clk_mux", + "csiphy1", + "csiphy1_clk_mux", + "csi_clk_mux", + "ispif", + "vfe0", + "vfe0_vbif"; + + clocks =3D <&gcc GCC_CAMSS_AHB_CLK>, + <&gcc GCC_CAMSS_CSI0_CLK>, + <&gcc GCC_CAMSS_CSI0_AHB_CLK>, + <&gcc GCC_CAMSS_CSI0PHY_CLK>, + <&gcc GCC_CAMSS_CSI0PIX_CLK>, + <&gcc GCC_CAMSS_CSI0RDI_CLK>, + <&gcc GCC_CAMSS_CSI1_CLK>, + <&gcc GCC_CAMSS_CSI1_AHB_CLK>, + <&gcc GCC_CAMSS_CSI1PHY_CLK>, + <&gcc GCC_CAMSS_CSI1PIX_CLK>, + <&gcc GCC_CAMSS_CSI1RDI_CLK>, + <&gcc GCC_CAMSS_CSI2_CLK>, + <&gcc GCC_CAMSS_CSI2_AHB_CLK>, + <&gcc GCC_CAMSS_CSI2PHY_CLK>, + <&gcc GCC_CAMSS_CSI2PIX_CLK>, + <&gcc GCC_CAMSS_CSI2RDI_CLK>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, + <&gcc GCC_CAMSS_CSI_VFE0_CLK>, + <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_VFE0_CLK>, + <&gcc GCC_CAMSS_VFE_AHB_CLK>, + <&gcc GCC_CAMSS_VFE_AXI_CLK>; + clock-names =3D "ahb", + "csi0", + "csi0_ahb", + "csi0_phy", + "csi0_pix", + "csi0_rdi", + "csi1", + "csi1_ahb", + "csi1_phy", + "csi1_pix", + "csi1_rdi", + "csi2", + "csi2_ahb", + "csi2_phy", + "csi2_pix", + "csi2_rdi", + "csiphy0_timer", + "csiphy1_timer", + "csi_vfe0", + "ispif_ahb", + "top_ahb", + "vfe0", + "vfe_ahb", + "vfe_axi"; + + interrupts =3D , + , + , + , + , + , + ; + interrupt-names =3D "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "ispif", + "vfe0"; + + iommus =3D <&apps_iommu 3>; + + power-domains =3D <&gcc VFE_GDSC>; + + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + }; + + port@1 { + reg =3D <1>; + }; + }; + }; + + cci: cci@1b0c000 { + compatible =3D "qcom,msm8916-cci", "qcom,msm8226-cci"; + reg =3D <0x01b0c000 0x1000>; + interrupts =3D ; + clocks =3D <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_CLK>, + <&gcc GCC_CAMSS_AHB_CLK>; + clock-names =3D "camss_top_ahb", + "cci_ahb", + "cci", + "camss_ahb"; + assigned-clocks =3D <&gcc GCC_CAMSS_CCI_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_CLK>; + assigned-clock-rates =3D <80000000>, + <19200000>; + pinctrl-0 =3D <&cci0_default>; + pinctrl-names =3D "default"; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + + cci_i2c0: i2c-bus@0 { + reg =3D <0>; + clock-frequency =3D <400000>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + gpu: gpu@1c00000 { compatible =3D "qcom,adreno-405.0", "qcom,adreno"; reg =3D <0x01c00000 0x10000>; @@ -1498,6 +1637,13 @@ apps_iommu: iommu@1ef0000 { #iommu-cells =3D <1>; qcom,iommu-secure-id =3D <17>; =20 + /* vfe */ + iommu-ctx@3000 { + compatible =3D "qcom,msm-iommu-v1-sec"; + reg =3D <0x3000 0x1000>; + interrupts =3D ; + }; + /* mdp_0: */ iommu-ctx@4000 { compatible =3D "qcom,msm-iommu-v1-ns"; --=20 2.49.0