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[109.43.115.37]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-450d800671csm88780205e9.30.2025.06.01.08.30.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Jun 2025 08:30:29 -0700 (PDT) From: Abd-Alrhman Masalkhi To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: arnd@arndb.de, gregkh@linuxfoundation.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, abd.masalkhi@gmail.com Subject: [PATCH v2 1/3] dt-bindings: eeprom: Add ST M24LR control interface Date: Sun, 1 Jun 2025 15:30:19 +0000 Message-ID: <20250601153022.2027919-2-abd.masalkhi@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250601153022.2027919-1-abd.masalkhi@gmail.com> References: <20250601153022.2027919-1-abd.masalkhi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for the control interface of STMicroelectronics M24LR RFID/NFC EEPROM chips. Signed-off-by: Abd-Alrhman Masalkhi --- .../devicetree/bindings/eeprom/st,m24lr.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/eeprom/st,m24lr.yaml diff --git a/Documentation/devicetree/bindings/eeprom/st,m24lr.yaml b/Docum= entation/devicetree/bindings/eeprom/st,m24lr.yaml new file mode 100644 index 000000000000..6d72325865d6 --- /dev/null +++ b/Documentation/devicetree/bindings/eeprom/st,m24lr.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/eeprom/st,m24lr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics M24LR Series NFC/RFID EEPROM Control Interface + +maintainers: + - Abd-Alrhman Masalkhi + +description: | + STMicroelectronics M24LR series are dual-interface (RF + I2C) + EEPROM chips. These devices support I2C-based access to both + memory and a system area that controls authentication and configuration. + They expose two I2C addresses: one for EEPROM memory and one for the + system control area (e.g., UID, password management). + +allOf: + - $ref: ../i2c/i2c-mux.yaml# + +properties: + compatible: + enum: + - st,m24lr04e-r + - st,m24lr16e-r + - st,m24lr64e-r + + reg: + maxItems: 1 + + pagesize: + enum: [1, 4, 8, 16, 32, 64, 128, 256] + default: 1 + $ref: /schemas/types.yaml#/definitions/uint32 + description: > + Maximum number of bytes that can be written in one I2C transaction. + the default is 1. + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + i2cmux@57 { + compatible =3D "st,m24lr04e-r"; + reg =3D <0x57>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + i2c@0 { + reg =3D <0x0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + eeprom@53 { + compatible =3D "atmel,24c04"; + reg =3D <0x53>; + address-width =3D <16>; + pagesize =3D <4>; + }; + }; + }; + }; +... --=20 2.43.0