From nobody Tue Dec 16 22:29:46 2025 Received: from mail-pj1-f74.google.com (mail-pj1-f74.google.com [209.85.216.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D902C2798ED for ; Fri, 30 May 2025 18:52:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.74 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748631175; cv=none; b=PLMJkYRugi3v0UkyPqY+8eASq4euEhdXA5suPPvcRHAsbjPiPblJdv1A1gWUfUtPRdKx2DuqR/ZNfd5U8dKpFeCGiikJO3wnbvEizB3HKmcR9vrph9qLtujNgKltK6n/xSHh5WTUmurHtzTH+6mnmiE/9vn/KyATiPsXXHuWQCc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748631175; c=relaxed/simple; bh=9N7GPALbliydFCbK3hpQ2CRhxsq5NHxBiR+n7tWS/0s=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=obuvpeb+VNynih1ZJl2Nk2isvmC2DyKonOGvNU9+B4Mn11xpHpdAcXMKwsZoH6tSGTLcAygWsUnNeFM7G8kTePD7qMcdTjfMJVSDPfjZsZTz8ORNVa4LG8xeBbjBLj9IZFzJzJgYOoZ9c9TJ9iznxdZ3cAwu/wFf/4Vg95mLxAU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--jmattson.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=llTV347G; arc=none smtp.client-ip=209.85.216.74 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--jmattson.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="llTV347G" Received: by mail-pj1-f74.google.com with SMTP id 98e67ed59e1d1-310e7c24158so2209936a91.3 for ; Fri, 30 May 2025 11:52:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1748631172; x=1749235972; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=Wsem6FS+PM3bxBHh8NW9Zw6YYHvZLyt09vacNObz8Kk=; b=llTV347GW4aIYXAXEUeRnCr/IDn1xps8anM5aCrMwVb2auG/KC8YMYHNSfMEuQyHOV wpMb8L7ehYla0BRJt0AzRfUMrMIOuh8mSVwVIn7FLTOqvLg9LCxL41pMrc2159h96UBT J1z2fWbKKI+V3jt/qHU9idLofVitj7h3fTyfXwnGhhHXs2Xp5lqgwM2/zH2D41fS+zEA bk6bWkWMXdgc4SPcMi5uU2MJbVkpJvR8GLw+UQnNCRZ4TpWWksTpcIAlRbPrV4ykgYHj rbbacsdQouBF57HXRo/QskKgmy82v5w+hXh3n0sLb7uO+v5B9bWFqD7r7hywTT6RzL3Q 0e+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1748631172; x=1749235972; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=Wsem6FS+PM3bxBHh8NW9Zw6YYHvZLyt09vacNObz8Kk=; b=T6joS2s0xHSaBtg65eh/+z+D+p7fUBEXrhfZBFPZEd3UO4E9kzo8n4wUa/C7/G26dZ NxmEHeSFJ6+pKo2uRqdYr3hP7FS1SM8ux/q5mXsjPrgcRqHcDqUStLg8Vqk4Gi6eQ0Zt KrN1GBJSbRyNLDgM2xaPYrg/5M/aEOC9CUX0QhRbw0x7qjNxg/eBGSIvhizvjvgYa8fa kL0c2KsSrWKIxo6vOezFSpmA3m9zqnhqwYGIwKZceDS6mokeNMaBHfpX/o6+03CInUW3 VHQp7zQNy2kq8jO7zxq0gsiFvm51OKQr2AUJn3RowvSoPctOotJHk+/7buC1x41xoB+E 96gA== X-Gm-Message-State: AOJu0YzN9MoI23UZI2rQ7AVhsxje6p5E1lP5cAnzWv4866RrF5MfdLEK GQ4NLAlYfCiefzzor7jgTCb8YfhfrzheKGdn7kkqyJpwE/0082r3/+mK6lk9hCYy25MnaGxofQ4 ULdHAD+Ciy68AQYhUsLx5mt2XRNLnwqmJ0m4JMwNmQ7GagPKB3GiudtiSImfeb1dtNGmdaY7Vm8 gem7cuCyNq/kfFRuSRzno8WUKeTUgo3dxXdIDFhjmq/gR0RwUsvNEy/LY= X-Google-Smtp-Source: AGHT+IFf7MqqMfOKOjix7RpuNvyJUwtvvuOnvE9h5W5zVtYWyLuoC3her9u9EPzEnX4PAanpaT0+GNcigKf8KA== X-Received: from pjbpd3.prod.google.com ([2002:a17:90b:1dc3:b0:311:df47:4773]) (user=jmattson job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:3505:b0:311:b5ac:6f6b with SMTP id 98e67ed59e1d1-31250368f94mr4817373a91.9.1748631171880; Fri, 30 May 2025 11:52:51 -0700 (PDT) Date: Fri, 30 May 2025 11:52:23 -0700 In-Reply-To: <20250530185239.2335185-1-jmattson@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250530185239.2335185-1-jmattson@google.com> X-Mailer: git-send-email 2.49.0.1204.g71687c7c1d-goog Message-ID: <20250530185239.2335185-2-jmattson@google.com> Subject: [PATCH v4 1/3] KVM: x86: Replace growing set of *_in_guest bools with a u64 From: Jim Mattson To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Sean Christopherson , Paolo Bonzini Cc: Jim Mattson Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Store each "disabled exit" boolean in a single bit rather than a byte. No functional change intended. Suggested-by: Sean Christopherson Signed-off-by: Jim Mattson --- arch/x86/include/asm/kvm_host.h | 5 +---- arch/x86/kvm/svm/svm.c | 2 +- arch/x86/kvm/vmx/vmx.c | 2 +- arch/x86/kvm/x86.c | 8 ++++---- arch/x86/kvm/x86.h | 13 +++++++++---- 5 files changed, 16 insertions(+), 14 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index 67b464651c8d..fa912b2e7591 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1390,10 +1390,7 @@ struct kvm_arch { =20 gpa_t wall_clock; =20 - bool mwait_in_guest; - bool hlt_in_guest; - bool pause_in_guest; - bool cstate_in_guest; + u64 disabled_exits; =20 unsigned long irq_sources_bitmap; s64 kvmclock_offset; diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index ffb34dadff1c..6d2d97fd967a 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -5102,7 +5102,7 @@ static int svm_vm_init(struct kvm *kvm) } =20 if (!pause_filter_count || !pause_filter_thresh) - kvm->arch.pause_in_guest =3D true; + kvm_disable_exits(kvm, KVM_X86_DISABLE_EXITS_PAUSE); =20 if (enable_apicv) { int ret =3D avic_vm_init(kvm); diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index b12414108cbf..136be14e6db0 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -7619,7 +7619,7 @@ int vmx_vcpu_create(struct kvm_vcpu *vcpu) int vmx_vm_init(struct kvm *kvm) { if (!ple_gap) - kvm->arch.pause_in_guest =3D true; + kvm_disable_exits(kvm, KVM_X86_DISABLE_EXITS_PAUSE); =20 if (boot_cpu_has(X86_BUG_L1TF) && enable_ept) { switch (l1tf_mitigation) { diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 570e7f8cbf64..8c20afda4398 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -6605,13 +6605,13 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm, pr_warn_once(SMT_RSB_MSG); =20 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE) - kvm->arch.pause_in_guest =3D true; + kvm_disable_exits(kvm, KVM_X86_DISABLE_EXITS_PAUSE); if (cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) - kvm->arch.mwait_in_guest =3D true; + kvm_disable_exits(kvm, KVM_X86_DISABLE_EXITS_MWAIT); if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT) - kvm->arch.hlt_in_guest =3D true; + kvm_disable_exits(kvm, KVM_X86_DISABLE_EXITS_HLT); if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE) - kvm->arch.cstate_in_guest =3D true; + kvm_disable_exits(kvm, KVM_X86_DISABLE_EXITS_CSTATE); r =3D 0; disable_exits_unlock: mutex_unlock(&kvm->lock); diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h index 88a9475899c8..0ad36851df4c 100644 --- a/arch/x86/kvm/x86.h +++ b/arch/x86/kvm/x86.h @@ -481,24 +481,29 @@ static inline u64 nsec_to_cycles(struct kvm_vcpu *vcp= u, u64 nsec) __rem; \ }) =20 +static inline void kvm_disable_exits(struct kvm *kvm, u64 mask) +{ + kvm->arch.disabled_exits |=3D mask; +} + static inline bool kvm_mwait_in_guest(struct kvm *kvm) { - return kvm->arch.mwait_in_guest; + return kvm->arch.disabled_exits & KVM_X86_DISABLE_EXITS_MWAIT; } =20 static inline bool kvm_hlt_in_guest(struct kvm *kvm) { - return kvm->arch.hlt_in_guest; + return kvm->arch.disabled_exits & KVM_X86_DISABLE_EXITS_HLT; } =20 static inline bool kvm_pause_in_guest(struct kvm *kvm) { - return kvm->arch.pause_in_guest; + return kvm->arch.disabled_exits & KVM_X86_DISABLE_EXITS_PAUSE; } =20 static inline bool kvm_cstate_in_guest(struct kvm *kvm) { - return kvm->arch.cstate_in_guest; + return kvm->arch.disabled_exits & KVM_X86_DISABLE_EXITS_CSTATE; } =20 static inline bool kvm_notify_vmexit_enabled(struct kvm *kvm) --=20 2.49.0.1204.g71687c7c1d-goog From nobody Tue Dec 16 22:29:46 2025 Received: from mail-pj1-f73.google.com (mail-pj1-f73.google.com [209.85.216.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 006BA2798FF for ; Fri, 30 May 2025 18:52:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.73 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748631175; cv=none; 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Fri, 30 May 2025 11:52:53 -0700 (PDT) Date: Fri, 30 May 2025 11:52:24 -0700 In-Reply-To: <20250530185239.2335185-1-jmattson@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250530185239.2335185-1-jmattson@google.com> X-Mailer: git-send-email 2.49.0.1204.g71687c7c1d-goog Message-ID: <20250530185239.2335185-3-jmattson@google.com> Subject: [PATCH v4 2/3] KVM: x86: Provide a capability to disable APERF/MPERF read intercepts From: Jim Mattson To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Sean Christopherson , Paolo Bonzini Cc: Jim Mattson Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Allow a guest to read the physical IA32_APERF and IA32_MPERF MSRs without interception. The IA32_APERF and IA32_MPERF MSRs are not virtualized. Writes are not handled at all. The MSR values are not zeroed on vCPU creation, saved on suspend, or restored on resume. No accommodation is made for processor migration or for sharing a logical processor with other tasks. No adjustments are made for non-unit TSC multipliers. The MSRs do not account for time the same way as the comparable PMU events, whether the PMU is virtualized by the traditional emulation method or the new mediated pass-through approach. Nonetheless, in a properly constrained environment, this capability can be combined with a guest CPUID table that advertises support for CPUID.6:ECX.APERFMPERF[bit 0] to induce a Linux guest to report the effective physical CPU frequency in /proc/cpuinfo. Moreover, there is no performance cost for this capability. Signed-off-by: Jim Mattson --- Documentation/virt/kvm/api.rst | 23 +++++++++++++++++++++++ arch/x86/kvm/svm/svm.c | 7 +++++++ arch/x86/kvm/svm/svm.h | 2 +- arch/x86/kvm/vmx/vmx.c | 6 ++++++ arch/x86/kvm/vmx/vmx.h | 2 +- arch/x86/kvm/x86.c | 8 +++++++- arch/x86/kvm/x86.h | 5 +++++ include/uapi/linux/kvm.h | 1 + tools/include/uapi/linux/kvm.h | 1 + 9 files changed, 52 insertions(+), 3 deletions(-) diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index 6fb1870f0999..5849a14a6712 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -7780,6 +7780,7 @@ Valid bits in args[0] are:: #define KVM_X86_DISABLE_EXITS_HLT (1 << 1) #define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2) #define KVM_X86_DISABLE_EXITS_CSTATE (1 << 3) + #define KVM_X86_DISABLE_EXITS_APERFMPERF (1 << 4) =20 Enabling this capability on a VM provides userspace with a way to no longer intercept some instructions for improved latency in some @@ -7790,6 +7791,28 @@ all such vmexits. =20 Do not enable KVM_FEATURE_PV_UNHALT if you disable HLT exits. =20 +Virtualizing the ``IA32_APERF`` and ``IA32_MPERF`` MSRs requires more +than just disabling APERF/MPERF exits. While both Intel and AMD +document strict usage conditions for these MSRs--emphasizing that only +the ratio of their deltas over a time interval (T0 to T1) is +architecturally defined--simply passing through the MSRs can still +produce an incorrect ratio. + +This erroneous ratio can occur if, between T0 and T1: + +1. The vCPU thread migrates between logical processors. +2. Live migration or suspend/resume operations take place. +3. Another task shares the vCPU's logical processor. +4. C-states lower thean C0 are emulated (e.g., via HLT interception). +5. The guest TSC frequency doesn't match the host TSC frequency. + +Due to these complexities, KVM does not automatically associate this +passthrough capability with the guest CPUID bit, +``CPUID.6:ECX.APERFMPERF[bit 0]``. Userspace VMMs that deem this +mechanism adequate for virtualizing the ``IA32_APERF`` and +``IA32_MPERF`` MSRs must set the guest CPUID bit explicitly. + + 7.14 KVM_CAP_S390_HPAGE_1M -------------------------- =20 diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 6d2d97fd967a..12468d228bb8 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -112,6 +112,8 @@ static const struct svm_direct_access_msrs { { .index =3D MSR_IA32_CR_PAT, .always =3D false }, { .index =3D MSR_AMD64_SEV_ES_GHCB, .always =3D true }, { .index =3D MSR_TSC_AUX, .always =3D false }, + { .index =3D MSR_IA32_APERF, .always =3D false }, + { .index =3D MSR_IA32_MPERF, .always =3D false }, { .index =3D X2APIC_MSR(APIC_ID), .always =3D false }, { .index =3D X2APIC_MSR(APIC_LVR), .always =3D false }, { .index =3D X2APIC_MSR(APIC_TASKPRI), .always =3D false }, @@ -1357,6 +1359,11 @@ static void init_vmcb(struct kvm_vcpu *vcpu) if (boot_cpu_has(X86_FEATURE_V_SPEC_CTRL)) set_msr_interception(vcpu, svm->msrpm, MSR_IA32_SPEC_CTRL, 1, 1); =20 + if (kvm_aperfmperf_in_guest(vcpu->kvm)) { + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_APERF, 1, 0); + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_MPERF, 1, 0); + } + if (kvm_vcpu_apicv_active(vcpu)) avic_init_vmcb(svm, vmcb); =20 diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h index f16b068c4228..ef10122ef590 100644 --- a/arch/x86/kvm/svm/svm.h +++ b/arch/x86/kvm/svm/svm.h @@ -44,7 +44,7 @@ static inline struct page *__sme_pa_to_page(unsigned long= pa) #define IOPM_SIZE PAGE_SIZE * 3 #define MSRPM_SIZE PAGE_SIZE * 2 =20 -#define MAX_DIRECT_ACCESS_MSRS 48 +#define MAX_DIRECT_ACCESS_MSRS 50 #define MSRPM_OFFSETS 32 extern u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly; extern bool npt_enabled; diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 136be14e6db0..e8eeafd813e5 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -188,6 +188,8 @@ static u32 vmx_possible_passthrough_msrs[MAX_POSSIBLE_P= ASSTHROUGH_MSRS] =3D { MSR_CORE_C3_RESIDENCY, MSR_CORE_C6_RESIDENCY, MSR_CORE_C7_RESIDENCY, + MSR_IA32_APERF, + MSR_IA32_MPERF, }; =20 /* @@ -7569,6 +7571,10 @@ int vmx_vcpu_create(struct kvm_vcpu *vcpu) vmx_disable_intercept_for_msr(vcpu, MSR_CORE_C6_RESIDENCY, MSR_TYPE_R); vmx_disable_intercept_for_msr(vcpu, MSR_CORE_C7_RESIDENCY, MSR_TYPE_R); } + if (kvm_aperfmperf_in_guest(vcpu->kvm)) { + vmx_disable_intercept_for_msr(vcpu, MSR_IA32_APERF, MSR_TYPE_R); + vmx_disable_intercept_for_msr(vcpu, MSR_IA32_MPERF, MSR_TYPE_R); + } =20 vmx->loaded_vmcs =3D &vmx->vmcs01; =20 diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h index 6d1e40ecc024..24c0bd2ff5e9 100644 --- a/arch/x86/kvm/vmx/vmx.h +++ b/arch/x86/kvm/vmx/vmx.h @@ -297,7 +297,7 @@ struct vcpu_vmx { struct lbr_desc lbr_desc; =20 /* Save desired MSR intercept (read: pass-through) state */ -#define MAX_POSSIBLE_PASSTHROUGH_MSRS 16 +#define MAX_POSSIBLE_PASSTHROUGH_MSRS 18 struct { DECLARE_BITMAP(read, MAX_POSSIBLE_PASSTHROUGH_MSRS); DECLARE_BITMAP(write, MAX_POSSIBLE_PASSTHROUGH_MSRS); diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 8c20afda4398..4e53e555f6cf 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -4574,6 +4574,9 @@ static u64 kvm_get_allowed_disable_exits(void) { u64 r =3D KVM_X86_DISABLE_EXITS_PAUSE; =20 + if (boot_cpu_has(X86_FEATURE_APERFMPERF)) + r |=3D KVM_X86_DISABLE_EXITS_APERFMPERF; + if (!mitigate_smt_rsb) { r |=3D KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_CSTATE; @@ -6601,7 +6604,8 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm, =20 if (!mitigate_smt_rsb && boot_cpu_has_bug(X86_BUG_SMT_RSB) && cpu_smt_possible() && - (cap->args[0] & ~KVM_X86_DISABLE_EXITS_PAUSE)) + (cap->args[0] & ~(KVM_X86_DISABLE_EXITS_PAUSE | + KVM_X86_DISABLE_EXITS_APERFMPERF))) pr_warn_once(SMT_RSB_MSG); =20 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE) @@ -6612,6 +6616,8 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm, kvm_disable_exits(kvm, KVM_X86_DISABLE_EXITS_HLT); if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE) kvm_disable_exits(kvm, KVM_X86_DISABLE_EXITS_CSTATE); + if (cap->args[0] & KVM_X86_DISABLE_EXITS_APERFMPERF) + kvm_disable_exits(kvm, KVM_X86_DISABLE_EXITS_APERFMPERF); r =3D 0; disable_exits_unlock: mutex_unlock(&kvm->lock); diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h index 0ad36851df4c..f6334201014a 100644 --- a/arch/x86/kvm/x86.h +++ b/arch/x86/kvm/x86.h @@ -506,6 +506,11 @@ static inline bool kvm_cstate_in_guest(struct kvm *kvm) return kvm->arch.disabled_exits & KVM_X86_DISABLE_EXITS_CSTATE; } =20 +static inline bool kvm_aperfmperf_in_guest(struct kvm *kvm) +{ + return kvm->arch.disabled_exits & KVM_X86_DISABLE_EXITS_APERFMPERF; +} + static inline bool kvm_notify_vmexit_enabled(struct kvm *kvm) { return kvm->arch.notify_vmexit_flags & KVM_X86_NOTIFY_VMEXIT_ENABLED; diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h index d00b85cb168c..7415a3863891 100644 --- a/include/uapi/linux/kvm.h +++ b/include/uapi/linux/kvm.h @@ -618,6 +618,7 @@ struct kvm_ioeventfd { #define KVM_X86_DISABLE_EXITS_HLT (1 << 1) #define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2) #define KVM_X86_DISABLE_EXITS_CSTATE (1 << 3) +#define KVM_X86_DISABLE_EXITS_APERFMPERF (1 << 4) =20 /* for KVM_ENABLE_CAP */ struct kvm_enable_cap { diff --git a/tools/include/uapi/linux/kvm.h b/tools/include/uapi/linux/kvm.h index b6ae8ad8934b..eef57c117140 100644 --- a/tools/include/uapi/linux/kvm.h +++ b/tools/include/uapi/linux/kvm.h @@ -617,6 +617,7 @@ struct kvm_ioeventfd { #define KVM_X86_DISABLE_EXITS_HLT (1 << 1) #define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2) #define KVM_X86_DISABLE_EXITS_CSTATE (1 << 3) +#define KVM_X86_DISABLE_EXITS_APERFMPERF (1 << 4) =20 /* for KVM_ENABLE_CAP */ struct kvm_enable_cap { --=20 2.49.0.1204.g71687c7c1d-goog From nobody Tue Dec 16 22:29:46 2025 Received: from mail-pj1-f73.google.com (mail-pj1-f73.google.com [209.85.216.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E0F4727A93B for ; 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Fri, 30 May 2025 11:52:54 -0700 (PDT) Date: Fri, 30 May 2025 11:52:25 -0700 In-Reply-To: <20250530185239.2335185-1-jmattson@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250530185239.2335185-1-jmattson@google.com> X-Mailer: git-send-email 2.49.0.1204.g71687c7c1d-goog Message-ID: <20250530185239.2335185-4-jmattson@google.com> Subject: [PATCH v4 3/3] KVM: selftests: Test behavior of KVM_X86_DISABLE_EXITS_APERFMPERF From: Jim Mattson To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Sean Christopherson , Paolo Bonzini Cc: Jim Mattson Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" For a VCPU thread pinned to a single LPU, verify that interleaved host and guest reads of IA32_[AM]PERF return strictly increasing values when APERFMPERF exiting is disabled. Signed-off-by: Jim Mattson --- tools/testing/selftests/kvm/Makefile.kvm | 1 + .../testing/selftests/kvm/include/kvm_util.h | 2 + tools/testing/selftests/kvm/lib/kvm_util.c | 17 +++ .../selftests/kvm/x86/aperfmperf_test.c | 132 ++++++++++++++++++ 4 files changed, 152 insertions(+) create mode 100644 tools/testing/selftests/kvm/x86/aperfmperf_test.c diff --git a/tools/testing/selftests/kvm/Makefile.kvm b/tools/testing/selft= ests/kvm/Makefile.kvm index 3e786080473d..8d42a3bd0dd8 100644 --- a/tools/testing/selftests/kvm/Makefile.kvm +++ b/tools/testing/selftests/kvm/Makefile.kvm @@ -131,6 +131,7 @@ TEST_GEN_PROGS_x86 +=3D x86/amx_test TEST_GEN_PROGS_x86 +=3D x86/max_vcpuid_cap_test TEST_GEN_PROGS_x86 +=3D x86/triple_fault_event_test TEST_GEN_PROGS_x86 +=3D x86/recalc_apic_map_test +TEST_GEN_PROGS_x86 +=3D x86/aperfmperf_test TEST_GEN_PROGS_x86 +=3D access_tracking_perf_test TEST_GEN_PROGS_x86 +=3D coalesced_io_test TEST_GEN_PROGS_x86 +=3D dirty_log_perf_test diff --git a/tools/testing/selftests/kvm/include/kvm_util.h b/tools/testing= /selftests/kvm/include/kvm_util.h index 93013564428b..43a1bef10ec0 100644 --- a/tools/testing/selftests/kvm/include/kvm_util.h +++ b/tools/testing/selftests/kvm/include/kvm_util.h @@ -1158,4 +1158,6 @@ bool vm_is_gpa_protected(struct kvm_vm *vm, vm_paddr_= t paddr); =20 uint32_t guest_get_vcpuid(void); =20 +int pin_task_to_one_cpu(void); + #endif /* SELFTEST_KVM_UTIL_H */ diff --git a/tools/testing/selftests/kvm/lib/kvm_util.c b/tools/testing/sel= ftests/kvm/lib/kvm_util.c index 5649cf2f40e8..b6c707ab92d7 100644 --- a/tools/testing/selftests/kvm/lib/kvm_util.c +++ b/tools/testing/selftests/kvm/lib/kvm_util.c @@ -10,6 +10,7 @@ #include "ucall_common.h" =20 #include +#include #include #include #include @@ -2321,3 +2322,19 @@ bool vm_is_gpa_protected(struct kvm_vm *vm, vm_paddr= _t paddr) pg =3D paddr >> vm->page_shift; return sparsebit_is_set(region->protected_phy_pages, pg); } + +int pin_task_to_one_cpu(void) +{ + int cpu =3D sched_getcpu(); + cpu_set_t cpuset; + int rc; + + CPU_ZERO(&cpuset); + CPU_SET(cpu, &cpuset); + + rc =3D pthread_setaffinity_np(pthread_self(), sizeof(cpuset), &cpuset); + TEST_ASSERT(rc =3D=3D 0, "%s: Can't set thread affinity", __func__); + + return cpu; +} + diff --git a/tools/testing/selftests/kvm/x86/aperfmperf_test.c b/tools/test= ing/selftests/kvm/x86/aperfmperf_test.c new file mode 100644 index 000000000000..64d976156693 --- /dev/null +++ b/tools/testing/selftests/kvm/x86/aperfmperf_test.c @@ -0,0 +1,132 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Test for KVM_X86_DISABLE_EXITS_APERFMPERF + * + * Copyright (C) 2025, Google LLC. + * + * Test the ability to disable VM-exits for rdmsr of IA32_APERF and + * IA32_MPERF. When these VM-exits are disabled, reads of these MSRs + * return the host's values. + * + * Note: Requires read access to /dev/cpu//msr to read host MSRs. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "kvm_util.h" +#include "processor.h" +#include "test_util.h" + +#define NUM_ITERATIONS 100 + +static int open_dev_msr(int cpu) +{ + char path[PATH_MAX]; + + snprintf(path, sizeof(path), "/dev/cpu/%d/msr", cpu); + return open_path_or_exit(path, O_RDONLY); +} + +static uint64_t read_dev_msr(int msr_fd, uint32_t msr) +{ + uint64_t data; + ssize_t rc; + + rc =3D pread(msr_fd, &data, sizeof(data), msr); + TEST_ASSERT(rc =3D=3D sizeof(data), "Read of MSR 0x%x failed", msr); + + return data; +} + +static void guest_code(void) +{ + int i; + + for (i =3D 0; i < NUM_ITERATIONS; i++) + GUEST_SYNC2(rdmsr(MSR_IA32_APERF), rdmsr(MSR_IA32_MPERF)); + + GUEST_DONE(); +} + +int main(int argc, char *argv[]) +{ + uint64_t host_aperf_before, host_mperf_before; + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + int msr_fd; + int cpu; + int i; + + cpu =3D pin_task_to_one_cpu(); + + msr_fd =3D open_dev_msr(cpu); + + /* + * This test requires a non-standard VM initialization, because + * KVM_ENABLE_CAP cannot be used on a VM file descriptor after + * a VCPU has been created. + */ + vm =3D vm_create(1); + + TEST_REQUIRE(vm_check_cap(vm, KVM_CAP_X86_DISABLE_EXITS) & + KVM_X86_DISABLE_EXITS_APERFMPERF); + + vm_enable_cap(vm, KVM_CAP_X86_DISABLE_EXITS, + KVM_X86_DISABLE_EXITS_APERFMPERF); + + vcpu =3D vm_vcpu_add(vm, 0, guest_code); + + host_aperf_before =3D read_dev_msr(msr_fd, MSR_IA32_APERF); + host_mperf_before =3D read_dev_msr(msr_fd, MSR_IA32_MPERF); + + for (i =3D 0; i < NUM_ITERATIONS; i++) { + uint64_t host_aperf_after, host_mperf_after; + uint64_t guest_aperf, guest_mperf; + struct ucall uc; + + vcpu_run(vcpu); + TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO); + + switch (get_ucall(vcpu, &uc)) { + case UCALL_DONE: + break; + case UCALL_ABORT: + REPORT_GUEST_ASSERT(uc); + case UCALL_SYNC: + guest_aperf =3D uc.args[0]; + guest_mperf =3D uc.args[1]; + + host_aperf_after =3D read_dev_msr(msr_fd, MSR_IA32_APERF); + host_mperf_after =3D read_dev_msr(msr_fd, MSR_IA32_MPERF); + + TEST_ASSERT(host_aperf_before < guest_aperf, + "APERF: host_before (0x%" PRIx64 ") >=3D guest (0x%" PRIx64 ")", + host_aperf_before, guest_aperf); + TEST_ASSERT(guest_aperf < host_aperf_after, + "APERF: guest (0x%" PRIx64 ") >=3D host_after (0x%" PRIx64 ")", + guest_aperf, host_aperf_after); + TEST_ASSERT(host_mperf_before < guest_mperf, + "MPERF: host_before (0x%" PRIx64 ") >=3D guest (0x%" PRIx64 ")", + host_mperf_before, guest_mperf); + TEST_ASSERT(guest_mperf < host_mperf_after, + "MPERF: guest (0x%" PRIx64 ") >=3D host_after (0x%" PRIx64 ")", + guest_mperf, host_mperf_after); + + host_aperf_before =3D host_aperf_after; + host_mperf_before =3D host_mperf_after; + + break; + } + } + + kvm_vm_free(vm); + close(msr_fd); + + return 0; +} --=20 2.49.0.1204.g71687c7c1d-goog