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([82.78.167.126]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-450dc818f27sm3986435e9.18.2025.05.30.04.19.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 May 2025 04:19:45 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com, manivannan.sadhasivam@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de Cc: claudiu.beznea@tuxon.dev, linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, john.madieu.xa@bp.renesas.com, Claudiu Beznea Subject: [PATCH v2 1/8] soc: renesas: rz-sysc: Add syscon/regmap support Date: Fri, 30 May 2025 14:19:10 +0300 Message-ID: <20250530111917.1495023-2-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250530111917.1495023-1-claudiu.beznea.uj@bp.renesas.com> References: <20250530111917.1495023-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: John Madieu The RZ/G3E system controller has various registers that control or report some properties specific to individual IPs. The regmap is registered as a syscon device to allow these IP drivers to access the registers through the regmap API. As other RZ SoCs might have custom read/write callbacks or max-offsets, add register a custom regmap configuration. [claudiu.beznea: - s/rzg3e_sysc_regmap/rzv2h_sysc_regmap in RZ/V2H sysc file - do not check the match->data validity in rz_sysc_probe() as it is always valid - register the regmap if data->regmap_cfg is valid] Signed-off-by: John Madieu Signed-off-by: Claudiu Beznea --- Changes in v2: - picked the latest version from John after he addressed the review comments received at [1]; - I adjusted as specified in the SoB area [1] https://lore.kernel.org/all/20250330214945.185725-2-john.madieu.xa@bp.r= enesas.com/ drivers/soc/renesas/Kconfig | 1 + drivers/soc/renesas/r9a08g045-sysc.c | 10 ++++++++++ drivers/soc/renesas/r9a09g047-sys.c | 10 ++++++++++ drivers/soc/renesas/r9a09g057-sys.c | 10 ++++++++++ drivers/soc/renesas/rz-sysc.c | 17 ++++++++++++++++- drivers/soc/renesas/rz-sysc.h | 3 +++ 6 files changed, 50 insertions(+), 1 deletion(-) diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig index fbc3b69d21a7..f3b7546092d6 100644 --- a/drivers/soc/renesas/Kconfig +++ b/drivers/soc/renesas/Kconfig @@ -437,6 +437,7 @@ config RST_RCAR =20 config SYSC_RZ bool "System controller for RZ SoCs" if COMPILE_TEST + select MFD_SYSCON =20 config SYSC_R9A08G045 bool "Renesas RZ/G3S System controller support" if COMPILE_TEST diff --git a/drivers/soc/renesas/r9a08g045-sysc.c b/drivers/soc/renesas/r9a= 08g045-sysc.c index f4db1431e036..0ef6df77e25f 100644 --- a/drivers/soc/renesas/r9a08g045-sysc.c +++ b/drivers/soc/renesas/r9a08g045-sysc.c @@ -18,6 +18,16 @@ static const struct rz_sysc_soc_id_init_data rzg3s_sysc_= soc_id_init_data __initc .specific_id_mask =3D GENMASK(27, 0), }; =20 +static const struct regmap_config rzg3s_sysc_regmap __initconst =3D { + .name =3D "rzg3s_sysc_regs", + .reg_bits =3D 32, + .reg_stride =3D 4, + .val_bits =3D 32, + .fast_io =3D true, + .max_register =3D 0xe20, +}; + const struct rz_sysc_init_data rzg3s_sysc_init_data __initconst =3D { .soc_id_init_data =3D &rzg3s_sysc_soc_id_init_data, + .regmap_cfg =3D &rzg3s_sysc_regmap, }; diff --git a/drivers/soc/renesas/r9a09g047-sys.c b/drivers/soc/renesas/r9a0= 9g047-sys.c index cd2eb7782cfe..a3acf6dd2867 100644 --- a/drivers/soc/renesas/r9a09g047-sys.c +++ b/drivers/soc/renesas/r9a09g047-sys.c @@ -62,6 +62,16 @@ static const struct rz_sysc_soc_id_init_data rzg3e_sys_s= oc_id_init_data __initco .print_id =3D rzg3e_sys_print_id, }; =20 +static const struct regmap_config rzg3e_sysc_regmap __initconst =3D { + .name =3D "rzg3e_sysc_regs", + .reg_bits =3D 32, + .reg_stride =3D 4, + .val_bits =3D 32, + .fast_io =3D true, + .max_register =3D 0x170c, +}; + const struct rz_sysc_init_data rzg3e_sys_init_data =3D { .soc_id_init_data =3D &rzg3e_sys_soc_id_init_data, + .regmap_cfg =3D &rzg3e_sysc_regmap, }; diff --git a/drivers/soc/renesas/r9a09g057-sys.c b/drivers/soc/renesas/r9a0= 9g057-sys.c index 4c21cc29edbc..c26821636dce 100644 --- a/drivers/soc/renesas/r9a09g057-sys.c +++ b/drivers/soc/renesas/r9a09g057-sys.c @@ -62,6 +62,16 @@ static const struct rz_sysc_soc_id_init_data rzv2h_sys_s= oc_id_init_data __initco .print_id =3D rzv2h_sys_print_id, }; =20 +static const struct regmap_config rzv2h_sysc_regmap __initconst =3D { + .name =3D "rzv2h_sysc_regs", + .reg_bits =3D 32, + .reg_stride =3D 4, + .val_bits =3D 32, + .fast_io =3D true, + .max_register =3D 0x170c, +}; + const struct rz_sysc_init_data rzv2h_sys_init_data =3D { .soc_id_init_data =3D &rzv2h_sys_soc_id_init_data, + .regmap_cfg =3D &rzv2h_sysc_regmap, }; diff --git a/drivers/soc/renesas/rz-sysc.c b/drivers/soc/renesas/rz-sysc.c index ffa65fb4dade..70556a2f55e6 100644 --- a/drivers/soc/renesas/rz-sysc.c +++ b/drivers/soc/renesas/rz-sysc.c @@ -6,8 +6,10 @@ */ =20 #include +#include #include #include +#include #include =20 #include "rz-sysc.h" @@ -100,14 +102,19 @@ MODULE_DEVICE_TABLE(of, rz_sysc_match); =20 static int rz_sysc_probe(struct platform_device *pdev) { + const struct rz_sysc_init_data *data; const struct of_device_id *match; struct device *dev =3D &pdev->dev; + struct regmap *regmap; struct rz_sysc *sysc; + int ret; =20 match =3D of_match_node(rz_sysc_match, dev->of_node); if (!match) return -ENODEV; =20 + data =3D match->data; + sysc =3D devm_kzalloc(dev, sizeof(*sysc), GFP_KERNEL); if (!sysc) return -ENOMEM; @@ -117,7 +124,15 @@ static int rz_sysc_probe(struct platform_device *pdev) return PTR_ERR(sysc->base); =20 sysc->dev =3D dev; - return rz_sysc_soc_init(sysc, match); + ret =3D rz_sysc_soc_init(sysc, match); + if (ret || !data->regmap_cfg) + return ret; + + regmap =3D devm_regmap_init_mmio(dev, sysc->base, data->regmap_cfg); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + return of_syscon_register_regmap(dev->of_node, regmap); } =20 static struct platform_driver rz_sysc_driver =3D { diff --git a/drivers/soc/renesas/rz-sysc.h b/drivers/soc/renesas/rz-sysc.h index 56bc047a1bff..447008140634 100644 --- a/drivers/soc/renesas/rz-sysc.h +++ b/drivers/soc/renesas/rz-sysc.h @@ -9,6 +9,7 @@ #define __SOC_RENESAS_RZ_SYSC_H__ =20 #include +#include #include #include =20 @@ -34,9 +35,11 @@ struct rz_sysc_soc_id_init_data { /** * struct rz_sysc_init_data - RZ SYSC initialization data * @soc_id_init_data: RZ SYSC SoC ID initialization data + * @regmap_cfg: SoC-specific regmap config */ struct rz_sysc_init_data { const struct rz_sysc_soc_id_init_data *soc_id_init_data; + const struct regmap_config *regmap_cfg; }; =20 extern const struct rz_sysc_init_data rzg3e_sys_init_data; --=20 2.43.0