From nobody Thu Dec 18 14:29:05 2025 Received: from szxga05-in.huawei.com (szxga05-in.huawei.com [45.249.212.191]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 58CA42253BD for ; Fri, 30 May 2025 10:03:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.191 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748599424; cv=none; b=F9F0lzSjKGWoelhbHgPYnT11s3uJlJd20JPSVKidrzhCKedx+YkORlq+UWrNqRV+1MgxbcMTLjp68QIUVDrDIpfRmWtSYDqfCQNtE+Qw+IGbOjuPhueqSGzYsMgRRx5w7XBSvL7YYjzwAVw1H1xad1wmii8Hs/y8iL4V5tr+7l8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748599424; c=relaxed/simple; bh=QJc5X+8onIOf6465HrHQuG8TgHMSgnhXrfkx6XN01zM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=KrRebf6r5AsR/2GQhBj29bb4Or3aaYePapA1gHy7xXVVICiby6/PVwGoj/3rgU/ETpDzWpBHIJ5SSkCJLW5eaDbaKgnxTxjKaTwuB8jZDw8KxvlPIkKylBHJrPbLVZRFR/G6nIRk8C64WPCsS1UnZkAavUwmFItD2fHxaemQlpg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=45.249.212.191 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.19.88.234]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4b7zLh3870z23jVV; Fri, 30 May 2025 18:02:36 +0800 (CST) Received: from dggemv705-chm.china.huawei.com (unknown [10.3.19.32]) by mail.maildlp.com (Postfix) with ESMTPS id E26AB140113; Fri, 30 May 2025 18:03:39 +0800 (CST) Received: from kwepemq100007.china.huawei.com (7.202.195.175) by dggemv705-chm.china.huawei.com (10.3.19.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Fri, 30 May 2025 18:03:39 +0800 Received: from localhost.huawei.com (10.169.71.169) by kwepemq100007.china.huawei.com (7.202.195.175) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Fri, 30 May 2025 18:03:39 +0800 From: Yongbang Shi To: , , , , , , , CC: , , , , , , , , , Subject: [PATCH drm-dp 10/10] drm/hisilicon/hibmc: fix no showing problem with loading hibmc manually Date: Fri, 30 May 2025 17:54:32 +0800 Message-ID: <20250530095432.1206966-11-shiyongbang@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20250530095432.1206966-1-shiyongbang@huawei.com> References: <20250530095432.1206966-1-shiyongbang@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems100002.china.huawei.com (7.221.188.206) To kwepemq100007.china.huawei.com (7.202.195.175) Content-Type: text/plain; charset="utf-8" From: Baihan Li When using command rmmod and insmod, there is no showing in second time insmoding. Because DP controller won't send HPD signals, if connection doesn't change or controller isn't reset. So add reset before unreset in hibmc_dp_hw_init(). Fixes: 94ee73ee3020 ("drm/hisilicon/hibmc: add dp hw moduel in hibmc driver= ") Signed-off-by: Baihan Li --- drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c b/drivers/gpu/drm/h= isilicon/hibmc/dp/dp_hw.c index 4f93d60b932b..e1b9589ce639 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c +++ b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c @@ -172,13 +172,15 @@ int hibmc_dp_hw_init(struct hibmc_dp *dp) dp_dev->link.cap.lanes =3D 0x2; dp_dev->link.cap.link_rate =3D DP_LINK_BW_8_1; =20 - /* hdcp data */ - writel(HIBMC_DP_HDCP, dp_dev->base + HIBMC_DP_HDCP_CFG); /* int init */ writel(0, dp_dev->base + HIBMC_DP_INTR_ENABLE); writel(HIBMC_DP_INT_RST, dp_dev->base + HIBMC_DP_INTR_ORIGINAL_STATUS); /* rst */ + writel(0, dp_dev->base + HIBMC_DP_DPTX_RST_CTRL); + usleep_range(30, 50); writel(HIBMC_DP_DPTX_RST, dp_dev->base + HIBMC_DP_DPTX_RST_CTRL); + /* hdcp data */ + writel(HIBMC_DP_HDCP, dp_dev->base + HIBMC_DP_HDCP_CFG); /* clock enable */ writel(HIBMC_DP_CLK_EN, dp_dev->base + HIBMC_DP_DPTX_CLK_CTRL); =20 --=20 2.33.0