From nobody Tue Dec 16 14:54:09 2025 Received: from mail-ed1-f48.google.com (mail-ed1-f48.google.com [209.85.208.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F284E2DCBE3 for ; Thu, 29 May 2025 08:32:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748507532; cv=none; b=SiQriNdRcUir1GpLcggnGS5O+ymsRkWJ6GbP23ahYJpcoa8nI5RPkGzaEjZ4Gi/DsZzzR6TL+EPyTRazEhcjAMAamU03CShLbGuTb3iTWmjk+3AZQwv5VY1U1P0BD1TFaoZ8Eq7+d2TIxQi4Hm5r7qLCRakBLN5HRl7Gu6n/fP0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748507532; c=relaxed/simple; bh=f084aTER3zHgfTsmBJ1mtbVk1AdH8uHDzcnZ8a680XA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bBTOn7mVNL5G9r7/pc+CsJFlYw3a5wGE3zZBIwiGnanoiYPoIQrd6sUIhayRdLR1FNY9EEpyxInnTJq/k97BUoNzj4gZal2tr5XQYSAZwfQAbE5fp2I/vvgBH7o0Rj3AvGq2Q87/B2pVpcBF8k02IF/oKQSUbjtnVvk1Rp6SKcU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=fpOG+6yl; arc=none smtp.client-ip=209.85.208.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="fpOG+6yl" Received: by mail-ed1-f48.google.com with SMTP id 4fb4d7f45d1cf-604bde84d0fso911086a12.3 for ; Thu, 29 May 2025 01:32:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1748507528; x=1749112328; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sYTRpYaRCYAMKu8brCxqCw4EqlzslbYDhjqGeb1oUdY=; b=fpOG+6yl72psCyyZbTwGM/a+25Z6eMe7sQ0bQZK1lodLrRQ9LVFy9HBEvd5zQJ0Uua HOQbZjkQlBabs6T0BVvVjYK+YSURb/iuR/rBaKRadijgZCO19wv2uPh0jLsahsf01XUg UNY6apHvOzmX8HIaWI2/q1U/+VFYtTud7VnxY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1748507528; x=1749112328; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sYTRpYaRCYAMKu8brCxqCw4EqlzslbYDhjqGeb1oUdY=; b=sjdWD8MfZGZ7O9J7HkgyH6syhnvWfibb4cii6Q2PpHH7agyaJbgWCmDMjwZ3x4QhqK pktYPnad0Tokpf9NT7KJp0BOusYxmhUVDWrZgwPHPIkDYSDgOgvcqd/tzKKpano77D0H t85BdR4OulfCRLYyEwMvQmO/a1WPyOEF+nP5Z97mAJLyjkKbQYCnlLoQkie8weHO2hpw UTIgOqMgrUbt5x4rASswIYBq21elcsud7+SuZvS6pEDJZByH8nPNd2ar0pzK1hVh3IOy p3h0lq+xUC6hpLbjjJYNuGF8qRDlvkcKYtOAa5bsHxw8/purpwelpW/uT7NY2AqE8f49 sq4g== X-Gm-Message-State: AOJu0YwiaJwtY1276XOVZPEreBrwcPLARJkgM3aN+YiI9FCdVUbYbCjH QJUFuDge6hXVWH4x23bsHsDnhZvPvGGRqEhh0FMik6XcUkw1e4Dsz5dt3v+oehGGhRhd1/I1SWb bEt3F X-Gm-Gg: ASbGncs2giHCos2F50cDilZPk12O/i4TuJrE2fCjkpINrFsZ8e0gfK4i1J9KEmxu3jx gp6iADqHry/2/JkxhnVmBSJLFMkOwoy3AuGfV6kWiGPTAZq3GclaRmfxAitu+rkvnh44BKH0QaR iH5dexWtceaX0tQhHGgQw6qBldqppHxIU9Tl/kN8uabqM3uCldfalLoeQaHtS5BZdcEyxMNsIFf 18MqC5t88BEflJsYESgPR4ypN01whTi8lhNrzBaVH8RVNk28v5T/3yEv3lkc54WS4HYaxBYdeX6 hEk7HXfYcPcD/JjPbmX/C/IkdfM2W1+Lik45paPOt/ZLyuHXj5GAEaUKuRFLtpxVN7vcPOyv6oE G3LAoPd9eebl0V6Q+ X-Google-Smtp-Source: AGHT+IHSQOo26dfHDBKRtfz50/poxTpCV6dmeK2Q5MmBatZ2dUHIMTk+BV2pDTU4LahdN6kqQiBNdg== X-Received: by 2002:a17:907:1c93:b0:ad2:4c38:5a22 with SMTP id a640c23a62f3a-adadf2a13ecmr120329666b.51.1748507527995; Thu, 29 May 2025 01:32:07 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.. ([2.196.42.248]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ada5d82e87esm100609866b.63.2025.05.29.01.32.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 May 2025 01:32:07 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, linux-amarula@amarulasolutions.com, Dario Binacchi , Conor Dooley , Conor Dooley , Fabio Estevam , Krzysztof Kozlowski , Lee Jones , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 1/4] dt-bindings: mfd: convert mxs-lradc bindings to json-schema Date: Thu, 29 May 2025 10:31:04 +0200 Message-ID: <20250529083201.2286915-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250529083201.2286915-1-dario.binacchi@amarulasolutions.com> References: <20250529083201.2286915-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert the Freescale MXS Low-Resoulution ADC (LRADC) device tree binding documentation to json-schema. The clocks and #io-channel-cells properties have also been added; They are present in the respective SoC DTSI files but were missing from the old mxs-lradc.txt file. Signed-off-by: Dario Binacchi Reviewed-by: Conor Dooley --- Changes in v3: - Add Reviewed-by tag of Conor Dooley .../devicetree/bindings/mfd/mxs-lradc.txt | 45 -------- .../devicetree/bindings/mfd/mxs-lradc.yaml | 106 ++++++++++++++++++ 2 files changed, 106 insertions(+), 45 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mfd/mxs-lradc.txt create mode 100644 Documentation/devicetree/bindings/mfd/mxs-lradc.yaml diff --git a/Documentation/devicetree/bindings/mfd/mxs-lradc.txt b/Document= ation/devicetree/bindings/mfd/mxs-lradc.txt deleted file mode 100644 index 755cbef0647d..000000000000 --- a/Documentation/devicetree/bindings/mfd/mxs-lradc.txt +++ /dev/null @@ -1,45 +0,0 @@ -* Freescale MXS LRADC device driver - -Required properties: -- compatible: Should be "fsl,imx23-lradc" for i.MX23 SoC and "fsl,imx28-lr= adc" - for i.MX28 SoC -- reg: Address and length of the register set for the device -- interrupts: Should contain the LRADC interrupts - -Optional properties: -- fsl,lradc-touchscreen-wires: Number of wires used to connect the touchsc= reen - to LRADC. Valid value is either 4 or 5. If = this - property is not present, then the touchscre= en is - disabled. 5 wires is valid for i.MX28 SoC o= nly. -- fsl,ave-ctrl: number of samples per direction to calculate an average va= lue. - Allowed value is 1 ... 32, default is 4 -- fsl,ave-delay: delay between consecutive samples. Allowed value is - 2 ... 2048. It is used if 'fsl,ave-ctrl' > 1, counts at - 2 kHz and its default is 2 (=3D 1 ms) -- fsl,settling: delay between plate switch to next sample. Allowed value is - 1 ... 2047. It counts at 2 kHz and its default is - 10 (=3D 5 ms) - -Example for i.MX23 SoC: - - lradc@80050000 { - compatible =3D "fsl,imx23-lradc"; - reg =3D <0x80050000 0x2000>; - interrupts =3D <36 37 38 39 40 41 42 43 44>; - fsl,lradc-touchscreen-wires =3D <4>; - fsl,ave-ctrl =3D <4>; - fsl,ave-delay =3D <2>; - fsl,settling =3D <10>; - }; - -Example for i.MX28 SoC: - - lradc@80050000 { - compatible =3D "fsl,imx28-lradc"; - reg =3D <0x80050000 0x2000>; - interrupts =3D <10 14 15 16 17 18 19 20 21 22 23 24 25>; - fsl,lradc-touchscreen-wires =3D <5>; - fsl,ave-ctrl =3D <4>; - fsl,ave-delay =3D <2>; - fsl,settling =3D <10>; - }; diff --git a/Documentation/devicetree/bindings/mfd/mxs-lradc.yaml b/Documen= tation/devicetree/bindings/mfd/mxs-lradc.yaml new file mode 100644 index 000000000000..90391b02c715 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/mxs-lradc.yaml @@ -0,0 +1,106 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/mxs-lradc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale MXS Low-Resoulution ADC (LRADC) + +maintainers: + - Dario Binacchi + +description: | + The LRADC provides 16 physical channels of 12-bit resolution + for analog-to-digital conversion and includes an integrated + 4-wire/5-wire touchscreen controller. + +properties: + compatible: + items: + - enum: + - fsl,imx23-lradc + - fsl,imx28-lradc + + reg: + maxItems: 1 + + clocks: + minItems: 1 + + interrupts: + minItems: 9 + maxItems: 13 + + fsl,lradc-touchscreen-wires: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Number of wires used to connect the touchscreen to LRADC. + If this property is not present, then the touchscreen is disabled. + + fsl,ave-ctrl: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 32 + default: 4 + description: | + Number of samples per direction to calculate an average value. + + fsl,ave-delay: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 2 + maximum: 2048 + default: 2 + description: | + Delay between consecutive samples. + It is used if 'fsl,ave-ctrl' > 1, counts at 2 kHz and its + default value (i. e. 2) is 1 ms. + + fsl,settling: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 2047 + default: 10 + description: | + Delay between plate switch to next sample. + It counts at 2 kHz and its default (i. e. 10) is 5 ms. + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - interrupts + +if: + properties: + compatible: + contains: + enum: + - fsl,imx23-lradc +then: + properties: + fsl,lradc-touchscreen-wires: + const: 4 +else: + properties: + fsl,lradc-touchscreen-wires: + enum: [4, 5] + +additionalProperties: false + +examples: + - | + lradc@80050000 { + compatible =3D "fsl,imx23-lradc"; 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([2.196.42.248]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ada5d82e87esm100609866b.63.2025.05.29.01.32.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 May 2025 01:32:09 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, linux-amarula@amarulasolutions.com, Dario Binacchi , Conor Dooley , Fabio Estevam , Krzysztof Kozlowski , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 2/4] ARM: dts: imx28: add pwm7 muxing options Date: Thu, 29 May 2025 10:31:05 +0200 Message-ID: <20250529083201.2286915-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250529083201.2286915-1-dario.binacchi@amarulasolutions.com> References: <20250529083201.2286915-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add alternative pinmuxing for pwm7. Signed-off-by: Dario Binacchi --- Changes in v3: - Add commit body arch/arm/boot/dts/nxp/mxs/imx28.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/nxp/mxs/imx28.dtsi b/arch/arm/boot/dts/nxp/m= xs/imx28.dtsi index bbea8b77386f..ece46d0e7c7f 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28.dtsi +++ b/arch/arm/boot/dts/nxp/mxs/imx28.dtsi @@ -755,6 +755,16 @@ MX28_PAD_PWM4__PWM_4 fsl,pull-up =3D ; }; =20 + pwm7_pins_a: pwm7@0 { + reg =3D <0>; + fsl,pinmux-ids =3D < + MX28_PAD_SAIF1_SDATA0__PWM_7 + >; + fsl,drive-strength =3D ; + fsl,voltage =3D ; + fsl,pull-up =3D ; + }; + lcdif_24bit_pins_a: lcdif-24bit@0 { reg =3D <0>; fsl,pinmux-ids =3D < --=20 2.43.0 From nobody Tue Dec 16 14:54:09 2025 Received: from mail-ed1-f41.google.com (mail-ed1-f41.google.com [209.85.208.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE3A821B9C0 for ; Thu, 29 May 2025 08:32:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748507535; cv=none; b=nmU0a1TeGs4N1q+HQfIYI1K0uuAZWbX+zHRxpQAcJQpELhpfUnzReabOnEeqbTu8e7aG/IqS/r8By1zs5UVs3M65E0vmUNHssVU3Cy+QwaHBnYzaxMEsMt+j/xIDS042VxuVhSgAOWMU6930DA0vCXSiJVuGaNZgA5B5wCJrj94= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748507535; c=relaxed/simple; bh=LDEKkYqpa5AneDrp66hCbyfPpeesYFmsJoMyghl0lrI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PUBWR16kVZzjZgaNR+wOgq/HP764cUbHD6pJ+x0kkL4U+o+x4Drp2FaelJy9iB7etVRkClrAzTODYkBn2s2l6pb2ht9xJt/gNTS6kxRvZ91H3db0Ejh6ehkjJDUtCW8pjh/TGr40OChIQSLIzsR8bp7CMoooPnKIcjtYQoISEJA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=qeuM7Gnd; arc=none smtp.client-ip=209.85.208.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="qeuM7Gnd" Received: by mail-ed1-f41.google.com with SMTP id 4fb4d7f45d1cf-60179d8e65fso1194873a12.0 for ; Thu, 29 May 2025 01:32:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1748507532; x=1749112332; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HG9Hnq4/lbRCiQ/1tyJUnBzv8ZwtkPYthtPqyJCp/E0=; b=qeuM7GndWTsBJSXhOSBJsPCu8legUUSN6kC0qxvdErWS5B0l3Rqy/iepPyMuVRh/Dq erhldr0uwMBVOnNT8ojWKJKg3nqZ9eVZfXZ98ux1Kvhp25h7gh08Lww8OJHsZAAJDDyk xpvtJ5KykZPGIgv64IdUV/UQB2SQb38jtVgso= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1748507532; x=1749112332; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HG9Hnq4/lbRCiQ/1tyJUnBzv8ZwtkPYthtPqyJCp/E0=; b=LAVcHGuZzlAk5IWEP/61xa/jekFc5nRXLdUQlQVjYNBStgBjuB7SjMHNU6gx7+Sdky ZT3CkWqIv/taVwLCBQKaGgdLV7g2k1tIKhWRx9wNAF7VctpZUujMOIUMAgDmJrXaLb4u ZRKgJ95tIdKkQzSnIGUH0g3R1bC3NmNW79p7EfW0Kx866tOtYoCnpA8qI8BX8OWG+PVl 8TLm//x/FXoLA1xjJQCzXQvMfxJIgnceL160N/QUgIa55dQZ8cSa/Pff3pXuMNtg+E8D j3iHIPGnMKdF/eb8oPSveutfUd6jzOQMXLsGCWfeh2WuX1icyhfuCeGKkh2e72UKXjF2 2pkQ== X-Gm-Message-State: AOJu0YwjXXvYgdtGv7eM48lJOA0LdChT5n6y46BryHre2uVSnkQ2Ed8J pzZ4vCtpSaQqhtuQI9IUAzg7kiAhEugCNESV6tPgmSweivRUtBNW7br4paOlgHrAHg8rQ0Aaji4 6oOM+ X-Gm-Gg: ASbGncsDaZbypDc0dEuCCRf3rz/wSoN8rSsRc0130GkQ5Ly2aL+h1rbAo1+seGocEIg EgmZ+IcEhWYi7zUjj4jznBwUszCvOxwiJ0+ODebVrqXHg5eOpWbV0WVo0/hOzwIHX5jYPBP2f99 b6XnPLO2+gi78OjRUwb9GOBi+L28bJl3pkiLoVgUx5VGKLA/zL/m5qoWFhgR3YklM/0skSJUOFL X+01dYiXyMTYwY7jayWAWOVx1tIK5IT84GG3ofUEl5Aj8sYUHPqEbiABJSVZk9mjwiGREdegbIL 2HlIjulkqkhrsS5iwmqk5BGj1gZnO8dw9pUHjkx7faeS7rfCgZ3k4ndUcnITqeuH7okP5sbOAtW MXT19EbDJFXlwL8EC X-Google-Smtp-Source: AGHT+IGvLE/l5D9FUKvVaCi8L4G9UQppbArsw9w4HQPwuydhjXYkiko0VBVf2nFpsBEH1EUE6Gq+jg== X-Received: by 2002:a17:907:3fa4:b0:ad8:89c7:2735 with SMTP id a640c23a62f3a-adadf2a1317mr125814966b.58.1748507531717; Thu, 29 May 2025 01:32:11 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.. ([2.196.42.248]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ada5d82e87esm100609866b.63.2025.05.29.01.32.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 May 2025 01:32:11 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, linux-amarula@amarulasolutions.com, Dario Binacchi , Conor Dooley , Alexander Stein , Andreas Kemnade , Conor Dooley , Fabio Estevam , Francesco Dolcini , Frieder Schrempf , Heiko Schocher , =?UTF-8?q?Jo=C3=A3o=20Paulo=20Gon=C3=A7alves?= , Krzysztof Kozlowski , Marek Vasut , Max Merchel , Michael Walle , Peng Fan , Rob Herring , Shawn Guo , Tim Harvey , devicetree@vger.kernel.org Subject: [PATCH v3 3/4] dt-bindings: arm: fsl: add i.MX28 Amarula rmm board Date: Thu, 29 May 2025 10:31:06 +0200 Message-ID: <20250529083201.2286915-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250529083201.2286915-1-dario.binacchi@amarulasolutions.com> References: <20250529083201.2286915-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The board includes the following resources: - 256 Mbytes NAND Flash - 128 Mbytes DRAM DDR2 - CAN - USB 2.0 high-speed/full-speed - Ethernet MAC Signed-off-by: Dario Binacchi Acked-by: Conor Dooley --- Changes in v3: - Add Acked-by tag of Conor Dooley Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation= /devicetree/bindings/arm/fsl.yaml index 1b90870958a2..b67f0e71e4c8 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -89,6 +89,7 @@ properties: - description: i.MX28 based Boards items: - enum: + - amarula,imx28-rmm - armadeus,imx28-apf28 # APF28 SoM - bluegiga,apx4devkit # Bluegiga APx4 SoM on dev board - crystalfontz,cfa10036 # Crystalfontz CFA-10036 SoM --=20 2.43.0 From nobody Tue Dec 16 14:54:09 2025 Received: from mail-ed1-f54.google.com (mail-ed1-f54.google.com [209.85.208.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 761D721C176 for ; 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([2.196.42.248]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ada5d82e87esm100609866b.63.2025.05.29.01.32.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 May 2025 01:32:13 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, linux-amarula@amarulasolutions.com, Dario Binacchi , Conor Dooley , Fabio Estevam , Krzysztof Kozlowski , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 4/4] ARM: dts: mxs: support i.MX28 Amarula rmm board Date: Thu, 29 May 2025 10:31:07 +0200 Message-ID: <20250529083201.2286915-5-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250529083201.2286915-1-dario.binacchi@amarulasolutions.com> References: <20250529083201.2286915-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The board includes the following resources: - 256 Mbytes NAND Flash - 128 Mbytes DRAM DDR2 - CAN - USB 2.0 high-speed/full-speed - Ethernet MAC Signed-off-by: Dario Binacchi --- Changes in v3: - In imx28-amarula-rmm.dts: - Drop xceiver-supply property from can0 node. - Rearrange the order of specific nodes and properties alphabetically. Changes in v2: - In imx28-amarula-rmm.dts: - Replace '-' with '@' for the pinctrl sub-nodes. - Replace edt,edt-ft5x06 with edt,edt-ft5306. - Drop LCD reset hog pin. - Add correct #address-cells and #size-cells to gpmi node. - Replace edt-ft5x06@38 with touchscreen@38. - Drop from commit messages all references to LCD display. - Add patch [1/4] "dt-bindings: mfd: convert mxs-lradc bindings to json-schema". arch/arm/boot/dts/nxp/mxs/Makefile | 1 + .../boot/dts/nxp/mxs/imx28-amarula-rmm.dts | 303 ++++++++++++++++++ 2 files changed, 304 insertions(+) create mode 100644 arch/arm/boot/dts/nxp/mxs/imx28-amarula-rmm.dts diff --git a/arch/arm/boot/dts/nxp/mxs/Makefile b/arch/arm/boot/dts/nxp/mxs= /Makefile index 96dd31ea19ba..d72ba702b6fa 100644 --- a/arch/arm/boot/dts/nxp/mxs/Makefile +++ b/arch/arm/boot/dts/nxp/mxs/Makefile @@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_MXS) +=3D \ imx23-sansa.dtb \ imx23-stmp378x_devb.dtb \ imx23-xfi3.dtb \ + imx28-amarula-rmm.dtb \ imx28-apf28.dtb \ imx28-apf28dev.dtb \ imx28-apx4devkit.dtb \ diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-amarula-rmm.dts b/arch/arm/boo= t/dts/nxp/mxs/imx28-amarula-rmm.dts new file mode 100644 index 000000000000..5824eb9e9557 --- /dev/null +++ b/arch/arm/boot/dts/nxp/mxs/imx28-amarula-rmm.dts @@ -0,0 +1,303 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2025 Amarula Solutions, Dario Binacchi + */ + +/dts-v1/; + +#include "imx28.dtsi" +#include +#include + +/ { + compatible =3D "amarula,imx28-rmm", "fsl,imx28"; + model =3D "Amarula i.MX28 rmm"; + + memory@40000000 { + reg =3D <0x40000000 0x08000000>; + device_type =3D "memory"; + }; + + backlight { + compatible =3D "pwm-backlight"; + pwms =3D <&pwm 4 5000000 0>; + brightness-levels =3D <0 255>; + num-interpolated-steps =3D <255>; + default-brightness-level =3D <255>; + power-supply =3D <®_5v>; + }; + + beeper { + compatible =3D "pwm-beeper"; + pwms =3D <&pwm 7 100000 0>; + }; + + leds { + compatible =3D "gpio-leds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&leds_pins>; + + led-0 { + label =3D "status"; + gpios =3D <&gpio2 7 GPIO_ACTIVE_HIGH>; + default-state =3D "off"; + }; + + led-1 { + label =3D "x22_5"; + gpios =3D <&gpio3 16 GPIO_ACTIVE_HIGH>; + default-state =3D "off"; + }; + + led-2 { + label =3D "x22_4"; + gpios =3D <&gpio3 17 GPIO_ACTIVE_HIGH>; + default-state =3D "off"; + }; + }; + + reg_1v8: regulator-1v8 { + compatible =3D "regulator-fixed"; + regulator-name =3D "1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; + + reg_3v3: regulator-3v3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + }; + + reg_5v: regulator-5v { + compatible =3D "regulator-fixed"; + regulator-name =3D "5v"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-always-on; + }; + + reg_fec_3v3: regulator-fec-3v3 { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&fec_3v3_enable_pin>; + regulator-name =3D "fec-3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + gpios =3D <&gpio3 27 GPIO_ACTIVE_HIGH>; + enable-active-high; + startup-delay-us =3D <300000>; + vin-supply =3D <®_5v>; + }; + + reg_usb0_vbus: regulator-usb0-vbus { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb0_vbus_enable_pin>; + regulator-name =3D "usb0_vbus"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + gpio =3D <&gpio2 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + reg_usb1_vbus: regulator-usb1-vbus { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb1_vbus_enable_pin>; + regulator-name =3D "usb1_vbus"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + gpio =3D <&gpio2 6 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; +}; + +&auart0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&auart0_2pins_a>; + status =3D "okay"; +}; + +&auart1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&auart1_pins_a>; + status =3D "okay"; +}; + +&can0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&can0_pins_a>; + status =3D "okay"; +}; + +&duart { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&duart_pins_b>; + status =3D "okay"; +}; + +&duart_pins_b { + fsl,voltage =3D ; +}; + +&gpmi { + #address-cells =3D <1>; + #size-cells =3D <0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gpmi_pins_a &gpmi_status_cfg>; + status =3D "okay"; +}; + +&i2c0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c0_pins_a>; + status =3D "okay"; + + touchscreen: touchscreen@38 { + compatible =3D "edt,edt-ft5306"; + reg =3D <0x38>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&edt_ft5x06_pins &edt_ft5x06_wake_pin>; + interrupt-parent =3D <&gpio0>; + interrupts =3D <19 IRQ_TYPE_EDGE_RISING>; + reset-gpios =3D <&gpio0 21 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&gpio0 18 GPIO_ACTIVE_HIGH>; + }; +}; + +&lradc { + status =3D "okay"; +}; + +&mac0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mac0_pins_a>; + phy-mode =3D "rmii"; + phy-supply =3D <®_fec_3v3>; + phy-handle =3D <ðphy>; + status =3D "okay"; + + mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + + ethphy: ethernet-phy@0 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0>; + max-speed =3D <100>; + reset-gpios =3D <&gpio3 28 GPIO_ACTIVE_LOW>; + reset-assert-us =3D <4000>; + reset-deassert-us =3D <4000>; + }; + }; +}; + +&pinctrl { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hog_pins_a>; + + edt_ft5x06_pins: edt-ft5x06@0 { + reg =3D <0>; + fsl,pinmux-ids =3D < + MX28_PAD_GPMI_RDY1__GPIO_0_21 /* Reset */ + MX28_PAD_GPMI_CE3N__GPIO_0_19 /* Interrupt */ + >; + fsl,drive-strength =3D ; + fsl,pull-up =3D ; + fsl,voltage =3D ; + }; + + edt_ft5x06_wake_pin: edt-ft5x06-wake@0 { + reg =3D <0>; + fsl,pinmux-ids =3D ; + fsl,drive-strength =3D ; + fsl,pull-up =3D ; + fsl,voltage =3D ; + }; + + fec_3v3_enable_pin: fec-3v3-enable@0 { + reg =3D <0>; + fsl,pinmux-ids =3D ; + fsl,drive-strength =3D ; + fsl,pull-up =3D ; + fsl,voltage =3D ; + }; + + hog_pins_a: hog@0 { + reg =3D <0>; + fsl,pinmux-ids =3D < + MX28_PAD_SSP2_SS1__GPIO_2_20 /* External power */ + >; + fsl,drive-strength =3D ; + fsl,pull-up =3D ; + fsl,voltage =3D ; + }; + + leds_pins: leds@0 { + reg =3D <0>; + fsl,pinmux-ids =3D < + MX28_PAD_SSP0_DATA7__GPIO_2_7 + MX28_PAD_PWM0__GPIO_3_16 + MX28_PAD_PWM1__GPIO_3_17 + >; + fsl,drive-strength =3D ; + fsl,pull-up =3D ; + fsl,voltage =3D ; + }; + + usb0_vbus_enable_pin: usb0-vbus-enable@0 { + reg =3D <0>; + fsl,pinmux-ids =3D ; + fsl,drive-strength =3D ; + fsl,pull-up =3D ; + fsl,voltage =3D ; + }; + + usb1_vbus_enable_pin: usb1-vbus-enable@0 { + reg =3D <0>; + fsl,pinmux-ids =3D ; + fsl,drive-strength =3D ; + fsl,pull-up =3D ; + fsl,voltage =3D ; + }; +}; + +&pwm { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm4_pins_a &pwm7_pins_a>; + status =3D "okay"; +}; + +&ssp0 { + compatible =3D "fsl,imx28-mmc"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mmc0_4bit_pins_a &mmc0_sck_cfg>; + broken-cd; + bus-width =3D <4>; + status =3D "okay"; +}; + +&usb0 { + dr_mode =3D "host"; + vbus-supply =3D <®_usb0_vbus>; + status =3D "okay"; +}; + +&usb1 { + dr_mode =3D "host"; + vbus-supply =3D <®_usb1_vbus>; + status =3D "okay"; +}; + +&usbphy0 { + status =3D "okay"; +}; + +&usbphy1 { + status =3D "okay"; +}; --=20 2.43.0