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Wed, 28 May 2025 20:43:20 -0700 (PDT) From: Nylon Chen To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Samuel Holland , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org, Nylon Chen , kernel test robot , Zong Li Subject: [PATCH v15 3/3] pwm: sifive: fix rounding and idempotency issues in apply and get_state Date: Thu, 29 May 2025 11:53:41 +0800 Message-Id: <20250529035341.51736-4-nylon.chen@sifive.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250529035341.51736-1-nylon.chen@sifive.com> References: <20250529035341.51736-1-nylon.chen@sifive.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This fix ensures consistent rounding and avoids mismatches between applied and reported PWM values that could trigger false idempotency failures in debug checks This change ensures: - real_period is now calculated using DIV_ROUND_UP_ULL() to avoid underesti= mation. - duty_cycle is rounded up to match the fractional computation in apply() - apply() truncates the result to compensate for get_state's rounding up lo= gic These fixes resolve issues like: .apply is supposed to round down duty_cycle (requested: 360/504000, applied= : 361/504124) .apply is not idempotent (ena=3D1 pol=3D0 1739692/4032985) -> (ena=3D1 pol= =3D0 1739630/4032985) Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202505080303.dBfU5YMS-lkp@int= el.com/ Co-developed-by: Zong Li Signed-off-by: Zong Li Signed-off-by: Nylon Chen --- drivers/pwm/pwm-sifive.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c index f3694801d3ee..4a07315b0744 100644 --- a/drivers/pwm/pwm-sifive.c +++ b/drivers/pwm/pwm-sifive.c @@ -118,7 +118,7 @@ static void pwm_sifive_update_clock(struct pwm_sifive_d= data *ddata, =20 /* As scale <=3D 15 the shift operation cannot overflow. */ num =3D (unsigned long long)NSEC_PER_SEC << (PWM_SIFIVE_CMPWIDTH + scale); - ddata->real_period =3D div64_ul(num, rate); + ddata->real_period =3D DIV_ROUND_UP_ULL(num, rate); dev_dbg(ddata->parent, "New real_period =3D %u ns\n", ddata->real_period); } @@ -143,8 +143,8 @@ static int pwm_sifive_get_state(struct pwm_chip *chip, = struct pwm_device *pwm, state->enabled =3D false; =20 state->period =3D ddata->real_period; - state->duty_cycle =3D - (u64)duty * ddata->real_period >> PWM_SIFIVE_CMPWIDTH; + state->duty_cycle =3D DIV_ROUND_UP_ULL((u64)duty * ddata->real_period, + (1U << PWM_SIFIVE_CMPWIDTH)); state->polarity =3D PWM_POLARITY_NORMAL; =20 return 0; @@ -159,7 +159,8 @@ static int pwm_sifive_apply(struct pwm_chip *chip, stru= ct pwm_device *pwm, unsigned long long num; bool enabled; int ret =3D 0; - u32 frac, inactive; + u64 frac; + u32 inactive; =20 if (state->polarity !=3D PWM_POLARITY_NORMAL) return -EINVAL; @@ -178,9 +179,11 @@ static int pwm_sifive_apply(struct pwm_chip *chip, str= uct pwm_device *pwm, * consecutively */ num =3D (u64)duty_cycle * (1U << PWM_SIFIVE_CMPWIDTH); - frac =3D DIV64_U64_ROUND_CLOSEST(num, state->period); + frac =3D num; + do_div(frac, state->period); /* The hardware cannot generate a 0% duty cycle */ - frac =3D min(frac, (1U << PWM_SIFIVE_CMPWIDTH) - 1); + frac =3D min(frac, (u64)(1U << PWM_SIFIVE_CMPWIDTH) - 1); + /* pwmcmp register must be loaded with the inactive(invert the duty) */ inactive =3D (1U << PWM_SIFIVE_CMPWIDTH) - 1 - frac; =20 mutex_lock(&ddata->lock); --=20 2.34.1