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Wed, 28 May 2025 20:43:14 -0700 (PDT) From: Nylon Chen To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Samuel Holland , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org, Nylon Chen , Zong Li , Vincent Chen Subject: [PATCH v15 2/3] pwm: sifive: fix PWM algorithm and clarify inverted compare behavior Date: Thu, 29 May 2025 11:53:40 +0800 Message-Id: <20250529035341.51736-3-nylon.chen@sifive.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250529035341.51736-1-nylon.chen@sifive.com> References: <20250529035341.51736-1-nylon.chen@sifive.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The `frac` variable represents the pulse inactive time, and the result of this algorithm is the pulse active time. Therefore, we must reverse the result. Although the SiFive Reference Manual states "pwms >=3D pwmcmpX -> HIGH", the hardware behavior is inverted due to a fixed XNOR with 0. As a result, the pwmcmp register actually defines the low (inactive) portion of the puls= e. The reference is SiFive FU740-C000 Manual[0] Link: https://sifive.cdn.prismic.io/sifive/1a82e600-1f93-4f41-b2d8-86ed8b16= acba_fu740-c000-manual-v1p6.pdf [0] Co-developed-by: Zong Li Signed-off-by: Zong Li Co-developed-by: Vincent Chen Signed-off-by: Vincent Chen Signed-off-by: Nylon Chen --- drivers/pwm/pwm-sifive.c | 39 +++++++++++++++++++++++++++++++-------- 1 file changed, 31 insertions(+), 8 deletions(-) diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c index d5b647e6be78..f3694801d3ee 100644 --- a/drivers/pwm/pwm-sifive.c +++ b/drivers/pwm/pwm-sifive.c @@ -4,11 +4,28 @@ * For SiFive's PWM IP block documentation please refer Chapter 14 of * Reference Manual : https://static.dev.sifive.com/FU540-C000-v1.0.pdf * + * PWM output inversion: According to the SiFive Reference manual + * the output of each comparator is high whenever the value of pwms is + * greater than or equal to the corresponding pwmcmpX[Reference Manual]. + * + * Figure 29 in the same manual shows that the pwmcmpXcenter bit is + * hard-tied to 0 (XNOR), which effectively inverts the comparison so that + * the output goes HIGH when `pwms < pwmcmpX`. + * + * In other words, each pwmcmp register actually defines the **inactive** + * (low) period of the pulse, not the active time exactly opposite to what + * the documentation text implies. + * + * To compensate, this driver always **inverts** the duty value when readi= ng + * or writing pwmcmp registers , so that users interact with a conventional + * **active-high** PWM interface. + * + * * Limitations: * - When changing both duty cycle and period, we cannot prevent in * software that the output might produce a period with mixed * settings (new period length and old duty cycle). - * - The hardware cannot generate a 100% duty cycle. + * - The hardware cannot generate a 0% duty cycle. * - The hardware generates only inverted output. */ #include @@ -110,9 +127,14 @@ static int pwm_sifive_get_state(struct pwm_chip *chip,= struct pwm_device *pwm, struct pwm_state *state) { struct pwm_sifive_ddata *ddata =3D pwm_sifive_chip_to_ddata(chip); - u32 duty, val; + u32 duty, val, inactive; =20 - duty =3D readl(ddata->regs + PWM_SIFIVE_PWMCMP(pwm->hwpwm)); + inactive =3D readl(ddata->regs + PWM_SIFIVE_PWMCMP(pwm->hwpwm)); + /* + * PWM hardware uses 'inactive' counts in pwmcmp, so invert to get actual= duty. + * Here, 'inactive' is the low time and we compute duty as max_count - in= active. + */ + duty =3D (1U << PWM_SIFIVE_CMPWIDTH) - 1 - inactive; =20 state->enabled =3D duty > 0; =20 @@ -123,7 +145,7 @@ static int pwm_sifive_get_state(struct pwm_chip *chip, = struct pwm_device *pwm, state->period =3D ddata->real_period; state->duty_cycle =3D (u64)duty * ddata->real_period >> PWM_SIFIVE_CMPWIDTH; - state->polarity =3D PWM_POLARITY_INVERSED; + state->polarity =3D PWM_POLARITY_NORMAL; =20 return 0; } @@ -137,9 +159,9 @@ static int pwm_sifive_apply(struct pwm_chip *chip, stru= ct pwm_device *pwm, unsigned long long num; bool enabled; int ret =3D 0; - u32 frac; + u32 frac, inactive; =20 - if (state->polarity !=3D PWM_POLARITY_INVERSED) + if (state->polarity !=3D PWM_POLARITY_NORMAL) return -EINVAL; =20 cur_state =3D pwm->state; @@ -157,8 +179,9 @@ static int pwm_sifive_apply(struct pwm_chip *chip, stru= ct pwm_device *pwm, */ num =3D (u64)duty_cycle * (1U << PWM_SIFIVE_CMPWIDTH); frac =3D DIV64_U64_ROUND_CLOSEST(num, state->period); - /* The hardware cannot generate a 100% duty cycle */ + /* The hardware cannot generate a 0% duty cycle */ frac =3D min(frac, (1U << PWM_SIFIVE_CMPWIDTH) - 1); + inactive =3D (1U << PWM_SIFIVE_CMPWIDTH) - 1 - frac; =20 mutex_lock(&ddata->lock); if (state->period !=3D ddata->approx_period) { @@ -190,7 +213,7 @@ static int pwm_sifive_apply(struct pwm_chip *chip, stru= ct pwm_device *pwm, } } =20 - writel(frac, ddata->regs + PWM_SIFIVE_PWMCMP(pwm->hwpwm)); + writel(inactive, ddata->regs + PWM_SIFIVE_PWMCMP(pwm->hwpwm)); =20 if (!state->enabled) clk_disable(ddata->clk); --=20 2.34.1