From nobody Tue Dec 16 14:39:03 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 599A21A83F9; Thu, 29 May 2025 01:11:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748481075; cv=none; b=MOprRv8enj3OlmMepPJfixHwu1AEfvlXgDagEhefRyvXIlQoxMgdhh9eLbROJUiiRMQOMowmCeED2Z6oi1skJ6I0LxYn/bti5saGzfCSYsvU22Jxggz/of18oB57beJbo3aoJ1OrgHrMW8WhpZaiHMnf2yxHLXnMi64oW17gKfs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748481075; c=relaxed/simple; bh=JYTWJ4bzufmG4/W3c+dyWMhzf9Zd60/BveoZVPfRXoo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=j7BNR9MoBD//b3LQJ5lbFsiKWTSZ4k9KRuX5fb2P/yEmMXMx1dSP6EXz2aoUq5pqLyghONDqC+cULTojaxcJx9SGVVAFGoVYMAwrpyvUzcxRrpgwMxvcXmuLddlkq2tfv8NM2MwndYY6g288lzJ/vO2cGHxqrL+2To5cSboLmIM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxOGottDdomx4BAQ--.23322S3; Thu, 29 May 2025 09:11:09 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCx_cYmtDdoR0P5AA--.57458S3; Thu, 29 May 2025 09:11:08 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH 1/5] LoongArch: KVM: Fix interrupt route update with eiointc Date: Thu, 29 May 2025 09:10:58 +0800 Message-Id: <20250529011102.378749-2-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250529011102.378749-1-maobibo@loongson.cn> References: <20250529011102.378749-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCx_cYmtDdoR0P5AA--.57458S3 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" With function eiointc_update_sw_coremap(), there is forced assignment like val =3D *(u64 *)pvalue. Parameter pvalue may be pointer to char type or others, there is problem with forced assignment with u64 type. Here the detailed value is passed rather address pointer. Cc: stable@vger.kernel.org Fixes: 3956a52bc05b ("LoongArch: KVM: Add EIOINTC read and write functions") Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index f39929d7bf8a..d2c521b0e923 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -66,10 +66,9 @@ static void eiointc_update_irq(struct loongarch_eiointc = *s, int irq, int level) } =20 static inline void eiointc_update_sw_coremap(struct loongarch_eiointc *s, - int irq, void *pvalue, u32 len, bool notify) + int irq, u64 val, u32 len, bool notify) { int i, cpu; - u64 val =3D *(u64 *)pvalue; =20 for (i =3D 0; i < len; i++) { cpu =3D val & 0xff; @@ -398,7 +397,7 @@ static int loongarch_eiointc_writeb(struct kvm_vcpu *vc= pu, irq =3D offset - EIOINTC_COREMAP_START; index =3D irq; s->coremap.reg_u8[index] =3D data; - eiointc_update_sw_coremap(s, irq, (void *)&data, sizeof(data), true); + eiointc_update_sw_coremap(s, irq, data, sizeof(data), true); break; default: ret =3D -EINVAL; @@ -484,7 +483,7 @@ static int loongarch_eiointc_writew(struct kvm_vcpu *vc= pu, irq =3D offset - EIOINTC_COREMAP_START; index =3D irq >> 1; s->coremap.reg_u16[index] =3D data; - eiointc_update_sw_coremap(s, irq, (void *)&data, sizeof(data), true); + eiointc_update_sw_coremap(s, irq, data, sizeof(data), true); break; default: ret =3D -EINVAL; @@ -570,7 +569,7 @@ static int loongarch_eiointc_writel(struct kvm_vcpu *vc= pu, irq =3D offset - EIOINTC_COREMAP_START; index =3D irq >> 2; s->coremap.reg_u32[index] =3D data; - eiointc_update_sw_coremap(s, irq, (void *)&data, sizeof(data), true); + eiointc_update_sw_coremap(s, irq, data, sizeof(data), true); break; default: ret =3D -EINVAL; @@ -656,7 +655,7 @@ static int loongarch_eiointc_writeq(struct kvm_vcpu *vc= pu, irq =3D offset - EIOINTC_COREMAP_START; index =3D irq >> 3; s->coremap.reg_u64[index] =3D data; - eiointc_update_sw_coremap(s, irq, (void *)&data, sizeof(data), true); + eiointc_update_sw_coremap(s, irq, data, sizeof(data), true); break; default: ret =3D -EINVAL; @@ -809,7 +808,7 @@ static int kvm_eiointc_ctrl_access(struct kvm_device *d= ev, for (i =3D 0; i < (EIOINTC_IRQS / 4); i++) { start_irq =3D i * 4; eiointc_update_sw_coremap(s, start_irq, - (void *)&s->coremap.reg_u32[i], sizeof(u32), false); + s->coremap.reg_u32[i], sizeof(u32), false); } break; default: --=20 2.39.3 From nobody Tue Dec 16 14:39:03 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1495918DB29; Thu, 29 May 2025 01:11:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748481077; cv=none; b=B6ZiOiLy8qdBAf+742bks1gQDQpfrxzZV41/hf1kpC5NDQZ5nK4GnDw2YyEGJGqKUJsaVdcnBdhSsqB78etQTxsVJjdFs85m15sXCBdPGsmrGKR9fMCTgK62nSD2f50HVl3aml0NSQzg+zrrFJRTZSQ1kPOGo/tlbxj81OnXv1E= ARC-Message-Signature: i=1; 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Thu, 29 May 2025 09:11:11 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH 2/5] LoongArch: KVM: Check interrupt route from physical cpu with eiointc Date: Thu, 29 May 2025 09:10:59 +0800 Message-Id: <20250529011102.378749-3-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250529011102.378749-1-maobibo@loongson.cn> References: <20250529011102.378749-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCx_cYmtDdoR0P5AA--.57458S4 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" With eiointc interrupt controller, physical cpu id is set for irq route. However function kvm_get_vcpu() is used to get destination vCPU when delivering irq. With API kvm_get_vcpu(), logical cpu is used. With API kvm_get_vcpu_by_cpuid(), vCPU can be searched from physical cpu id. Cc: stable@vger.kernel.org Fixes: 3956a52bc05b ("LoongArch: KVM: Add EIOINTC read and write functions") Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index d2c521b0e923..0b648c56b0c3 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -9,7 +9,8 @@ =20 static void eiointc_set_sw_coreisr(struct loongarch_eiointc *s) { - int ipnum, cpu, irq_index, irq_mask, irq; + int ipnum, cpu, irq_index, irq_mask, irq, cpuid; + struct kvm_vcpu *vcpu; =20 for (irq =3D 0; irq < EIOINTC_IRQS; irq++) { ipnum =3D s->ipmap.reg_u8[irq / 32]; @@ -20,7 +21,12 @@ static void eiointc_set_sw_coreisr(struct loongarch_eioi= ntc *s) irq_index =3D irq / 32; irq_mask =3D BIT(irq & 0x1f); =20 - cpu =3D s->coremap.reg_u8[irq]; + cpuid =3D s->coremap.reg_u8[irq]; + vcpu =3D kvm_get_vcpu_by_cpuid(s->kvm, cpuid); + if (vcpu =3D=3D NULL) + continue; + + cpu =3D vcpu->vcpu_id; if (!!(s->coreisr.reg_u32[cpu][irq_index] & irq_mask)) set_bit(irq, s->sw_coreisr[cpu][ipnum]); else @@ -68,17 +74,23 @@ static void eiointc_update_irq(struct loongarch_eiointc= *s, int irq, int level) static inline void eiointc_update_sw_coremap(struct loongarch_eiointc *s, int irq, u64 val, u32 len, bool notify) { - int i, cpu; + int i, cpu, cpuid; + struct kvm_vcpu *vcpu; =20 for (i =3D 0; i < len; i++) { - cpu =3D val & 0xff; + cpuid =3D val & 0xff; val =3D val >> 8; =20 if (!(s->status & BIT(EIOINTC_ENABLE_CPU_ENCODE))) { - cpu =3D ffs(cpu) - 1; - cpu =3D (cpu >=3D 4) ? 0 : cpu; + cpuid =3D ffs(cpuid) - 1; + cpuid =3D (cpuid >=3D 4) ? 0 : cpuid; } =20 + vcpu =3D kvm_get_vcpu_by_cpuid(s->kvm, cpuid); + if (vcpu =3D=3D NULL) + continue; + + cpu =3D vcpu->vcpu_id; if (s->sw_coremap[irq + i] =3D=3D cpu) continue; =20 --=20 2.39.3 From nobody Tue Dec 16 14:39:03 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 718571D61AA; Thu, 29 May 2025 01:11:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748481077; cv=none; b=HU03JTpCfUKVHpCwIq2ljqSXS00kTK+Q8kfnU9FJ1cTe0U59vDe9QwXzshnFZhmqHz/XQ+pyPVSljf/tQ98ZtCh8gf+IWeVETs8+3OXRNpu5sefR/dZAkLdoeOJx92mUiwknMnPd8pmH6sLJ7FTwEp9uZ616IXEnP80VZk0MtP0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748481077; c=relaxed/simple; bh=hrnGReoCX4OFCk2gE+9Qx1LGtsJg+c/g8AN4jQ9n+v8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Rw5WzsmxfHtpBMLL1hLGoEWwqtwYzGctTAar0Is+t+zRfbPoYPFAl8LgvHxCib3CQmwhCIaNViZU5jPnAMBOVtByjLZcMDCOqCFSbUN0qkRXeVJQFTlatAqVya+SM5HGkVf9Pt+BJ/LODA6rAPgXaIugGncbGCKKNciCCkf1OPA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8AxQK0xtDdouB4BAQ--.3547S3; Thu, 29 May 2025 09:11:13 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCx_cYmtDdoR0P5AA--.57458S5; Thu, 29 May 2025 09:11:12 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 3/5] LoongArch: KVM: Use standard bitops API with eiointc Date: Thu, 29 May 2025 09:11:00 +0800 Message-Id: <20250529011102.378749-4-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250529011102.378749-1-maobibo@loongson.cn> References: <20250529011102.378749-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCx_cYmtDdoR0P5AA--.57458S5 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Standard bitops APIs such test_bit() is used here, rather than manually calculate the offset and mask. Also use non-atomic API __set_bit() and __clear_bit() rather than set_bit() and clear_bit(), since global spinlock is held already. Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 27 +++++++++++---------------- 1 file changed, 11 insertions(+), 16 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index 0b648c56b0c3..b3aa6e305a18 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -9,7 +9,7 @@ =20 static void eiointc_set_sw_coreisr(struct loongarch_eiointc *s) { - int ipnum, cpu, irq_index, irq_mask, irq, cpuid; + int ipnum, cpu, irq, cpuid; struct kvm_vcpu *vcpu; =20 for (irq =3D 0; irq < EIOINTC_IRQS; irq++) { @@ -18,8 +18,6 @@ static void eiointc_set_sw_coreisr(struct loongarch_eioin= tc *s) ipnum =3D count_trailing_zeros(ipnum); ipnum =3D (ipnum >=3D 0 && ipnum < 4) ? ipnum : 0; } - irq_index =3D irq / 32; - irq_mask =3D BIT(irq & 0x1f); =20 cpuid =3D s->coremap.reg_u8[irq]; vcpu =3D kvm_get_vcpu_by_cpuid(s->kvm, cpuid); @@ -27,16 +25,16 @@ static void eiointc_set_sw_coreisr(struct loongarch_eio= intc *s) continue; =20 cpu =3D vcpu->vcpu_id; - if (!!(s->coreisr.reg_u32[cpu][irq_index] & irq_mask)) - set_bit(irq, s->sw_coreisr[cpu][ipnum]); + if (test_bit(irq, (unsigned long *)s->coreisr.reg_u32[cpu])) + __set_bit(irq, s->sw_coreisr[cpu][ipnum]); else - clear_bit(irq, s->sw_coreisr[cpu][ipnum]); + __clear_bit(irq, s->sw_coreisr[cpu][ipnum]); } } =20 static void eiointc_update_irq(struct loongarch_eiointc *s, int irq, int l= evel) { - int ipnum, cpu, found, irq_index, irq_mask; + int ipnum, cpu, found; struct kvm_vcpu *vcpu; struct kvm_interrupt vcpu_irq; =20 @@ -48,19 +46,16 @@ static void eiointc_update_irq(struct loongarch_eiointc= *s, int irq, int level) =20 cpu =3D s->sw_coremap[irq]; vcpu =3D kvm_get_vcpu(s->kvm, cpu); - irq_index =3D irq / 32; - irq_mask =3D BIT(irq & 0x1f); - if (level) { /* if not enable return false */ - if (((s->enable.reg_u32[irq_index]) & irq_mask) =3D=3D 0) + if (!test_bit(irq, (unsigned long *)s->enable.reg_u32)) return; - s->coreisr.reg_u32[cpu][irq_index] |=3D irq_mask; + __set_bit(irq, (unsigned long *)s->coreisr.reg_u32[cpu]); found =3D find_first_bit(s->sw_coreisr[cpu][ipnum], EIOINTC_IRQS); - set_bit(irq, s->sw_coreisr[cpu][ipnum]); + __set_bit(irq, s->sw_coreisr[cpu][ipnum]); } else { - s->coreisr.reg_u32[cpu][irq_index] &=3D ~irq_mask; - clear_bit(irq, s->sw_coreisr[cpu][ipnum]); + __clear_bit(irq, (unsigned long *)s->coreisr.reg_u32[cpu]); + __clear_bit(irq, s->sw_coreisr[cpu][ipnum]); found =3D find_first_bit(s->sw_coreisr[cpu][ipnum], EIOINTC_IRQS); } =20 @@ -110,8 +105,8 @@ void eiointc_set_irq(struct loongarch_eiointc *s, int i= rq, int level) unsigned long flags; unsigned long *isr =3D (unsigned long *)s->isr.reg_u8; =20 - level ? set_bit(irq, isr) : clear_bit(irq, isr); spin_lock_irqsave(&s->lock, flags); + level ? __set_bit(irq, isr) : __clear_bit(irq, isr); eiointc_update_irq(s, irq, level); spin_unlock_irqrestore(&s->lock, flags); } --=20 2.39.3 From nobody Tue Dec 16 14:39:03 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 701321D6194; Thu, 29 May 2025 01:11:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748481078; cv=none; b=FQmtQICYfRlgBeyt+2CxDdbrha14g5b7QJjRrP+LoGr5D2dYUd1/cndJQLDYZzvEDdU6U16V7owAyWjFxK72Q7dc60uBV+eVVglfUWvrIjWre6FFhfWA7yLUzicJE+75EzMCau6HsJ06xDb8h8AQyYAlYK/uSLbJgCkrM3H4150= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748481078; c=relaxed/simple; bh=fuEkZAgcVPhsiFb0WuQVgKJco0f6gnpzL76c6CKoNkU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=fd1tBSq+F8NVFqSN2NtLtbkG5Eh4Mg8/cxQOYfP9BfXjmd+4S6c85eNRin/PjJQr5L7WebTwn2xdVsVy1mEfLM3ctL/poWnaf36cVLtoFJX/TZSf0kFav8dpUCLCjxMh87UwoSzp1vP9P4qC9p4d4Rxaynfkbh+cAJoqVZE5G7A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8CxNHAxtDdovh4BAQ--.19886S3; Thu, 29 May 2025 09:11:13 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCx_cYmtDdoR0P5AA--.57458S6; Thu, 29 May 2025 09:11:13 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 4/5] LoongArch: KVM: Remove unused parameter len Date: Thu, 29 May 2025 09:11:01 +0800 Message-Id: <20250529011102.378749-5-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250529011102.378749-1-maobibo@loongson.cn> References: <20250529011102.378749-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCx_cYmtDdoR0P5AA--.57458S6 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Parameter len is unused in some functions with eiointc emulation driver, remove it here. Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 32 +++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index b3aa6e305a18..41fe1e6e9d3b 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -131,7 +131,7 @@ static inline void eiointc_enable_irq(struct kvm_vcpu *= vcpu, } =20 static int loongarch_eiointc_readb(struct kvm_vcpu *vcpu, struct loongarch= _eiointc *s, - gpa_t addr, int len, void *val) + gpa_t addr, void *val) { int index, ret =3D 0; u8 data =3D 0; @@ -173,7 +173,7 @@ static int loongarch_eiointc_readb(struct kvm_vcpu *vcp= u, struct loongarch_eioin } =20 static int loongarch_eiointc_readw(struct kvm_vcpu *vcpu, struct loongarch= _eiointc *s, - gpa_t addr, int len, void *val) + gpa_t addr, void *val) { int index, ret =3D 0; u16 data =3D 0; @@ -215,7 +215,7 @@ static int loongarch_eiointc_readw(struct kvm_vcpu *vcp= u, struct loongarch_eioin } =20 static int loongarch_eiointc_readl(struct kvm_vcpu *vcpu, struct loongarch= _eiointc *s, - gpa_t addr, int len, void *val) + gpa_t addr, void *val) { int index, ret =3D 0; u32 data =3D 0; @@ -257,7 +257,7 @@ static int loongarch_eiointc_readl(struct kvm_vcpu *vcp= u, struct loongarch_eioin } =20 static int loongarch_eiointc_readq(struct kvm_vcpu *vcpu, struct loongarch= _eiointc *s, - gpa_t addr, int len, void *val) + gpa_t addr, void *val) { int index, ret =3D 0; u64 data =3D 0; @@ -315,16 +315,16 @@ static int kvm_eiointc_read(struct kvm_vcpu *vcpu, spin_lock_irqsave(&eiointc->lock, flags); switch (len) { case 1: - ret =3D loongarch_eiointc_readb(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_readb(vcpu, eiointc, addr, val); break; case 2: - ret =3D loongarch_eiointc_readw(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_readw(vcpu, eiointc, addr, val); break; case 4: - ret =3D loongarch_eiointc_readl(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_readl(vcpu, eiointc, addr, val); break; case 8: - ret =3D loongarch_eiointc_readq(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_readq(vcpu, eiointc, addr, val); break; default: WARN_ONCE(1, "%s: Abnormal address access: addr 0x%llx, size %d\n", @@ -337,7 +337,7 @@ static int kvm_eiointc_read(struct kvm_vcpu *vcpu, =20 static int loongarch_eiointc_writeb(struct kvm_vcpu *vcpu, struct loongarch_eiointc *s, - gpa_t addr, int len, const void *val) + gpa_t addr, const void *val) { int index, irq, bits, ret =3D 0; u8 cpu; @@ -416,7 +416,7 @@ static int loongarch_eiointc_writeb(struct kvm_vcpu *vc= pu, =20 static int loongarch_eiointc_writew(struct kvm_vcpu *vcpu, struct loongarch_eiointc *s, - gpa_t addr, int len, const void *val) + gpa_t addr, const void *val) { int i, index, irq, bits, ret =3D 0; u8 cpu; @@ -502,7 +502,7 @@ static int loongarch_eiointc_writew(struct kvm_vcpu *vc= pu, =20 static int loongarch_eiointc_writel(struct kvm_vcpu *vcpu, struct loongarch_eiointc *s, - gpa_t addr, int len, const void *val) + gpa_t addr, const void *val) { int i, index, irq, bits, ret =3D 0; u8 cpu; @@ -588,7 +588,7 @@ static int loongarch_eiointc_writel(struct kvm_vcpu *vc= pu, =20 static int loongarch_eiointc_writeq(struct kvm_vcpu *vcpu, struct loongarch_eiointc *s, - gpa_t addr, int len, const void *val) + gpa_t addr, const void *val) { int i, index, irq, bits, ret =3D 0; u8 cpu; @@ -689,16 +689,16 @@ static int kvm_eiointc_write(struct kvm_vcpu *vcpu, spin_lock_irqsave(&eiointc->lock, flags); switch (len) { case 1: - ret =3D loongarch_eiointc_writeb(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_writeb(vcpu, eiointc, addr, val); break; case 2: - ret =3D loongarch_eiointc_writew(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_writew(vcpu, eiointc, addr, val); break; case 4: - ret =3D loongarch_eiointc_writel(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_writel(vcpu, eiointc, addr, val); break; case 8: - ret =3D loongarch_eiointc_writeq(vcpu, eiointc, addr, len, val); + ret =3D loongarch_eiointc_writeq(vcpu, eiointc, addr, val); break; default: WARN_ONCE(1, "%s: Abnormal address access: addr 0x%llx, size %d\n", --=20 2.39.3 From nobody Tue Dec 16 14:39:03 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 193071DC075; Thu, 29 May 2025 01:11:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8Axz3MytDdoxx4BAQ--.19838S3; Thu, 29 May 2025 09:11:14 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMCx_cYmtDdoR0P5AA--.57458S7; Thu, 29 May 2025 09:11:13 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 5/5] LoongArch: KVM: Add stat information with kernel irqchip Date: Thu, 29 May 2025 09:11:02 +0800 Message-Id: <20250529011102.378749-6-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250529011102.378749-1-maobibo@loongson.cn> References: <20250529011102.378749-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowMCx_cYmtDdoR0P5AA--.57458S7 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Move stat information about kernel irqchip from VM to vCPU, and add entry with structure kvm_vcpu_stats_desc[], so that it can display with directory /sys/kernel/debug/kvm. Also unify stat information about eiointc_read_exits and eiointc_write_exits into eiointc_emu_exits, to avoid two many entries about stat information output. Signed-off-by: Bibo Mao --- arch/loongarch/include/asm/kvm_host.h | 9 +++------ arch/loongarch/kvm/intc/eiointc.c | 4 ++-- arch/loongarch/kvm/intc/ipi.c | 28 ++++----------------------- arch/loongarch/kvm/intc/pch_pic.c | 4 ++-- arch/loongarch/kvm/vcpu.c | 5 ++++- 5 files changed, 15 insertions(+), 35 deletions(-) diff --git a/arch/loongarch/include/asm/kvm_host.h b/arch/loongarch/include= /asm/kvm_host.h index f457c2662e2f..959e8df44612 100644 --- a/arch/loongarch/include/asm/kvm_host.h +++ b/arch/loongarch/include/asm/kvm_host.h @@ -50,12 +50,6 @@ struct kvm_vm_stat { struct kvm_vm_stat_generic generic; u64 pages; u64 hugepages; - u64 ipi_read_exits; - u64 ipi_write_exits; - u64 eiointc_read_exits; - u64 eiointc_write_exits; - u64 pch_pic_read_exits; - u64 pch_pic_write_exits; }; =20 struct kvm_vcpu_stat { @@ -65,6 +59,9 @@ struct kvm_vcpu_stat { u64 cpucfg_exits; u64 signal_exits; u64 hypercall_exits; + u64 ipi_emu_exits; + u64 eiointc_emu_exits; + u64 pch_pic_emu_exits; }; =20 #define KVM_MEM_HUGEPAGE_CAPABLE (1UL << 0) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index 41fe1e6e9d3b..8f844828a308 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -311,7 +311,7 @@ static int kvm_eiointc_read(struct kvm_vcpu *vcpu, return -EINVAL; } =20 - vcpu->kvm->stat.eiointc_read_exits++; + vcpu->stat.eiointc_emu_exits++; spin_lock_irqsave(&eiointc->lock, flags); switch (len) { case 1: @@ -685,7 +685,7 @@ static int kvm_eiointc_write(struct kvm_vcpu *vcpu, return -EINVAL; } =20 - vcpu->kvm->stat.eiointc_write_exits++; + vcpu->stat.eiointc_emu_exits++; spin_lock_irqsave(&eiointc->lock, flags); switch (len) { case 1: diff --git a/arch/loongarch/kvm/intc/ipi.c b/arch/loongarch/kvm/intc/ipi.c index fe734dc062ed..b66f91209940 100644 --- a/arch/loongarch/kvm/intc/ipi.c +++ b/arch/loongarch/kvm/intc/ipi.c @@ -268,36 +268,16 @@ static int kvm_ipi_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, gpa_t addr, int len, void *val) { - int ret; - struct loongarch_ipi *ipi; - - ipi =3D vcpu->kvm->arch.ipi; - if (!ipi) { - kvm_err("%s: ipi irqchip not valid!\n", __func__); - return -EINVAL; - } - ipi->kvm->stat.ipi_read_exits++; - ret =3D loongarch_ipi_readl(vcpu, addr, len, val); - - return ret; + vcpu->stat.ipi_emu_exits++; + return loongarch_ipi_readl(vcpu, addr, len, val); } =20 static int kvm_ipi_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, gpa_t addr, int len, const void *val) { - int ret; - struct loongarch_ipi *ipi; - - ipi =3D vcpu->kvm->arch.ipi; - if (!ipi) { - kvm_err("%s: ipi irqchip not valid!\n", __func__); - return -EINVAL; - } - ipi->kvm->stat.ipi_write_exits++; - ret =3D loongarch_ipi_writel(vcpu, addr, len, val); - - return ret; + vcpu->stat.ipi_emu_exits++; + return loongarch_ipi_writel(vcpu, addr, len, val); } =20 static const struct kvm_io_device_ops kvm_ipi_ops =3D { diff --git a/arch/loongarch/kvm/intc/pch_pic.c b/arch/loongarch/kvm/intc/pc= h_pic.c index 08fce845f668..6dba2ec79c16 100644 --- a/arch/loongarch/kvm/intc/pch_pic.c +++ b/arch/loongarch/kvm/intc/pch_pic.c @@ -196,7 +196,7 @@ static int kvm_pch_pic_read(struct kvm_vcpu *vcpu, } =20 /* statistics of pch pic reading */ - vcpu->kvm->stat.pch_pic_read_exits++; + vcpu->stat.pch_pic_emu_exits++; ret =3D loongarch_pch_pic_read(s, addr, len, val); =20 return ret; @@ -303,7 +303,7 @@ static int kvm_pch_pic_write(struct kvm_vcpu *vcpu, } =20 /* statistics of pch pic writing */ - vcpu->kvm->stat.pch_pic_write_exits++; + vcpu->stat.pch_pic_emu_exits++; ret =3D loongarch_pch_pic_write(s, addr, len, val); =20 return ret; diff --git a/arch/loongarch/kvm/vcpu.c b/arch/loongarch/kvm/vcpu.c index 5af32ec62cb1..06397ae70811 100644 --- a/arch/loongarch/kvm/vcpu.c +++ b/arch/loongarch/kvm/vcpu.c @@ -20,7 +20,10 @@ const struct _kvm_stats_desc kvm_vcpu_stats_desc[] =3D { STATS_DESC_COUNTER(VCPU, idle_exits), STATS_DESC_COUNTER(VCPU, cpucfg_exits), STATS_DESC_COUNTER(VCPU, signal_exits), - STATS_DESC_COUNTER(VCPU, hypercall_exits) + STATS_DESC_COUNTER(VCPU, hypercall_exits), + STATS_DESC_COUNTER(VCPU, ipi_emu_exits), + STATS_DESC_COUNTER(VCPU, eiointc_emu_exits), + STATS_DESC_COUNTER(VCPU, pch_pic_emu_exits) }; =20 const struct kvm_stats_header kvm_vcpu_stats_header =3D { --=20 2.39.3