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Wed, 28 May 2025 15:18:31 -0700 (PDT) From: Joseph Kogut To: Heiko Stuebner , Rob Herring Cc: Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Steve deRosier , Joseph Kogut Subject: [PATCH v3 2/3] arm64: dts: rockchip: Add rk3588 based Radxa CM5 Date: Wed, 28 May 2025 15:18:22 -0700 Message-ID: <20250528221823.2974653-3-joseph.kogut@gmail.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250528221823.2974653-1-joseph.kogut@gmail.com> References: <174735136138.1544989.11909422896170025756.robh@kernel.org> <20250528221823.2974653-1-joseph.kogut@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add initial support for the Radxa Compute Module 5 (CM5). Specification: - Rockchip RK3588 - Up to 32 GB LPDDR4X - Up to 128 GB eMMC - 1x HDMI TX up to 8k@60 hz - 1x eDP TX up to 4k@60 hz - Gigabit Ethernet PHY Signed-off-by: Joseph Kogut --- .../boot/dts/rockchip/rk3588s-radxa-cm5.dtsi | 156 ++++++++++++++++++ 1 file changed, 156 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi b/arch/arm= 64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi new file mode 100644 index 000000000000..d7946fe2bb4e --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi @@ -0,0 +1,156 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2025 Joseph Kogut + */ + +/* + * CM5 data sheet + * https://dl.radxa.com/cm5/v2210/radxa_cm5_v2210_schematic.pdf + */ + +#include +#include +#include +#include + +/ { + compatible =3D "radxa,cm5", "rockchip,rk3588s"; + + aliases { + mmc0 =3D &sdmmc; + mmc1 =3D &sdhci; + mmc2 =3D &sdio; + }; + + leds { + compatible =3D "gpio-leds"; + + led_sys: led-0 { + color =3D ; + default-state =3D "on"; + function =3D LED_FUNCTION_HEARTBEAT; + gpios =3D <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "heartbeat"; + }; + }; +}; + +&cpu_b0 { + cpu-supply =3D <&vdd_cpu_big0_s0>; +}; + +&cpu_b1 { + cpu-supply =3D <&vdd_cpu_big0_s0>; +}; + +&cpu_b2 { + cpu-supply =3D <&vdd_cpu_big1_s0>; +}; + +&cpu_b3 { + cpu-supply =3D <&vdd_cpu_big1_s0>; +}; + +&cpu_l0 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&gmac1 { + clock_in_out =3D "output"; + phy-handle =3D <&rgmii_phy1>; + phy-mode =3D "rgmii-id"; + phy-supply =3D <&vcc_3v3_s0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac1_miim + &gmac1_tx_bus2 + &gmac1_rx_bus2 + &gmac1_rgmii_clk + &gmac1_rgmii_bus + &gmac1_clkinout>; + status =3D "okay"; +}; + +&gpu { + mali-supply =3D <&vdd_gpu_s0>; + status =3D "okay"; +}; + +&hdmi0 { + status =3D "okay"; +}; + +&i2c0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c0m2_xfer>; + status =3D "okay"; + + vdd_cpu_big0_s0: regulator@42 { + compatible =3D "rockchip,rk8602"; + reg =3D <0x42>; + fcs,suspend-voltage-selector =3D <1>; + regulator-name =3D "vdd_cpu_big0_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <1050000>; + regulator-ramp-delay =3D <2300>; + vin-supply =3D <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: regulator@43 { + compatible =3D "rockchip,rk8602"; + reg =3D <0x43>; + fcs,suspend-voltage-selector =3D <1>; + regulator-name =3D "vdd_cpu_big1_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <1050000>; + regulator-ramp-delay =3D <2300>; + vin-supply =3D <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&mdio1 { + rgmii_phy1: phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1>; + }; +}; + +&pd_gpu { + domain-supply =3D <&vdd_gpu_s0>; +}; + +&sdhci { + bus-width =3D <8>; + no-sdio; + no-sd; + non-removable; + max-frequency =3D <200000000>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + mmc-hs200-1_8v; + status =3D "okay"; +}; + --=20 2.49.0