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[73.183.52.120]) by smtp.gmail.com with ESMTPSA id af79cd13be357-7d09a0f984fsm13437985a.43.2025.05.28.16.17.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 May 2025 16:17:24 -0700 (PDT) From: Brian Masney Date: Wed, 28 May 2025 19:16:53 -0400 Subject: [PATCH v2 07/10] clk: test: introduce test suite for sibling rate changes on a gate Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250528-clk-wip-v2-v2-7-0d2c2f220442@redhat.com> References: <20250528-clk-wip-v2-v2-0-0d2c2f220442@redhat.com> In-Reply-To: <20250528-clk-wip-v2-v2-0-0d2c2f220442@redhat.com> To: Stephen Boyd , Maxime Ripard Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Arnd Bergmann , Thomas Gleixner , Michael Turquette , Alberto Ruiz , Brian Masney X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1748474226; l=6771; i=bmasney@redhat.com; s=20250528; h=from:subject:message-id; bh=kG6u7fMzlYNawhtWbFLh1LXdL8BTH4EkRE0c5G3ajEc=; b=TZ4NRb1XDMzb9R3HAchwwsRpCugASlGuEDjkadlx5srrW+6TSU+QGvVVbsc7OwSwzVUTP6J7+ I5z6gm5wj0mDjFpB+5PKfBJAYF2ZnhNkWWBmX57KC8fGAKvytGskjfD X-Developer-Key: i=bmasney@redhat.com; a=ed25519; pk=x20f2BQYftANnik+wvlm4HqLqAlNs/npfVcbhHPOK2U= Introduce a test suite that creates a parent with two children: a divider and a gate. Ensure that changing the rate of one child does not affect the rate of the gate. Some of the tests are disabled until the relevant issue(s) are fixed in the clk core. This is also implemented as a parameterized kunit test since additional test variations will be added. Signed-off-by: Brian Masney --- drivers/clk/clk_test.c | 156 +++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 156 insertions(+) diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c index c2337527873d3241e7b0a38f67ecaa13535bcc71..1440eb3c41def8c549f92c0e95b= 2a472f3bdb4a7 100644 --- a/drivers/clk/clk_test.c +++ b/drivers/clk/clk_test.c @@ -825,6 +825,161 @@ static struct kunit_suite clk_rate_change_sibling_div= _div_test_suite =3D { .test_cases =3D clk_rate_change_sibling_div_div_cases, }; =20 +struct clk_test_rate_change_sibling_clk_ctx { + struct clk *parent_clk, *child1_clk, *child2_clk; +}; + +static void +clk_test_rate_change_sibling_clk_ctx_put(struct clk_test_rate_change_sibli= ng_clk_ctx *clk_ctx) +{ + clk_put(clk_ctx->parent_clk); + clk_put(clk_ctx->child1_clk); + clk_put(clk_ctx->child2_clk); +} + +struct clk_rate_change_sibling_div_gate_sibling_context { + struct clk_dummy_context parent; + struct clk_dummy_div child1; + struct clk_dummy_gate child2; + struct clk_test_rate_change_sibling_clk_ctx clk_ctx; +}; + +static struct clk_test_rate_change_sibling_clk_ctx * +clk_rate_change_sibling_div_gate_test_init(struct kunit *test) +{ + struct clk_rate_change_sibling_div_gate_sibling_context *ctx; + int ret; + + ctx =3D kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return ERR_PTR(-ENOMEM); + test->priv =3D ctx; + + ctx->parent.hw.init =3D CLK_HW_INIT_NO_PARENT("parent", &clk_dummy_rate_o= ps, 0); + ctx->parent.rate =3D DUMMY_CLOCK_RATE_24_MHZ; + ret =3D clk_hw_register_kunit(test, NULL, &ctx->parent.hw); + if (ret) + return ERR_PTR(ret); + + ctx->child1.hw.init =3D CLK_HW_INIT_HW("child1", &ctx->parent.hw, + &clk_dummy_div_ops, + CLK_SET_RATE_PARENT); + ret =3D clk_hw_register_kunit(test, NULL, &ctx->child1.hw); + if (ret) + return ERR_PTR(ret); + + ctx->child2.hw.init =3D CLK_HW_INIT_HW("child2", &ctx->parent.hw, + &clk_dummy_gate_ops, + CLK_SET_RATE_PARENT); + ret =3D clk_hw_register_kunit(test, NULL, &ctx->child2.hw); + if (ret) + return ERR_PTR(ret); + + ctx->clk_ctx.parent_clk =3D clk_hw_get_clk(&ctx->parent.hw, NULL); + ctx->clk_ctx.child1_clk =3D clk_hw_get_clk(&ctx->child1.hw, NULL); + ctx->clk_ctx.child2_clk =3D clk_hw_get_clk(&ctx->child2.hw, NULL); + + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->clk_ctx.parent_clk), + DUMMY_CLOCK_RATE_24_MHZ); + + return &ctx->clk_ctx; +} + +struct clk_test_rate_change_sibling_test_case { + const char *desc; + struct clk_test_rate_change_sibling_clk_ctx *(*init)(struct kunit *test); +}; + +static struct clk_test_rate_change_sibling_test_case clk_test_rate_change_= sibling_test_cases[] =3D { + { + .desc =3D "div_gate", + .init =3D clk_rate_change_sibling_div_gate_test_init, + }, +}; + +KUNIT_ARRAY_PARAM_DESC(clk_test_rate_change_sibling_test_case, + clk_test_rate_change_sibling_test_cases, desc); + +/* + * Test that, for a parent with two children and one requests a rate chang= e that + * requires a change to the parent rate, the sibling rates are not affecte= d. + */ +static void clk_test_rate_change_sibling_1(struct kunit *test) +{ + struct clk_test_rate_change_sibling_test_case *testcase =3D + (struct clk_test_rate_change_sibling_test_case *) test->param_value; + struct clk_test_rate_change_sibling_clk_ctx *ctx; + int ret; + + kunit_skip(test, "This needs to be fixed in the core."); + + ctx =3D testcase->init(test); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx); + + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child2_clk), DUMMY_CLOCK_RATE_24_= MHZ); + + ret =3D clk_set_rate(ctx->child1_clk, DUMMY_CLOCK_RATE_48_MHZ); + KUNIT_ASSERT_EQ(test, ret, 0); + + KUNIT_EXPECT_GE(test, clk_get_rate(ctx->parent_clk), DUMMY_CLOCK_RATE_48_= MHZ); + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child1_clk), DUMMY_CLOCK_RATE_48_= MHZ); + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child2_clk), DUMMY_CLOCK_RATE_24_= MHZ); + + clk_test_rate_change_sibling_clk_ctx_put(ctx); +} + +/* + * Test that, for a parent with two children where one requests an exclusi= ve + * rate and the other requests a rate change that requires a change to the + * parent rate, the sibling rates are not affected. + */ +static void clk_test_rate_change_sibling_2(struct kunit *test) +{ + struct clk_test_rate_change_sibling_test_case *testcase =3D + (struct clk_test_rate_change_sibling_test_case *)(test->param_value); + struct clk_test_rate_change_sibling_clk_ctx *ctx; + int ret; + + ctx =3D testcase->init(test); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx); + + ret =3D clk_rate_exclusive_get(ctx->child2_clk); + KUNIT_ASSERT_EQ(test, ret, 0); + + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child2_clk), DUMMY_CLOCK_RATE_24_= MHZ); + + ret =3D clk_set_rate(ctx->child1_clk, DUMMY_CLOCK_RATE_48_MHZ); + KUNIT_ASSERT_EQ(test, ret, 0); + + KUNIT_EXPECT_GE(test, clk_get_rate(ctx->parent_clk), DUMMY_CLOCK_RATE_24_= MHZ); + /* child1 is rounded to the closest supported rate */ + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child1_clk), DUMMY_CLOCK_RATE_24_= MHZ); + KUNIT_EXPECT_EQ(test, clk_get_rate(ctx->child2_clk), DUMMY_CLOCK_RATE_24_= MHZ); + + clk_rate_exclusive_put(ctx->child2_clk); + + clk_test_rate_change_sibling_clk_ctx_put(ctx); +} + + +static struct kunit_case clk_rate_change_sibling_cases[] =3D { + KUNIT_CASE_PARAM(clk_test_rate_change_sibling_1, + clk_test_rate_change_sibling_test_case_gen_params), + KUNIT_CASE_PARAM(clk_test_rate_change_sibling_2, + clk_test_rate_change_sibling_test_case_gen_params), + {} +}; + +/* + * Test suite that creates a parent with two children, where the children = can + * be combinations of a divider, gate, and a mux. Ensure that changing the= rate + * of one child does affect the rate of the other child. + */ +static struct kunit_suite clk_rate_change_sibling_test_suite =3D { + .name =3D "clk-rate-change-sibling", + .test_cases =3D clk_rate_change_sibling_cases, +}; + static int clk_orphan_transparent_multiple_parent_mux_test_init(struct kunit *test) { @@ -3618,6 +3773,7 @@ kunit_test_suites( &clk_test_suite, &clk_multiple_parents_mux_test_suite, &clk_rate_change_sibling_div_div_test_suite, + &clk_rate_change_sibling_test_suite, &clk_mux_no_reparent_test_suite, &clk_mux_notifier_test_suite, &clk_orphan_transparent_multiple_parent_mux_test_suite, --=20 2.49.0