From nobody Mon Feb 9 11:39:15 2026 Received: from smtp-42aa.mail.infomaniak.ch (smtp-42aa.mail.infomaniak.ch [84.16.66.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4AB5E23ED6A for ; Mon, 26 May 2025 17:14:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=84.16.66.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748279678; cv=none; b=AFDDY1S+bV9C3KxLfvtnbFG6e0ndiDlDQGyobTW5nRhbw/TZZvnF/sHZsNpVCJYa/nAL7C/LCMNz17iyg0EzzHo/GvSvP47xRReyXWtu61p5L8Kyw/bUEuFhq9KubB9zu6nAKG4OjEcYO1AF/7Gzqvql75ivB9tOaRSqYut9/7c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748279678; c=relaxed/simple; bh=RCOQ0yR3/Tq04KxHilLxkDpGrxvL/qQ+UU0j1BZZrYM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Ly5zRo8cen7+LAIoYCWyL/OfMMEusF1AAysoEFnJHTpESsVUCQ5jzoyol1ZTo/re1MNvy+TQqxBXyg423NHmrov51DvORYdklB7hV3/pma4a7zOczUx8Ur5MsBxov+mntFpmHd/bM1l3yRTWdywCHmRnlrwwaR6H6I+om81cucY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net; spf=pass smtp.mailfrom=0leil.net; arc=none smtp.client-ip=84.16.66.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0leil.net Received: from smtp-3-0001.mail.infomaniak.ch (unknown [IPv6:2001:1600:4:17::246c]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4b5hwV2HZczbDZ; Mon, 26 May 2025 19:05:30 +0200 (CEST) Received: from unknown by smtp-3-0001.mail.infomaniak.ch (Postfix) with ESMTPA id 4b5hwT1GVjztYc; Mon, 26 May 2025 19:05:29 +0200 (CEST) From: Quentin Schulz Date: Mon, 26 May 2025 19:05:15 +0200 Subject: [PATCH 1/4] dt-bindings: mfd: rk806: allow to customize PMIC reset method Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250526-rk8xx-rst-fun-v1-1-ea894d9474e0@cherry.de> References: <20250526-rk8xx-rst-fun-v1-0-ea894d9474e0@cherry.de> In-Reply-To: <20250526-rk8xx-rst-fun-v1-0-ea894d9474e0@cherry.de> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Sebastian Reichel Cc: Lukasz Czechowski , Daniel Semkowicz , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Quentin Schulz X-Mailer: b4 0.14.2 X-Infomaniak-Routing: alpha From: Quentin Schulz The RK806 PMIC (and RK809, RK817; but those aren't handled here) has a bitfield for configuring the restart/reset behavior (which I assume Rockchip calls "function") whenever the PMIC is reset (at least by software; c.f. DEV_RST in the datasheet). For RK806, the following values are possible for RST_FUN: 0b00 means "restart PMU" 0b01 means "Reset all the power off reset registers, forcing the state to switch to ACTIVE mode" 0b10 means "Reset all the power off reset registers, forcing the state to switch to ACTIVE mode, and simultaneously pull down the RESETB PIN for 5mS before releasing" 0b11 means the same as for 0b10 just above. I don't believe this is suitable for a subsystem-generic property hence let's make it a vendor property called rockchip,rst-fun. The first few sentences in the description of the property are voluntarily generic so they could be copied to the DT binding for RK809/RK817 whenever someone wants to implement that for those PMIC. Signed-off-by: Quentin Schulz --- .../devicetree/bindings/mfd/rockchip,rk806.yaml | 24 ++++++++++++++++++= ++++ 1 file changed, 24 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk806.yaml b/Do= cumentation/devicetree/bindings/mfd/rockchip,rk806.yaml index 3c2b06629b75ea94f90712470bf14ed7fc16d68d..0f931a6da93f7596eac89c5f0de= b8ee3bd934c31 100644 --- a/Documentation/devicetree/bindings/mfd/rockchip,rk806.yaml +++ b/Documentation/devicetree/bindings/mfd/rockchip,rk806.yaml @@ -31,6 +31,30 @@ properties: =20 system-power-controller: true =20 + rockchip,rst-fun: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + description: + RST_FUN value to set for the PMIC. + + This is the value in the RST_FUN bitfield according to the + datasheet. I.e. if RST_FUN is bits 6 and 7 and the desired value + of RST_FUN is 1, this property needs to be set to 1 (and not 64, + 0x40, or BIT(6)). + + The meaning of this value is specific to the PMIC and is + explained in the datasheet. + + For RK806, the following applies + + 0b00 means "restart PMU" + 0b01 means "Reset all the power off reset registers, forcing + the state to switch to ACTIVE mode" + 0b10 means "Reset all the power off reset registers, forcing + the state to switch to ACTIVE mode, and simultaneously + pull down the RESETB PIN for 5mS before releasing" + 0b11 means the same as for 0b10 just above. + vcc1-supply: description: The input supply for dcdc-reg1. --=20 2.49.0 From nobody Mon Feb 9 11:39:15 2026 Received: from smtp-8fac.mail.infomaniak.ch (smtp-8fac.mail.infomaniak.ch [83.166.143.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C80731BF33F for ; Mon, 26 May 2025 17:14:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=83.166.143.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748279675; cv=none; b=ht6xBUUo4qpVItTNQWD74nwpinwLkhTKkdqAI5/NAILSb4FcVuaQyMm5Sp1dDP/0wEKbq0WzlMR95xFlM6n5az6OONwqxuPBIdPRQzl6Ry+9H1MKzeHn84q64AN1puwBYyPcCEn64FxWwiES0yAw/unjZdBMMZ3hr8uwcAGzrqk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748279675; c=relaxed/simple; bh=KXiqGKoZyH6LuBo66fpOiaE/GV/GU0CXrTONxIFeMBY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=X1R/c2vasa4bqbL6nDOhYUDMTZVmb3jixr/TTK4TQZ0J/eZz/WdAhzEscGF5Zd6+LKEDo2Vli/kLPA5Mcp2GYxmlLsNIncF/NkhaWa1in2jDMx9rfT/p+/aCxs7JK2+pP7LW7lbVjPA8sS2yjsEC8Jtdi+nzAn9b2WN7KA4Jhmc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net; spf=pass smtp.mailfrom=0leil.net; arc=none smtp.client-ip=83.166.143.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0leil.net Received: from smtp-3-0001.mail.infomaniak.ch (unknown [IPv6:2001:1600:4:17::246c]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4b5hwW2rvszbGf; Mon, 26 May 2025 19:05:31 +0200 (CEST) Received: from unknown by smtp-3-0001.mail.infomaniak.ch (Postfix) with ESMTPA id 4b5hwV2x1nz4kJ; Mon, 26 May 2025 19:05:30 +0200 (CEST) From: Quentin Schulz Date: Mon, 26 May 2025 19:05:16 +0200 Subject: [PATCH 2/4] mfd: rk8xx-core: allow to customize RK806 reset method Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250526-rk8xx-rst-fun-v1-2-ea894d9474e0@cherry.de> References: <20250526-rk8xx-rst-fun-v1-0-ea894d9474e0@cherry.de> In-Reply-To: <20250526-rk8xx-rst-fun-v1-0-ea894d9474e0@cherry.de> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Sebastian Reichel Cc: Lukasz Czechowski , Daniel Semkowicz , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Quentin Schulz X-Mailer: b4 0.14.2 X-Infomaniak-Routing: alpha From: Quentin Schulz The RK806 PMIC (and RK809, RK817; but those aren't handled here) has a bitfield for configuring the restart/reset behavior (which I assume Rockchip calls "function") whenever the PMIC is reset (at least by software; c.f. DEV_RST in the datasheet). For RK806, the following values are possible for RST_FUN: 0b00 means "restart PMU" 0b01 means "Reset all the power off reset registers, forcing the state to switch to ACTIVE mode" 0b10 means "Reset all the power off reset registers, forcing the state to switch to ACTIVE mode, and simultaneously pull down the RESETB PIN for 5mS before releasing" 0b11 means the same as for 0b10 just above. This adds the appropriate logic in the driver to parse the new rockchip,rst-fun DT property to pass this information. If it is missing, the register is left untouched and relies either on the silicon default or on whatever was set earlier in the boot stages (e.g. the bootloader). Signed-off-by: Quentin Schulz --- drivers/mfd/rk8xx-core.c | 15 +++++++++++++++ include/linux/mfd/rk808.h | 2 ++ 2 files changed, 17 insertions(+) diff --git a/drivers/mfd/rk8xx-core.c b/drivers/mfd/rk8xx-core.c index 71c2b80a4678d627e86cfbec8135f08e262559d3..c59cda7709c01d938870795c55b= d1ea2b541b006 100644 --- a/drivers/mfd/rk8xx-core.c +++ b/drivers/mfd/rk8xx-core.c @@ -720,12 +720,27 @@ int rk8xx_probe(struct device *dev, int variant, unsi= gned int irq, struct regmap nr_cells =3D ARRAY_SIZE(rk805s); break; case RK806_ID: + u32 rst_fun; + rk808->regmap_irq_chip =3D &rk806_irq_chip; pre_init_reg =3D rk806_pre_init_reg; nr_pre_init_regs =3D ARRAY_SIZE(rk806_pre_init_reg); cells =3D rk806s; nr_cells =3D ARRAY_SIZE(rk806s); dual_support =3D IRQF_SHARED; + + ret =3D device_property_read_u32(dev, "rockchip,rst-fun", &rst_fun); + if (ret) { + dev_dbg(dev, + "rockchip,rst-fun property missing, not setting RST_FUN\n"); + break; + } + + ret =3D regmap_update_bits(rk808->regmap, RK806_SYS_CFG3, + RK806_RST_FUN_MSK, + FIELD_PREP(RK806_RST_FUN_MSK, rst_fun)); + if (ret) + return dev_err_probe(dev, ret, "RST_FUN write err\n"); break; case RK808_ID: rk808->regmap_irq_chip =3D &rk808_irq_chip; diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h index 69cbea78b430b562a23d995263369d475daa6287..28170ee08898ca59c76a741a1d4= 2763a42b72380 100644 --- a/include/linux/mfd/rk808.h +++ b/include/linux/mfd/rk808.h @@ -812,6 +812,8 @@ enum rk806_pin_dr_sel { #define RK806_INT_POL_H BIT(1) #define RK806_INT_POL_L 0 =20 +/* SYS_CFG3 */ +#define RK806_RST_FUN_MSK GENMASK(7, 6) #define RK806_SLAVE_RESTART_FUN_MSK BIT(1) #define RK806_SLAVE_RESTART_FUN_EN BIT(1) #define RK806_SLAVE_RESTART_FUN_OFF 0 --=20 2.49.0 From nobody Mon Feb 9 11:39:15 2026 Received: from smtp-42aa.mail.infomaniak.ch (smtp-42aa.mail.infomaniak.ch [84.16.66.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4ABCA23ED6F for ; Mon, 26 May 2025 17:14:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=84.16.66.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748279678; cv=none; b=nBwCvJ9047enryGFNvP8zVGeX9b5wfCudV8MV6vdrNzp1zOy3LMP0XU2pajUEPxETCsZ1uC5cfBtelSLPWWASoge38aJSiQmQ2EeWm9IJkr/IvvIIFhL8lKElLedKwcIaWpiM85hlp/2v8ukRq15gHBesqP2A6IQNFna+X+2ia8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748279678; c=relaxed/simple; bh=nKzeZGwDNmqtTSym90+Dh7Khk2jPAMYUzO5RjSP8N84=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=th16q59R6CJK6rbzjBj/0SPHvKmaMJIbaeDFG8Su2OeeP3MrGwdhrs+qxJqRuwPnOA6zdKJkZnsQK6TcqLs+3ls2+bbCXIJyMw7QKLwFPqoP4c8YYFcpu3d7ikh8pkJjaNPL/FP6OUupXQ5mkzvt/emvfYsoguRqmLtre/pQ+38= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net; spf=pass smtp.mailfrom=0leil.net; arc=none smtp.client-ip=84.16.66.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0leil.net Received: from smtp-3-0001.mail.infomaniak.ch (unknown [IPv6:2001:1600:4:17::246c]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4b5hwX2s0czdPL; Mon, 26 May 2025 19:05:32 +0200 (CEST) Received: from unknown by smtp-3-0001.mail.infomaniak.ch (Postfix) with ESMTPA id 4b5hwW370Szsmn; Mon, 26 May 2025 19:05:31 +0200 (CEST) From: Quentin Schulz Date: Mon, 26 May 2025 19:05:17 +0200 Subject: [PATCH 3/4] arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Jaguar Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250526-rk8xx-rst-fun-v1-3-ea894d9474e0@cherry.de> References: <20250526-rk8xx-rst-fun-v1-0-ea894d9474e0@cherry.de> In-Reply-To: <20250526-rk8xx-rst-fun-v1-0-ea894d9474e0@cherry.de> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Sebastian Reichel Cc: Lukasz Czechowski , Daniel Semkowicz , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Quentin Schulz X-Mailer: b4 0.14.2 X-Infomaniak-Routing: alpha From: Quentin Schulz The bootloader for RK3588 Jaguar currently forces the PMIC reset behavior (stored in RST_FUN bitfield in register SYS_CFG3 of the PMIC) to 0b1X which is incorrect for our devices. It is required to restart the PMU as otherwise the companion microcontroller cannot detect the PMIC (and by extension the full product and main SoC) being rebooted which is an issue as that is used to reset a few things like the PWM beeper and watchdogs. Let's add the new rockchip,rst-fun property to make sure the PMIC reset behavior is the expected one. Signed-off-by: Quentin Schulz --- arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts b/arch/arm64/bo= ot/dts/rockchip/rk3588-jaguar.dts index 9fceea6c1398e92114dcb735cf2babb7d05d67a5..0f431a9a01c4b93ce7ffcb409db= e06de25cc7edd 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts @@ -685,6 +685,7 @@ pmic@0 { vcc13-supply =3D <&vcc_1v1_nldo_s3>; vcc14-supply =3D <&vcc_1v1_nldo_s3>; vcca-supply =3D <&vcc5v0_sys>; + rockchip,rst-fun =3D <0>; =20 rk806_dvs1_null: dvs1-null-pins { pins =3D "gpio_pwrctrl1"; --=20 2.49.0 From nobody Mon Feb 9 11:39:15 2026 Received: from smtp-1908.mail.infomaniak.ch (smtp-1908.mail.infomaniak.ch [185.125.25.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4AC2723ED74 for ; Mon, 26 May 2025 17:14:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.125.25.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748279679; cv=none; b=g31IhTeoZpHfrVdV5AD4BkEA0ajcxYiWwkwX88xOFxQcrDV5IVsZ9pqHnmGfZj5RwdVgfZHP24q4+dNSBCIkw5pExxr9Hui+WgoBEVrWdYDFNEqhjM5ve0Ake5U/S3PUshxL5xmg+Dx4VayZDbFD2U9AhNBFtk+NuIg9FTntjfo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748279679; c=relaxed/simple; bh=LPIXgiIJkNYqnd7KSbPdoMHY+jCAeY4zuCx+MJTEWJ0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=iS6gYgkn5qDPteGy5W0RS5LNTSC3kxNdSco+EB26mhQ7onstD0LGEmCC4Oel3odvcKld8EMcRswiOvf7cgXgRNYxYoBG+qb44lkZHHR9Wg+as/b8NQzLrBS4gZE2BAn1OrT4k6y6EumR0Ya0xPbq8muEmzDm0KCjqgHzEVVLvxc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net; spf=pass smtp.mailfrom=0leil.net; arc=none smtp.client-ip=185.125.25.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0leil.net Received: from smtp-3-0001.mail.infomaniak.ch (unknown [IPv6:2001:1600:4:17::246c]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4b5hwY3QTvzZgN; Mon, 26 May 2025 19:05:33 +0200 (CEST) Received: from unknown by smtp-3-0001.mail.infomaniak.ch (Postfix) with ESMTPA id 4b5hwX3G8DzwS8; Mon, 26 May 2025 19:05:32 +0200 (CEST) From: Quentin Schulz Date: Mon, 26 May 2025 19:05:18 +0200 Subject: [PATCH 4/4] arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Tiger Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250526-rk8xx-rst-fun-v1-4-ea894d9474e0@cherry.de> References: <20250526-rk8xx-rst-fun-v1-0-ea894d9474e0@cherry.de> In-Reply-To: <20250526-rk8xx-rst-fun-v1-0-ea894d9474e0@cherry.de> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Sebastian Reichel Cc: Lukasz Czechowski , Daniel Semkowicz , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Quentin Schulz X-Mailer: b4 0.14.2 X-Infomaniak-Routing: alpha From: Quentin Schulz The bootloader for RK3588 Tiger currently forces the PMIC reset behavior (stored in RST_FUN bitfield in register SYS_CFG3 of the PMIC) to 0b1X which is incorrect for our devices. It is required to restart the PMU as otherwise the companion microcontroller cannot detect the PMIC (and by extension the full product and main SoC) being rebooted which is an issue as that is used to reset a few things like the PWM beeper and watchdogs. Let's add the new rockchip,rst-fun property to make sure the PMIC reset behavior is the expected one. Signed-off-by: Quentin Schulz --- arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi b/arch/arm64/bo= ot/dts/rockchip/rk3588-tiger.dtsi index c4933a08dd1e3c92f3e0747135faf97c5eeca906..1bb6a3ee7579e30721bd5e36554= b409c7a88dd04 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi @@ -440,6 +440,7 @@ pmic@0 { vcc13-supply =3D <&vcc_1v1_nldo_s3>; vcc14-supply =3D <&vcc_1v1_nldo_s3>; vcca-supply =3D <&vcc5v0_sys>; + rockchip,rst-fun =3D <0>; =20 rk806_dvs1_null: dvs1-null-pins { pins =3D "gpio_pwrctrl1"; --=20 2.49.0