From nobody Sun Feb 8 14:38:49 2026 Received: from out-184.mta0.migadu.com (out-184.mta0.migadu.com [91.218.175.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 38B161EE7DD for ; Sun, 25 May 2025 09:55:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748166927; cv=none; b=ABYm2MG3n3F6PbeD4SNUvt4nMq79iK7ITkklTBhlu2uJITljJvo28oJ9sq8pGPq9Clb30gbX9HulLfu+XyCxinfCQjI3jc6VzWxWzxBlilJnQ2z1yRXs4eRGWWY1cgJjzQ3WPfBrbF6p9YDPnJaeuH/LG0jfsSD4Pe9godREh4c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748166927; c=relaxed/simple; bh=Jn7ZYZSwtkLqYRlI80ZaD8sio1+K2DsnKAtwRKmV4r0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=e+sczGVyDUPfytqyaVqJv2dBkdlTUdCaK+orQIs+pldBywlIJIW8eHt/x3pzzVgp+73rxYE4PbNysYx09nzNEtylOe1tM4tYQ4H6TswEdoPrpCEq+Xsot6lqb9f2kGrbf5RE4iJQZ3sD/dOAFq/+nsb6MtXj3+c/0hFuFSBjhq4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=l5V6Zag1; arc=none smtp.client-ip=91.218.175.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="l5V6Zag1" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1748166923; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gID2IemeHkJqkz14Cc8CbWa9h6vQqjR8G2Hs1CLsl6s=; b=l5V6Zag1X4GF+J02qoPXyzVSgI4yM+HFfnlO0fwDF5tUlvI3yg/+8ole1hbp3gEh/KDbsr 3bRl/wlzX/eJV03OCepsTYDu1Sarcm5HCTMspVBSfJs6w2X/GpR3GIm1qVkwnTCxnz93N3 A7h+eFaiZp+GHO9kScPtNQYvldJXrALb5H2qDUpHr4F6Wb5XgNVbbYhajGIwAnRHvoCvel ni9D9CfmsBQe0s/ESlsIknWGbF6iONmBVNhlpk4ef43QxyMxEA6aZrh2FYoXUDxKY6Cjcw eEl5RI6IPIDw5Oy30C0AwAeEY1MtAzyelkExhd+Mgn9G3UseKIhgwH3aZX0NIg== From: Val Packett To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Val Packett , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/4] dt-bindings: arm: qcom: Add Dell Latitude 7455 Date: Sun, 25 May 2025 06:53:33 -0300 Message-ID: <20250525095341.12462-3-val@packett.cool> In-Reply-To: <20250525095341.12462-2-val@packett.cool> References: <20250525095341.12462-2-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Document the X1E80100-based Dell Latitude 7455 laptop. Signed-off-by: Val Packett Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index 56f78f0f3803..e35a05db6558 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1140,6 +1140,7 @@ properties: - enum: - asus,vivobook-s15 - asus,zenbook-a14-ux3407ra + - dell,latitude-7455 - dell,xps13-9345 - hp,elitebook-ultra-g1q - hp,omnibook-x14 --=20 2.49.0 From nobody Sun Feb 8 14:38:49 2026 Received: from out-183.mta0.migadu.com (out-183.mta0.migadu.com [91.218.175.183]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F0C741EB5D6 for ; Sun, 25 May 2025 09:55:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.183 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748166937; cv=none; b=EXPmEXPxy6ytNAQXpE1nhvxNVHJH4mN/VIGveGcH3MiuBYP6vEH5aJGyLFj7MufnXVtfcJNj9hHWHauaE24Y+86g3dnXq9BwZ/A+YKzHSC2MU9PR2sDiJAM9jmZUP6QmVhK3eN5EJEtGHSEzQYZlVugBXsC/g6T431PsPVsBG1k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748166937; c=relaxed/simple; bh=7tktojv+/BActbNvw1cT6r9/Ean49O+MROIIvGLkpII=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oE/+nNz/5oFjz0lkxq3/aOl6S09+EE/LkNASvKgxnggJRzoVpOrKzTzXtY/Lp1V/tSDJd4Q8nmnE+IvpaCiGC4BGtBQ9IU7xH8sf3uwfpqYxHU/fCXx51moQi4KVmWMRiq60h4/rsf3NGuOhydF5OBmdZzg+siQDFwKFVLUVbLg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=GqO0irfG; arc=none smtp.client-ip=91.218.175.183 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="GqO0irfG" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1748166932; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5P85p57XFyNzfsyw5czJTj3Zi8BsB4FKfDt+MkH6nKo=; b=GqO0irfGIDAVi5Ad8V0Tsf/lhAyPk3zKdgbVXrPmoLRIV52dOGncjatSY4Ooi+Jg5CORM/ B9DJ8bZbwgK3mniEHYSJMZWFWYHMfzgWXMjXajnL3ty1+ECEflnrwALbDiAx4/ScER6drK 2yKkihM81G0apY4sB8fQuops6tKarMOOG65Pz9uTuL9pU/BBW0WXiN+RU7Jn8KmOhhFHKm nWr5Tg7Bd5ZjZM8z/j4+tiPGtM8uyDmUpcn+0sNNehhy96Mk31fkvSvS5S2bYJot27aTdo gIVNIWT7BV8C09Oe++OB+DEQbdxV5ZB6MOQqwk/Mp3bAfSfpEgPQFXs6vuR1Ug== From: Val Packett To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Val Packett , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/4] arm64: dts: qcom: Add support for X1E80100 Dell Latitude 7455 Date: Sun, 25 May 2025 06:53:34 -0300 Message-ID: <20250525095341.12462-4-val@packett.cool> In-Reply-To: <20250525095341.12462-2-val@packett.cool> References: <20250525095341.12462-2-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add a device tree for the Dell Latitude 7455 (X Elite) laptop. Working: - Wi-Fi (WCN7850 hw2.0) - Bluetooth - USB Type-C x2 (with DP alt mode) - USB Type-A - USB Fingerprint reader - eDP Display (with brightness) - NVMe - SDHC (microSD slot) - Keyboard - Touchpad - Touchscreen - Battery Not included: - Audio - Camera Signed-off-by: Val Packett --- arch/arm64/boot/dts/qcom/Makefile | 2 + .../dts/qcom/x1e80100-dell-latitude-7455.dts | 1484 +++++++++++++++++ 2 files changed, 1486 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/x1e80100-dell-latitude-7455.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 669b888b27a1..efe3b79376b8 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -311,6 +311,8 @@ x1e80100-asus-vivobook-s15-el2-dtbs :=3D x1e80100-asus-= vivobook-s15.dtb x1-el2.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D x1e80100-asus-vivobook-s15.dtb x1e80100-asus-= vivobook-s15-el2.dtb x1e80100-crd-el2-dtbs :=3D x1e80100-crd.dtb x1-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D x1e80100-crd.dtb x1e80100-crd-el2.dtb +x1e80100-dell-latitude-7455-el2-dtbs :=3D x1e80100-dell-latitude-7455.dtb = x1-el2.dtbo +dtb-$(CONFIG_ARCH_QCOM) +=3D x1e80100-dell-latitude-7455.dtb x1e80100-dell= -latitude-7455-el2.dtb x1e80100-dell-xps13-9345-el2-dtbs :=3D x1e80100-dell-xps13-9345.dtb x1-el2= .dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D x1e80100-dell-xps13-9345.dtb x1e80100-dell-xp= s13-9345-el2.dtb x1e80100-hp-elitebook-ultra-g1q-el2-dtbs :=3D x1e80100-hp-elitebook-ultra-= g1q.dtb x1-el2.dtbo diff --git a/arch/arm64/boot/dts/qcom/x1e80100-dell-latitude-7455.dts b/arc= h/arm64/boot/dts/qcom/x1e80100-dell-latitude-7455.dts new file mode 100644 index 000000000000..0e5a853e3291 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/x1e80100-dell-latitude-7455.dts @@ -0,0 +1,1484 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024 Aleksandrs Vinarskis + * Copyright (c) 2025 Bryan O'Donoghue + * Copyright (c) 2025 Val Packett + */ + +/dts-v1/; + +#include +#include +#include +#include +#include + +#include "x1e80100.dtsi" +#include "x1e80100-pmics.dtsi" + +/ { + model =3D "Dell Latitude 7455"; + compatible =3D "dell,latitude-7455", "qcom,x1e80100"; + chassis-type =3D "laptop"; + + aliases { + serial0 =3D &uart14; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + + pinctrl-0 =3D <&hall_int_n_default>; + pinctrl-names =3D "default"; + + switch-lid { + gpios =3D <&tlmm 92 GPIO_ACTIVE_LOW>; + linux,input-type =3D ; + linux,code =3D ; + wakeup-source; + wakeup-event-action =3D ; + }; + }; + + pmic-glink { + compatible =3D "qcom,x1e80100-pmic-glink", + "qcom,sm8550-pmic-glink", + "qcom,pmic-glink"; + orientation-gpios =3D <&tlmm 121 GPIO_ACTIVE_HIGH>, + <&tlmm 123 GPIO_ACTIVE_HIGH>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + /* Display-adjacent port */ + connector@0 { + compatible =3D "usb-c-connector"; + reg =3D <0>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss0_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss0_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss0_ss_in: endpoint { + remote-endpoint =3D <&retimer_ss0_ss_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss0_con_sbu_in: endpoint { + remote-endpoint =3D <&retimer_ss0_con_sbu_out>; + }; + }; + }; + }; + + /* User-adjacent port */ + connector@1 { + compatible =3D "usb-c-connector"; + reg =3D <1>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss1_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss1_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss1_ss_in: endpoint { + remote-endpoint =3D <&retimer_ss1_ss_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss1_con_sbu_in: endpoint { + remote-endpoint =3D <&retimer_ss1_con_sbu_out>; + }; + }; + }; + }; + }; + + leds { + compatible =3D "gpio-leds"; + + pinctrl-0 =3D <&cam_indicator_en>; + pinctrl-names =3D "default"; + + led-camera-indicator { + label =3D "white:camera-indicator"; + function =3D LED_FUNCTION_INDICATOR; + color =3D ; + gpios =3D <&tlmm 110 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "none"; + default-state =3D "off"; + /* Reuse as a panic indicator until we get a "camera on" trigger */ + panic-indicator; + }; + }; + + reserved-memory { + linux,cma { + compatible =3D "shared-dma-pool"; + size =3D <0x0 0x8000000>; + reusable; + linux,cma-default; + }; + }; + + vreg_cam_1p8: regulator-cam-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_CAM_1P8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&tlmm 91 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&cam_ldo_en>; + pinctrl-names =3D "default"; + }; + + vreg_edp_3p3: regulator-edp-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_EDP_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 70 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&edp_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_nvme: regulator-nvme { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_NVME_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 18 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&nvme_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_1p15: regulator-rtmr0-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_1P15"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb0_pwr_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_1p8: regulator-rtmr0-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_1P8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb0_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_3p3: regulator-rtmr0-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb0_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_1p15: regulator-rtmr1-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_1P15"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&tlmm 188 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb1_pwr_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_1p8: regulator-rtmr1-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_1P8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&tlmm 175 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb1_pwr_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_3p3: regulator-rtmr1-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 186 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb1_pwr_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vph_pwr: regulator-vph-pwr { + compatible =3D "regulator-fixed"; + + regulator-name =3D "vph_pwr"; + regulator-min-microvolt =3D <3700000>; + regulator-max-microvolt =3D <3700000>; + + regulator-always-on; + regulator-boot-on; + }; + + vreg_wcn_3p3: regulator-wcn-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 214 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&wcn_sw_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + /* + * TODO: These two regulators are actually part of the removable M.2 + * card and not the mainboard. Need to describe this differently. + * Functionally it works correctly, because all we need to do is to + * turn on the actual 3.3V supply above. + */ + vreg_wcn_0p95: regulator-wcn-0p95 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_0P95"; + regulator-min-microvolt =3D <950000>; + regulator-max-microvolt =3D <950000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + vreg_wcn_1p9: regulator-wcn-1p9 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_1P9"; + regulator-min-microvolt =3D <1900000>; + regulator-max-microvolt =3D <1900000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + wcn7850-pmu { + compatible =3D "qcom,wcn7850-pmu"; + + vdd-supply =3D <&vreg_wcn_0p95>; + vddio-supply =3D <&vreg_l15b_1p8>; + vddaon-supply =3D <&vreg_wcn_0p95>; + vdddig-supply =3D <&vreg_wcn_0p95>; + vddrfa1p2-supply =3D <&vreg_wcn_1p9>; + vddrfa1p8-supply =3D <&vreg_wcn_1p9>; + + wlan-enable-gpios =3D <&tlmm 117 GPIO_ACTIVE_HIGH>; + bt-enable-gpios =3D <&tlmm 116 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&wcn_wlan_bt_en>; + pinctrl-names =3D "default"; + + regulators { + vreg_pmu_rfa_cmn: ldo0 { + regulator-name =3D "vreg_pmu_rfa_cmn"; + }; + + vreg_pmu_aon_0p59: ldo1 { + regulator-name =3D "vreg_pmu_aon_0p59"; + }; + + vreg_pmu_wlcx_0p8: ldo2 { + regulator-name =3D "vreg_pmu_wlcx_0p8"; + }; + + vreg_pmu_wlmx_0p85: ldo3 { + regulator-name =3D "vreg_pmu_wlmx_0p85"; + }; + + vreg_pmu_btcmx_0p85: ldo4 { + regulator-name =3D "vreg_pmu_btcmx_0p85"; + }; + + vreg_pmu_rfa_0p8: ldo5 { + regulator-name =3D "vreg_pmu_rfa_0p8"; + }; + + vreg_pmu_rfa_1p2: ldo6 { + regulator-name =3D "vreg_pmu_rfa_1p2"; + }; + + vreg_pmu_rfa_1p8: ldo7 { + regulator-name =3D "vreg_pmu_rfa_1p8"; + }; + + vreg_pmu_pcie_0p9: ldo8 { + regulator-name =3D "vreg_pmu_pcie_0p9"; + }; + + vreg_pmu_pcie_1p8: ldo9 { + regulator-name =3D "vreg_pmu_pcie_1p8"; + }; + }; + }; +}; + +&apps_rsc { + regulators-0 { + compatible =3D "qcom,pm8550-rpmh-regulators"; + qcom,pmic-id =3D "b"; + + vdd-bob1-supply =3D <&vph_pwr>; + vdd-bob2-supply =3D <&vph_pwr>; + vdd-l1-l4-l10-supply =3D <&vreg_s4c_1p8>; + vdd-l2-l13-l14-supply =3D <&vreg_bob1>; + vdd-l5-l16-supply =3D <&vreg_bob1>; + vdd-l6-l7-supply =3D <&vreg_bob2>; + vdd-l8-l9-supply =3D <&vreg_bob1>; + vdd-l12-supply =3D <&vreg_s5j_1p2>; + vdd-l15-supply =3D <&vreg_s4c_1p8>; + vdd-l17-supply =3D <&vreg_bob2>; + + vreg_bob1: bob1 { + regulator-name =3D "vreg_bob1"; + regulator-min-microvolt =3D <3008000>; + regulator-max-microvolt =3D <3960000>; + regulator-initial-mode =3D ; + }; + + vreg_bob2: bob2 { + regulator-name =3D "vreg_bob2"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <3008000>; + regulator-initial-mode =3D ; + }; + + vreg_l1b_1p8: ldo1 { + regulator-name =3D "vreg_l1b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2b_3p0: ldo2 { + regulator-name =3D "vreg_l2b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3100000>; + regulator-initial-mode =3D ; + }; + + vreg_l4b_1p8: ldo4 { + regulator-name =3D "vreg_l4b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l6b_1p8: ldo6 { + regulator-name =3D "vreg_l6b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l7b_2p8: ldo7 { + regulator-name =3D "vreg_l7b_2p8"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + regulator-initial-mode =3D ; + }; + + vreg_l8b_3p0: ldo8 { + regulator-name =3D "vreg_l8b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l9b_2p9: ldo9 { + regulator-name =3D "vreg_l9b_2p9"; + regulator-min-microvolt =3D <2960000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l12b_1p2: ldo12 { + regulator-name =3D "vreg_l12b_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l13b_3p0: ldo13 { + regulator-name =3D "vreg_l13b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3100000>; + regulator-initial-mode =3D ; + }; + + vreg_l14b_3p0: ldo14 { + regulator-name =3D "vreg_l14b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l15b_1p8: ldo15 { + regulator-name =3D "vreg_l15b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-1 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "c"; + + vdd-l1-supply =3D <&vreg_s5j_1p2>; + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s4-supply =3D <&vph_pwr>; + + vreg_s4c_1p8: smps4 { + regulator-name =3D "vreg_s4c_1p8"; + regulator-min-microvolt =3D <1856000>; + regulator-max-microvolt =3D <2000000>; + regulator-initial-mode =3D ; + }; + + vreg_l1c_1p2: ldo1 { + regulator-name =3D "vreg_l1c_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l2c_0p8: ldo2 { + regulator-name =3D "vreg_l2c_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l3c_0p8: ldo3 { + regulator-name =3D "vreg_l3c_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-2 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "d"; + + vdd-l1-supply =3D <&vreg_s1f_0p7>; + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s4c_1p8>; + vdd-s1-supply =3D <&vph_pwr>; + + vreg_l1d_0p8: ldo1 { + regulator-name =3D "vreg_l1d_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l2d_0p9: ldo2 { + regulator-name =3D "vreg_l2d_0p9"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + }; + + vreg_l3d_1p8: ldo3 { + regulator-name =3D "vreg_l3d_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-3 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "e"; + + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s5j_1p2>; + + vreg_l2e_0p8: ldo2 { + regulator-name =3D "vreg_l2e_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l3e_1p2: ldo3 { + regulator-name =3D "vreg_l3e_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-4 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "f"; + + vdd-l1-supply =3D <&vreg_s5j_1p2>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s5j_1p2>; + vdd-s1-supply =3D <&vph_pwr>; + + vreg_s1f_0p7: smps1 { + regulator-name =3D "vreg_s1f_0p7"; + regulator-min-microvolt =3D <700000>; + regulator-max-microvolt =3D <1100000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-6 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "i"; + + vdd-l1-supply =3D <&vreg_s4c_1p8>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s1-supply =3D <&vph_pwr>; + vdd-s2-supply =3D <&vph_pwr>; + + vreg_l1i_1p8: ldo1 { + regulator-name =3D "vreg_l1i_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2i_1p2: ldo2 { + regulator-name =3D "vreg_l2i_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l3i_0p8: ldo3 { + regulator-name =3D "vreg_l3i_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-7 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "j"; + + vdd-l1-supply =3D <&vreg_s1f_0p7>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s5-supply =3D <&vph_pwr>; + + vreg_s5j_1p2: smps5 { + regulator-name =3D "vreg_s5j_1p2"; + regulator-min-microvolt =3D <1256000>; + regulator-max-microvolt =3D <1304000>; + regulator-initial-mode =3D ; + }; + + vreg_l1j_0p8: ldo1 { + regulator-name =3D "vreg_l1j_0p8"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + }; + + vreg_l2j_1p2: ldo2 { + regulator-name =3D "vreg_l2j_1p2"; + regulator-min-microvolt =3D <1256000>; + regulator-max-microvolt =3D <1256000>; + regulator-initial-mode =3D ; + }; + + vreg_l3j_0p8: ldo3 { + regulator-name =3D "vreg_l3j_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; +}; + +&gpu { + status =3D "okay"; + + zap-shader { + firmware-name =3D "qcom/x1e80100/dell/latitude-7455/qcdxkmsuc8380.mbn"; + }; +}; + +&i2c0 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + keyboard@5 { + compatible =3D "hid-over-i2c"; + reg =3D <0x5>; + + hid-descr-addr =3D <0x20>; + interrupts-extended =3D <&tlmm 67 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-0 =3D <&kybd_default>; + pinctrl-names =3D "default"; + + wakeup-source; + }; + + touchpad@2c { + compatible =3D "hid-over-i2c"; + reg =3D <0x2c>; + + hid-descr-addr =3D <0x20>; + interrupts-extended =3D <&tlmm 3 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-0 =3D <&tpad_default>; + pinctrl-names =3D "default"; + + wakeup-source; + }; +}; + +&i2c1 { + clock-frequency =3D <400000>; + + status =3D "okay"; +}; + +&i2c3 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + typec-mux@8 { + compatible =3D "parade,ps8830"; + reg =3D <0x8>; + + clocks =3D <&rpmhcc RPMH_RF_CLK3>; + + vdd-supply =3D <&vreg_rtmr0_1p15>; + vdd33-supply =3D <&vreg_rtmr0_3p3>; + vdd33-cap-supply =3D <&vreg_rtmr0_3p3>; + vddar-supply =3D <&vreg_rtmr0_1p15>; + vddat-supply =3D <&vreg_rtmr0_1p15>; + vddio-supply =3D <&vreg_rtmr0_1p8>; + + reset-gpios =3D <&pm8550_gpios 10 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&rtmr0_default>; + pinctrl-names =3D "default"; + + retimer-switch; + orientation-switch; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + retimer_ss0_ss_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss0_ss_in>; + }; + }; + + port@1 { + reg =3D <1>; + + retimer_ss0_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss0_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + retimer_ss0_con_sbu_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss0_con_sbu_in>; + }; + }; + }; + }; +}; + +&i2c4 { + clock-frequency =3D <400000>; + + status =3D "okay"; +}; + +&i2c5 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + /* Type A Port */ + eusb3_typea_repeater: redriver@43 { + compatible =3D "nxp,ptn3222"; + reg =3D <0x43>; + #phy-cells =3D <0>; + + vdd3v3-supply =3D <&vreg_l13b_3p0>; + vdd1v8-supply =3D <&vreg_l4b_1p8>; + + reset-gpios =3D <&tlmm 6 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&eusb3_reset_n>; + pinctrl-names =3D "default"; + }; + + /* Fingerprint scanner */ + eusb5_frp_repeater: redriver@4f { + compatible =3D "nxp,ptn3222"; + reg =3D <0x4f>; + #phy-cells =3D <0>; + + vdd3v3-supply =3D <&vreg_l13b_3p0>; + vdd1v8-supply =3D <&vreg_l4b_1p8>; + + reset-gpios =3D <&tlmm 184 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&eusb5_reset_n>; + pinctrl-names =3D "default"; + }; +}; + +&i2c7 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + typec-mux@8 { + compatible =3D "parade,ps8830"; + reg =3D <0x8>; + + clocks =3D <&rpmhcc RPMH_RF_CLK4>; + + vdd-supply =3D <&vreg_rtmr1_1p15>; + vdd33-supply =3D <&vreg_rtmr1_3p3>; + vdd33-cap-supply =3D <&vreg_rtmr1_3p3>; + vddar-supply =3D <&vreg_rtmr1_1p15>; + vddat-supply =3D <&vreg_rtmr1_1p15>; + vddio-supply =3D <&vreg_rtmr1_1p8>; + + reset-gpios =3D <&tlmm 176 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&rtmr1_default>; + pinctrl-names =3D "default"; + + retimer-switch; + orientation-switch; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + retimer_ss1_ss_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss1_ss_in>; + }; + }; + + port@1 { + reg =3D <1>; + + retimer_ss1_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss1_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + retimer_ss1_con_sbu_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss1_con_sbu_in>; + }; + }; + }; + }; +}; + +&i2c8 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + /* LXST2021 */ + touchscreen@9 { + compatible =3D "hid-over-i2c"; + reg =3D <0x09>; + + hid-descr-addr =3D <0x1>; + interrupts-extended =3D <&tlmm 51 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-0 =3D <&ts0_default>; + pinctrl-names =3D "default"; + }; +}; + +&i2c20 { + clock-frequency =3D <400000>; + + status =3D "okay"; +}; + +&mdss { + status =3D "okay"; +}; + +&mdss_dp0 { + status =3D "okay"; +}; + +&mdss_dp0_out { + data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp1 { + status =3D "okay"; +}; + +&mdss_dp1_out { + data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp3 { + /delete-property/ #sound-dai-cells; + + status =3D "okay"; + + aux-bus { + panel { + compatible =3D "edp-panel"; + enable-gpios =3D <&tlmm 74 GPIO_ACTIVE_HIGH>; + power-supply =3D <&vreg_edp_3p3>; + + pinctrl-0 =3D <&edp_bl_en>; + pinctrl-names =3D "default"; + + port { + edp_panel_in: endpoint { + remote-endpoint =3D <&mdss_dp3_out>; + }; + }; + }; + }; + + ports { + port@1 { + reg =3D <1>; + + mdss_dp3_out: endpoint { + data-lanes =3D <0 1 2 3>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000= 00000>; + + remote-endpoint =3D <&edp_panel_in>; + }; + }; + }; +}; + +&mdss_dp3_phy { + vdda-phy-supply =3D <&vreg_l3j_0p8>; + vdda-pll-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&pcie4 { + perst-gpios =3D <&tlmm 146 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 148 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&pcie4_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie4_phy { + vdda-phy-supply =3D <&vreg_l3i_0p8>; + vdda-pll-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&pcie4_port0 { + wifi@0 { + compatible =3D "pci17cb,1107"; + reg =3D <0x10000 0x0 0x0 0x0 0x0>; + + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p8>; + vddpcie0p9-supply =3D <&vreg_pmu_pcie_0p9>; + vddpcie1p8-supply =3D <&vreg_pmu_pcie_1p8>; + }; +}; + +&pcie6a { + perst-gpios =3D <&tlmm 152 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 154 GPIO_ACTIVE_LOW>; + + vddpe-3v3-supply =3D <&vreg_nvme>; + + pinctrl-0 =3D <&pcie6a_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie6a_phy { + vdda-phy-supply =3D <&vreg_l1d_0p8>; + vdda-pll-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&pm8550_gpios { + rtmr0_default: rtmr0-reset-n-active-state { + pins =3D "gpio10"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; + + usb0_3p3_reg_en: usb0-3p3-reg-en-state { + pins =3D "gpio11"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; +}; + +&pm8550ve_9_gpios { + usb0_1p8_reg_en: usb0-1p8-reg-en-state { + pins =3D "gpio8"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; +}; + +&pmc8380_5_gpios { + usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state { + pins =3D "gpio8"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; +}; + +&qupv3_0 { + status =3D "okay"; +}; + +&qupv3_1 { + status =3D "okay"; +}; + +&qupv3_2 { + status =3D "okay"; +}; + +&remoteproc_adsp { + firmware-name =3D "qcom/x1e80100/dell/latitude-7455/qcadsp8380.mbn", + "qcom/x1e80100/dell/latitude-7455/adsp_dtbs.elf"; + + status =3D "okay"; +}; + +&remoteproc_cdsp { + firmware-name =3D "qcom/x1e80100/dell/latitude-7455/qccdsp8380.mbn", + "qcom/x1e80100/dell/latitude-7455/cdsp_dtbs.elf"; + + status =3D "okay"; +}; + +&sdhc_2 { + cd-gpios =3D <&tlmm 71 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&sdc2_default &sdc2_card_det_n>; + pinctrl-1 =3D <&sdc2_sleep &sdc2_card_det_n>; + pinctrl-names =3D "default", "sleep"; + vmmc-supply =3D <&vreg_l9b_2p9>; + vqmmc-supply =3D <&vreg_l6b_1p8>; + bus-width =3D <4>; + no-sdio; + no-mmc; + status =3D "okay"; +}; + +&smb2360_0 { + status =3D "okay"; +}; + +&smb2360_0_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l2b_3p0>; +}; + +&smb2360_1 { + status =3D "okay"; +}; + +&smb2360_1_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l14b_3p0>; +}; + +&tlmm { + gpio-reserved-ranges =3D <44 4>, /* SPI11 (TPM) */ + <76 4>, /* SPI19 (TZ Protected) */ + <238 1>; /* UFS Reset */ + + cam_rgb_default: cam-rgb-default-state { + mclk-pins { + pins =3D "gpio100"; + function =3D "cam_aon"; + drive-strength =3D <16>; + bias-disable; + }; + + reset-n-pins { + pins =3D "gpio237"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + }; + + cam_indicator_en: cam-indicator-en-state { + pins =3D "gpio110"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + cam_ldo_en: cam-ldo-en-state { + pins =3D "gpio91"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + edp_bl_en: edp-bl-en-state { + pins =3D "gpio74"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + edp_reg_en: edp-reg-en-state { + pins =3D "gpio70"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + }; + + eusb3_reset_n: eusb3-reset-n-state { + pins =3D "gpio6"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + output-low; + }; + + eusb5_reset_n: eusb5-reset-n-state { + pins =3D "gpio184"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + output-low; + }; + + hall_int_n_default: hall-int-n-state { + pins =3D "gpio92"; + function =3D "gpio"; + + bias-disable; + }; + + kybd_default: kybd-default-state { + pins =3D "gpio67"; + function =3D "gpio"; + bias-pull-up; + }; + + nvme_reg_en: nvme-reg-en-state { + pins =3D "gpio18"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + pcie4_default: pcie4-default-state { + clkreq-n-pins { + pins =3D "gpio147"; + function =3D "pcie4_clk"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio146"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio148"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + pcie6a_default: pcie6a-default-state { + clkreq-n-pins { + pins =3D "gpio153"; + function =3D "pcie6a_clk"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio152"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio154"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + rtmr1_default: rtmr1-reset-n-active-state { + pins =3D "gpio176"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + sdc2_card_det_n: sdc2-card-det-state { + pins =3D "gpio71"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + + tpad_default: tpad-default-state { + disable-pins { + pins =3D "gpio38"; + function =3D "gpio"; + output-high; + }; + + int-n-pins { + pins =3D "gpio3"; + function =3D "gpio"; + bias-pull-up; + }; + + reset-n-pins { + pins =3D "gpio52"; + function =3D "gpio"; + bias-disable; + }; + }; + + ts0_default: ts0-default-state { + disable-pins { + pins =3D "gpio75"; + function =3D "gpio"; + output-high; + }; + + int-n-pins { + pins =3D "gpio51"; + function =3D "gpio"; + bias-pull-up; + }; + + reset-n-pins { + /* Technically should be High-Z input */ + pins =3D "gpio48"; + function =3D "gpio"; + output-low; + drive-strength =3D <2>; + }; + }; + + usb1_pwr_1p15_reg_en: usb1-pwr-1p15-reg-en-state { + pins =3D "gpio188"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb1_pwr_1p8_reg_en: usb1-pwr-1p8-reg-en-state { + pins =3D "gpio175"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb1_pwr_3p3_reg_en: usb1-pwr-3p3-reg-en-state { + pins =3D "gpio186"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wcn_sw_en: wcn-sw-en-state { + pins =3D "gpio214"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wcn_wlan_bt_en: wcn-wlan-bt-en-state { + pins =3D "gpio116", "gpio117"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; +}; + +&uart14 { + status =3D "okay"; + + bluetooth { + compatible =3D "qcom,wcn7850-bt"; + max-speed =3D <3200000>; + + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p8>; + }; +}; + +&usb_1_ss0_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + phys =3D <&smb2360_0_eusb2_repeater>; + + status =3D "okay"; +}; + +&usb_1_ss0_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l1j_0p8>; + + status =3D "okay"; +}; + +&usb_1_ss0 { + status =3D "okay"; +}; + +&usb_1_ss0_dwc3 { + dr_mode =3D "host"; +}; + +&usb_1_ss0_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss0_hs_in>; +}; + +&usb_1_ss0_qmpphy_out { + remote-endpoint =3D <&retimer_ss0_ss_in>; +}; + +&usb_1_ss1_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + phys =3D <&smb2360_1_eusb2_repeater>; + + status =3D "okay"; +}; + +&usb_1_ss1_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l2d_0p9>; + + status =3D "okay"; +}; + +&usb_1_ss1 { + status =3D "okay"; +}; + +&usb_1_ss1_dwc3 { + dr_mode =3D "host"; +}; + +&usb_1_ss1_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss1_hs_in>; +}; + +&usb_1_ss1_qmpphy_out { + remote-endpoint =3D <&retimer_ss1_ss_in>; +}; + +&usb_2 { + status =3D "okay"; +}; + +&usb_2_dwc3 { + dr_mode =3D "host"; +}; + +&usb_2_hsphy { + vdd-supply =3D <&vreg_l2e_0p8>; + vdda12-supply =3D <&vreg_l3e_1p2>; + + phys =3D <&eusb5_frp_repeater>; + + status =3D "okay"; +}; + +&usb_mp { + status =3D "okay"; +}; + +&usb_mp_dwc3 { + phys =3D <&usb_mp_hsphy0>, <&usb_mp_qmpphy0>; + phy-names =3D "usb2-0", "usb3-0"; +}; + +&usb_mp_hsphy0 { + vdd-supply =3D <&vreg_l2e_0p8>; + vdda12-supply =3D <&vreg_l3e_1p2>; + + phys =3D <&eusb3_typea_repeater>; + + status =3D "okay"; +}; + +&usb_mp_qmpphy0 { + vdda-phy-supply =3D <&vreg_l3e_1p2>; + vdda-pll-supply =3D <&vreg_l3c_0p8>; + + status =3D "okay"; +}; --=20 2.49.0 From nobody Sun Feb 8 14:38:49 2026 Received: from out-181.mta0.migadu.com (out-181.mta0.migadu.com [91.218.175.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C5611D47B4 for ; Sun, 25 May 2025 09:55:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748166945; cv=none; b=En2ydYXOBPyeSEYYgeLY38iuMQJrVGDi2kFVpFf9wMoeJRgyuxgqmxhXI1+7ygF+0KtUDkLMLRFET3j+opV36zcrYHy+kijPXZYnmV+I/RPqXXOR5Y/xyWN2twkqeWI2wev+sds2WcOL5SHQ9epU/wRzsQYug1WpwSSbfCGhCzo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748166945; c=relaxed/simple; bh=SsWCsaTwRZqs68+Glbe46xtIRdbeOyelv0DnKF+MkjM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Bu1k/gjswQn1zk/PeFA3f0rPdkDAAJAS+zJp/UgK5Y3AJUC4E8pHfXOL5uUtZ1q/OGwkMwODzcLlA8g3M0xH7fe/VzmCvIAnDPFS7aRaTA05Rff1pyPGzfGe5rNZA4Vp56T2HGKmSGsuQS2jc+gKLHWYqXItJgVM4yqBu5cuvyk= ARC-Authentication-Results: i=1; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1748166941; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=HFG28AXljMj0pG+QxD5VLHaTyFSd5w20nyiugUfeqN4=; b=TwLfEerM6CNKDBHRYWpT/vWfRw8c1GP/tjP/GJPKf2od24thxZscLIjWyKjb2Fh/q81IcB fP50ft1WsxAD+1thLRNK1w9+MDnrnhj6rdW0ojlnpHcQ1CDpuGD0eHVdkppzsQ2b+k7CdO DSv0inyl14TeWna7SMY1T1kjXqsCCeVgom3WiqrFEVhNfEgkxg3JCX9FehIt2jNK1r7Ks4 DElun2G7o+rWISSUkJwYTN9x8g1TG9EgA19skt0KRvLfUqGoE+qDhdW3GBhyBAtTcqd0XM rqCRo9wvQPlN9rVbs9kXh56U0b8YQuU+SEDcc9ygY17RS3mmea2tIR6gnMiNNA== From: Val Packett To: Bjorn Andersson , Konrad Dybcio Cc: Val Packett , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/4] firmware: qcom: scm: Allow QSEECOM on Dell Latitude 7455 Date: Sun, 25 May 2025 06:53:35 -0300 Message-ID: <20250525095341.12462-5-val@packett.cool> In-Reply-To: <20250525095341.12462-2-val@packett.cool> References: <20250525095341.12462-2-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Allow this machine to access efivars through qseecom/uefisecapp. Signed-off-by: Val Packett Reviewed-by: Dmitry Baryshkov --- drivers/firmware/qcom/qcom_scm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_= scm.c index f63b716be5b0..e01ce1e37459 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -1988,6 +1988,7 @@ static const struct of_device_id qcom_scm_qseecom_all= owlist[] __maybe_unused =3D { { .compatible =3D "asus,vivobook-s15" }, { .compatible =3D "asus,zenbook-a14-ux3407qa" }, { .compatible =3D "asus,zenbook-a14-ux3407ra" }, + { .compatible =3D "dell,latitude-7455" }, { .compatible =3D "dell,xps13-9345" }, { .compatible =3D "hp,elitebook-ultra-g1q" }, { .compatible =3D "hp,omnibook-x14" }, --=20 2.49.0 From nobody Sun Feb 8 14:38:49 2026 Received: from out-184.mta0.migadu.com (out-184.mta0.migadu.com [91.218.175.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9A4981D47B4 for ; Sun, 25 May 2025 09:55:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748166956; cv=none; b=iiMlbyHQE634PByD18duRIgkLaY3gakV3scdgx99sJUY5I7Irmm2/KZvvLzLrSYgNU62TaEy7xXBt6v8e0IdPs3ZIh/h2VAlbJNPnvGfqx8vIJeXMwPt1YU8KcB3v5Ocp60GgFhAG0qT02Y9Y5Ifp9oUT4D5Y1YNPLXI7OD/8ps= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748166956; c=relaxed/simple; bh=NQP7jqFUEh4B5N7CPMMbSmLmin4zYEpjxuKWftdQM3k=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nuT+uXxciNQFX3E0/Jl4nv+TnfIyNYatfGaAFc2yYbKAuTZekraMYIfq2lWMFFfN7PJ0tP1NeHzDypWy0IpFvr8alaCE9fkU06I/eKHRim3PGTcyAOlIvj3iSnMPpGWoosUeLZn3W999+p+/y41BVdsfvUKVWTJ/yAgczh4O/6M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=pwoYNqk3; arc=none smtp.client-ip=91.218.175.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="pwoYNqk3" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1748166951; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ZrfySnnJmJf8OR0WcIjvlJn/uez+04v8Z2OdLalAhPE=; b=pwoYNqk3SKEZYb8xaXXifHMpsKCZv9lOGhdaapKJt0RKxp9JiE9iBaQt2Gj5leL7jWhniw WfT4kOeNCTjxTZlWtaA4dj/M5g9Ab/ALWdRIdaPnt5uyLYaG4jClSmZfHIivFTzQAX558l xWbAis92MJNKTQcTVtzeOVguQvb15HYRnZ5gOSOtpUJMq+zSZHLlLaQi1ji2wMgCQAAs2k IefmJ4ch/khK8iwkGczex3FLekWbWouOdVggWHwwzqZQnwq/bI+EBoca85sv6H0pJvFv1/ CTGFOhsv2WI6I9dD7y7CyVnsbj/aU0nF4xv6OkGjwLyzHazqLRFtIcecmGWksw== From: Val Packett To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: Val Packett , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] drm/panel-edp: Add BOE NE14QDM panel for Dell Latitude 7455 Date: Sun, 25 May 2025 06:53:36 -0300 Message-ID: <20250525095341.12462-6-val@packett.cool> In-Reply-To: <20250525095341.12462-2-val@packett.cool> References: <20250525095341.12462-2-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Cannot confirm which variant exactly it is, as the EDID alphanumeric data contains '0RGNR' <0x80> 'NE14QDM' and ends there; but it's 60 Hz and with touch. I do not have access to datasheets for these panels, so the timing is a guess that was tested to work fine on this laptop. Signed-off-by: Val Packett --- drivers/gpu/drm/panel/panel-edp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/pane= l-edp.c index 90e8c154a978..ec7c1e21f2d2 100644 --- a/drivers/gpu/drm/panel/panel-edp.c +++ b/drivers/gpu/drm/panel/panel-edp.c @@ -1937,6 +1937,7 @@ static const struct edp_panel_entry edp_panels[] =3D { EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ac5, &delay_200_500_e50, "NV116WHM-N4C"= ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ae8, &delay_200_500_e50_p2e80, "NV140WU= M-N41"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b09, &delay_200_500_e50_po2e200, "NV140= FHM-NZ"), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b1e, &delay_200_500_e80, "NE140QDM-N6A"= ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b34, &delay_200_500_e80, "NV122WUM-N41"= ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b43, &delay_200_500_e200, "NV140FHM-T09= "), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b56, &delay_200_500_e80, "NT140FHM-N47"= ), --=20 2.49.0