From nobody Fri Dec 19 16:23:04 2025 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A10814D2BB; Sat, 24 May 2025 10:56:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748084220; cv=none; b=YX2+m56fCbMplqo/gtb5iekbAYduDwDhGUa7MeRdFf9xH3UXyE+W8xqdxI7z4ijrVjrOMaFrEozGMVTp5r0bHVMa8mvVlNs9ok8fibJBLVmweVlA+DdwTp5zNvx9qpH06m+EQwmtoY6ksGw4Fzttp96ZmvDUlS/rL2jo17phx/k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748084220; c=relaxed/simple; bh=mlxZtmJbqMCArXbNcY7NRtF0iFLzypoQS3dHJV1QigI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=W7NCu5Pyy4yofySLt5bqsc6WrO1z19bbQG/aUebN762nDvM72OjV5fyFHpDvOCSjQOuYvoNkVH613DOm5tvbe7TacImBzWMP6It+pzePBy1dGY331Thof8vkjOtyGl+oh8WmNg8u7woUL0WBjHG2XUXMplofON0NVxfvv0N9Zjw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=KAPBfxGb; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="KAPBfxGb" Received: by mail.gandi.net (Postfix) with ESMTPSA id F3E30432BF; Sat, 24 May 2025 10:56:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1748084215; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ChrbD5QFVjjLgqGv0Lzs18RnsBwvGV4rrbp1Q9UZJ/A=; b=KAPBfxGbaCFGypk7LR0Ht3Y0fhkhiQrfBO/JyPRf2wsBoXPVrrogFfwDgz1CvLvZB0gPGt JQVtvtS7u9EL4bTtiTH4FKEgeJOMBi4guql6kHj2aXIhRY1DR2Yf6n5q9xqkhjVMt9tkte TrEQrQKVY3PSGaGtlct5n4r20kXzVukT0J3anbKzeHjjv7mcQLhyCKvSZaLPqX+hs1Np3H 4AlHeb+M42TnzSS5whV/xaLq/Px9bE80m8SlZZmXwbfxDdVaRGWnmNe5tM1p7so1jOkHHh 7Pjf4fPj0HEL4gGlX1rPik/yL1Q8BW9Ea9uNiokNfqN2GdKgHnHS6KLSOVK6AA== From: Kory Maincent Date: Sat, 24 May 2025 12:56:03 +0200 Subject: [PATCH net-next v12 01/13] net: pse-pd: Introduce attached_phydev to pse control Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250524-feature_poe_port_prio-v12-1-d65fd61df7a7@bootlin.com> References: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> In-Reply-To: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Krzysztof Kozlowski , Conor Dooley Cc: Liam Girdwood , Mark Brown , Thomas Petazzoni , netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, "Kory Maincent (Dent Project)" X-Mailer: b4 0.15-dev-8cb71 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtddtgdduudehgeculddtuddrgeefvddrtddtmdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpefmohhrhicuofgrihhntggvnhhtuceokhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepvefgvdfgkeetgfefgfegkedugffghfdtffeftdeuteehjedtvdelvddvleehtdevnecukfhppedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikeenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepihhnvghtpedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikedphhgvlhhopegluddvjedrtddruddrudgnpdhmrghilhhfrhhomhepkhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepvdejpdhrtghpthhtohepkhihlhgvrdhsfigvnhhsohhnsegvshhtrdhtvggthhdprhgtphhtthhopegurghvvghmsegurghvvghmlhhofhhtrdhnvghtpdhrtghpthhtoheptghonhhorhdoughtsehkvghrnhgvlhdrohhrghdprhgtp hhtthhopehlihhnuhigqdhkvghrnhgvlhesvhhgvghrrdhkvghrnhgvlhdrohhrghdprhgtphhtthhopehkohhrhidrmhgrihhntggvnhhtsegsohhothhlihhnrdgtohhmpdhrtghpthhtoheptghorhgsvghtsehlfihnrdhnvghtpdhrtghpthhtoheprghnughrvgifsehluhhnnhdrtghhpdhrtghpthhtoheprghnughrvgifodhnvghtuggvvheslhhunhhnrdgthh X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) In preparation for reporting PSE events via ethtool notifications, introduce an attached_phydev field in the pse_control structure. This field stores the phy_device associated with the PSE PI, ensuring that notifications are sent to the correct network interface. The attached_phydev pointer is directly tied to the PHY lifecycle. It is set when the PHY is registered and cleared when the PHY is removed. There is no need to use a refcount, as doing so could interfere with the PHY removal process. Signed-off-by: Kory Maincent Reviewed-by: Oleksij Rempel --- Change in v11: - New patch due to a split of the next patch. --- drivers/net/mdio/fwnode_mdio.c | 26 ++++++++++++++------------ drivers/net/pse-pd/pse_core.c | 11 ++++++++--- include/linux/pse-pd/pse.h | 6 ++++-- 3 files changed, 26 insertions(+), 17 deletions(-) diff --git a/drivers/net/mdio/fwnode_mdio.c b/drivers/net/mdio/fwnode_mdio.c index aea0f0357568..9b41d4697a40 100644 --- a/drivers/net/mdio/fwnode_mdio.c +++ b/drivers/net/mdio/fwnode_mdio.c @@ -18,7 +18,8 @@ MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("FWNODE MDIO bus (Ethernet PHY) accessors"); =20 static struct pse_control * -fwnode_find_pse_control(struct fwnode_handle *fwnode) +fwnode_find_pse_control(struct fwnode_handle *fwnode, + struct phy_device *phydev) { struct pse_control *psec; struct device_node *np; @@ -30,7 +31,7 @@ fwnode_find_pse_control(struct fwnode_handle *fwnode) if (!np) return NULL; =20 - psec =3D of_pse_control_get(np); + psec =3D of_pse_control_get(np, phydev); if (PTR_ERR(psec) =3D=3D -ENOENT) return NULL; =20 @@ -128,15 +129,9 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus, u32 phy_id; int rc; =20 - psec =3D fwnode_find_pse_control(child); - if (IS_ERR(psec)) - return PTR_ERR(psec); - mii_ts =3D fwnode_find_mii_timestamper(child); - if (IS_ERR(mii_ts)) { - rc =3D PTR_ERR(mii_ts); - goto clean_pse; - } + if (IS_ERR(mii_ts)) + return PTR_ERR(mii_ts); =20 is_c45 =3D fwnode_device_is_compatible(child, "ethernet-phy-ieee802.3-c45= "); if (is_c45 || fwnode_get_phy_id(child, &phy_id)) @@ -169,6 +164,12 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus, goto clean_phy; } =20 + psec =3D fwnode_find_pse_control(child, phy); + if (IS_ERR(psec)) { + rc =3D PTR_ERR(psec); + goto unregister_phy; + } + phy->psec =3D psec; =20 /* phy->mii_ts may already be defined by the PHY driver. A @@ -180,12 +181,13 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus, =20 return 0; =20 +unregister_phy: + if (is_acpi_node(child) || is_of_node(child)) + phy_device_remove(phy); clean_phy: phy_device_free(phy); clean_mii_ts: unregister_mii_timestamper(mii_ts); -clean_pse: - pse_control_put(psec); =20 return rc; } diff --git a/drivers/net/pse-pd/pse_core.c b/drivers/net/pse-pd/pse_core.c index 4602e26eb8c8..4610c1f0ddd6 100644 --- a/drivers/net/pse-pd/pse_core.c +++ b/drivers/net/pse-pd/pse_core.c @@ -23,6 +23,7 @@ static LIST_HEAD(pse_controller_list); * @list: list entry for the pcdev's PSE controller list * @id: ID of the PSE line in the PSE controller device * @refcnt: Number of gets of this pse_control + * @attached_phydev: PHY device pointer attached by the PSE control */ struct pse_control { struct pse_controller_dev *pcdev; @@ -30,6 +31,7 @@ struct pse_control { struct list_head list; unsigned int id; struct kref refcnt; + struct phy_device *attached_phydev; }; =20 static int of_load_single_pse_pi_pairset(struct device_node *node, @@ -599,7 +601,8 @@ void pse_control_put(struct pse_control *psec) EXPORT_SYMBOL_GPL(pse_control_put); =20 static struct pse_control * -pse_control_get_internal(struct pse_controller_dev *pcdev, unsigned int in= dex) +pse_control_get_internal(struct pse_controller_dev *pcdev, unsigned int in= dex, + struct phy_device *phydev) { struct pse_control *psec; int ret; @@ -638,6 +641,7 @@ pse_control_get_internal(struct pse_controller_dev *pcd= ev, unsigned int index) psec->pcdev =3D pcdev; list_add(&psec->list, &pcdev->pse_control_head); psec->id =3D index; + psec->attached_phydev =3D phydev; kref_init(&psec->refcnt); =20 return psec; @@ -693,7 +697,8 @@ static int psec_id_xlate(struct pse_controller_dev *pcd= ev, return pse_spec->args[0]; } =20 -struct pse_control *of_pse_control_get(struct device_node *node) +struct pse_control *of_pse_control_get(struct device_node *node, + struct phy_device *phydev) { struct pse_controller_dev *r, *pcdev; struct of_phandle_args args; @@ -743,7 +748,7 @@ struct pse_control *of_pse_control_get(struct device_no= de *node) } =20 /* pse_list_mutex also protects the pcdev's pse_control list */ - psec =3D pse_control_get_internal(pcdev, psec_id); + psec =3D pse_control_get_internal(pcdev, psec_id, phydev); =20 out: mutex_unlock(&pse_list_mutex); diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index c773eeb92d04..8b0866fad2ad 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -250,7 +250,8 @@ struct device; int devm_pse_controller_register(struct device *dev, struct pse_controller_dev *pcdev); =20 -struct pse_control *of_pse_control_get(struct device_node *node); +struct pse_control *of_pse_control_get(struct device_node *node, + struct phy_device *phydev); void pse_control_put(struct pse_control *psec); =20 int pse_ethtool_get_status(struct pse_control *psec, @@ -268,7 +269,8 @@ bool pse_has_c33(struct pse_control *psec); =20 #else =20 -static inline struct pse_control *of_pse_control_get(struct device_node *n= ode) +static inline struct pse_control *of_pse_control_get(struct device_node *n= ode, + struct phy_device *phydev) { return ERR_PTR(-ENOENT); } --=20 2.43.0 From nobody Fri Dec 19 16:23:04 2025 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CEF1A1DF985; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250524-feature_poe_port_prio-v12-2-d65fd61df7a7@bootlin.com> References: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> In-Reply-To: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Krzysztof Kozlowski , Conor Dooley Cc: Liam Girdwood , Mark Brown , Thomas Petazzoni , netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, "Kory Maincent (Dent Project)" X-Mailer: b4 0.15-dev-8cb71 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtddtgdduudehgeculddtuddrgeefvddrtddtmdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpefmohhrhicuofgrihhntggvnhhtuceokhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepvefgvdfgkeetgfefgfegkedugffghfdtffeftdeuteehjedtvdelvddvleehtdevnecukfhppedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikeenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepihhnvghtpedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikedphhgvlhhopegluddvjedrtddruddrudgnpdhmrghilhhfrhhomhepkhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepvdejpdhrtghpthhtohepkhihlhgvrdhsfigvnhhsohhnsegvshhtrdhtvggthhdprhgtphhtthhopegurghvvghmsegurghvvghmlhhofhhtrdhnvghtpdhrtghpthhtoheptghonhhorhdoughtsehkvghrnhgvlhdrohhrghdprhgtp hhtthhopehlihhnuhigqdhkvghrnhgvlhesvhhgvghrrdhkvghrnhgvlhdrohhrghdprhgtphhtthhopehkohhrhidrmhgrihhntggvnhhtsegsohhothhlihhnrdgtohhmpdhrtghpthhtoheptghorhgsvghtsehlfihnrdhnvghtpdhrtghpthhtoheprghnughrvgifsehluhhnnhdrtghhpdhrtghpthhtoheprghnughrvgifodhnvghtuggvvheslhhunhhnrdgthh X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) Add support for devm_pse_irq_helper() to register PSE interrupts and report events such as over-current or over-temperature conditions. This follows a similar approach to the regulator API but also sends notifications using a dedicated PSE ethtool netlink socket. Signed-off-by: Kory Maincent (Dent Project) Reviewed-by: Oleksij Rempel --- Change in v12: - Rebase on net next. Change in v11: - Split the part that add attached_phydev to another patch. - Fully describe the PSE events in the ethtool spec. - Made small fixes reported by Jakub in the ethnl_pse_send_ntf. Change in v10: - Removed Oleksij reviewed-by due to few code change. - Take a reference of the netdev pointer to avoid any use after free in the ethnl_pse_send_ntf function. Change in v9: - Add a missing check after skb creation. Change in v7: - Use flags definition for pse events in ethtool specs. - Change irq name by prepending the device name. Change in v6: - Update pse-ntf netlink to u32 instead of bitset. - Update commit message. Change in v4: - Fix netlink notification message issues. - Use netlink bitset in ethtool_pse_send_ntf. - Add kdoc. Change in v3: - Remove C33 prefix when it is not in the standards. - Fix pse_to_regulator_notifs which could not report regulator events together. - Fix deadlock issue. - Save interrupt in pcdev structure for later use. Change in v2: - Add support for PSE ethtool notification. - Saved the attached phy_device in the pse_control structure to know which interface should have the notification. - Rethink devm_pse_irq_helper() without devm_regulator_irq_helper() call. --- Documentation/netlink/specs/ethtool.yaml | 34 +++++ Documentation/networking/ethtool-netlink.rst | 19 +++ drivers/net/pse-pd/pse_core.c | 180 +++++++++++++++++++++= ++++ include/linux/ethtool_netlink.h | 9 ++ include/linux/pse-pd/pse.h | 20 +++ include/uapi/linux/ethtool_netlink_generated.h | 19 +++ net/ethtool/pse-pd.c | 38 ++++++ 7 files changed, 319 insertions(+) diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netli= nk/specs/ethtool.yaml index 9f98715a6512..09da7702ce5b 100644 --- a/Documentation/netlink/specs/ethtool.yaml +++ b/Documentation/netlink/specs/ethtool.yaml @@ -116,6 +116,17 @@ definitions: doc: | Hardware timestamp comes from one PHY device of the network topology + - + name: pse-event + doc: PSE event list for the PSE controller + type: flags + entries: + - + name: over-current + doc: PSE output current is too high + - + name: over-temp + doc: PSE in over temperature state =20 attribute-sets: - @@ -1553,6 +1564,19 @@ attribute-sets: name: hwtstamp-flags type: nest nested-attributes: bitset + - + name: pse-ntf + attr-cnt-name: --ethtool-a-pse-ntf-cnt + attributes: + - + name: header + type: nest + nested-attributes: header + - + name: events + type: uint + enum: pse-event + doc: List of events reported by the PSE controller =20 operations: enum-model: directional @@ -2411,3 +2435,13 @@ operations: attributes: *tsconfig reply: attributes: *tsconfig + - + name: pse-ntf + doc: Notification for PSE events. + + attribute-set: pse-ntf + + event: + attributes: + - header + - events diff --git a/Documentation/networking/ethtool-netlink.rst b/Documentation/n= etworking/ethtool-netlink.rst index b6e9af4d0f1b..433737865bc2 100644 --- a/Documentation/networking/ethtool-netlink.rst +++ b/Documentation/networking/ethtool-netlink.rst @@ -290,6 +290,7 @@ Kernel to userspace: ``ETHTOOL_MSG_PHY_NTF`` Ethernet PHY information change ``ETHTOOL_MSG_TSCONFIG_GET_REPLY`` hw timestamping configuration ``ETHTOOL_MSG_TSCONFIG_SET_REPLY`` new hw timestamping configurati= on + ``ETHTOOL_MSG_PSE_NTF`` PSE events notification =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 ``GET`` requests are sent by userspace applications to retrieve device @@ -1896,6 +1897,24 @@ various existing products that document power consum= ption in watts rather than classes. If power limit configuration based on classes is needed, the conversion can be done in user space, for example by ethtool. =20 +PSE_NTF +=3D=3D=3D=3D=3D=3D=3D + +Notify PSE events. + +Notification contents: + + =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + ``ETHTOOL_A_PSE_HEADER`` nested request header + ``ETHTOOL_A_PSE_EVENTS`` bitset PSE events + =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +When set, the optional ``ETHTOOL_A_PSE_EVENTS`` attribute identifies the +PSE events. + +.. kernel-doc:: include/uapi/linux/ethtool_netlink_generated.h + :identifiers: ethtool_pse_event + RSS_GET =3D=3D=3D=3D=3D=3D=3D =20 diff --git a/drivers/net/pse-pd/pse_core.c b/drivers/net/pse-pd/pse_core.c index 4610c1f0ddd6..a79dcab9c12e 100644 --- a/drivers/net/pse-pd/pse_core.c +++ b/drivers/net/pse-pd/pse_core.c @@ -7,10 +7,14 @@ =20 #include #include +#include #include +#include #include #include #include +#include +#include =20 static DEFINE_MUTEX(pse_list_mutex); static LIST_HEAD(pse_controller_list); @@ -210,6 +214,52 @@ static int of_load_pse_pis(struct pse_controller_dev *= pcdev) return ret; } =20 +/** + * pse_control_find_net_by_id - Find net attached to the pse control id + * @pcdev: a pointer to the PSE + * @id: index of the PSE control + * @tracker: refcount tracker used by netdev + * + * Return: net device pointer or NULL. The device returned has had a + * reference added and the pointer is safe until the user calls + * netdev_put() to indicate they have finished with it. + */ +static struct net_device * +pse_control_find_net_by_id(struct pse_controller_dev *pcdev, int id, + netdevice_tracker *tracker) +{ + struct pse_control *psec, *next; + + mutex_lock(&pse_list_mutex); + list_for_each_entry_safe(psec, next, &pcdev->pse_control_head, list) { + if (psec->id =3D=3D id) { + struct net_device *netdev =3D NULL; + struct phy_device *phydev; + + kref_get(&psec->refcnt); + /* Release the mutex before taking the rtnl lock + * to avoid deadlock in case of a pse_control_put + * call with the rtnl lock held. + */ + mutex_unlock(&pse_list_mutex); + /* Acquire rtnl to protect the net device + * reference get. + */ + rtnl_lock(); + phydev =3D psec->attached_phydev; + if (phydev->attached_dev) { + netdev =3D phydev->attached_dev; + netdev_hold(netdev, tracker, GFP_KERNEL); + } + rtnl_unlock(); + pse_control_put(psec); + return netdev; + } + } + mutex_unlock(&pse_list_mutex); + return NULL; +} + static int pse_pi_is_enabled(struct regulator_dev *rdev) { struct pse_controller_dev *pcdev =3D rdev_get_drvdata(rdev); @@ -559,6 +609,136 @@ int devm_pse_controller_register(struct device *dev, } EXPORT_SYMBOL_GPL(devm_pse_controller_register); =20 +struct pse_irq { + struct pse_controller_dev *pcdev; + struct pse_irq_desc desc; + unsigned long *notifs; +}; + +/** + * pse_to_regulator_notifs - Convert PSE notifications to Regulator + * notifications + * @notifs: PSE notifications + * + * Return: Regulator notifications + */ +static unsigned long pse_to_regulator_notifs(unsigned long notifs) +{ + unsigned long rnotifs =3D 0; + + if (notifs & ETHTOOL_PSE_EVENT_OVER_CURRENT) + rnotifs |=3D REGULATOR_EVENT_OVER_CURRENT; + if (notifs & ETHTOOL_PSE_EVENT_OVER_TEMP) + rnotifs |=3D REGULATOR_EVENT_OVER_TEMP; + + return rnotifs; +} + +/** + * pse_isr - IRQ handler for PSE + * @irq: irq number + * @data: pointer to user interrupt structure + * + * Return: irqreturn_t - status of IRQ + */ +static irqreturn_t pse_isr(int irq, void *data) +{ + struct netlink_ext_ack extack =3D {}; + struct pse_controller_dev *pcdev; + unsigned long notifs_mask =3D 0; + struct pse_irq_desc *desc; + struct pse_irq *h =3D data; + int ret, i; + + desc =3D &h->desc; + pcdev =3D h->pcdev; + + /* Clear notifs mask */ + memset(h->notifs, 0, pcdev->nr_lines * sizeof(*h->notifs)); + mutex_lock(&pcdev->lock); + ret =3D desc->map_event(irq, pcdev, h->notifs, ¬ifs_mask); + mutex_unlock(&pcdev->lock); + if (ret || !notifs_mask) + return IRQ_NONE; + + for_each_set_bit(i, ¬ifs_mask, pcdev->nr_lines) { + unsigned long notifs, rnotifs; + struct net_device *netdev; + netdevice_tracker tracker; + + /* Do nothing PI not described */ + if (!pcdev->pi[i].rdev) + continue; + + notifs =3D h->notifs[i]; + dev_dbg(h->pcdev->dev, + "Sending PSE notification EVT 0x%lx\n", notifs); + + netdev =3D pse_control_find_net_by_id(pcdev, i, &tracker); + if (netdev) + ethnl_pse_send_ntf(netdev, notifs, &extack); + netdev_put(netdev, &tracker); + rnotifs =3D pse_to_regulator_notifs(notifs); + regulator_notifier_call_chain(pcdev->pi[i].rdev, rnotifs, + NULL); + } + + return IRQ_HANDLED; +} + +/** + * devm_pse_irq_helper - Register IRQ based PSE event notifier + * @pcdev: a pointer to the PSE + * @irq: the irq value to be passed to request_irq + * @irq_flags: the flags to be passed to request_irq + * @d: PSE interrupt description + * + * Return: 0 on success and errno on failure + */ +int devm_pse_irq_helper(struct pse_controller_dev *pcdev, int irq, + int irq_flags, const struct pse_irq_desc *d) +{ + struct device *dev =3D pcdev->dev; + size_t irq_name_len; + struct pse_irq *h; + char *irq_name; + int ret; + + if (!d || !d->map_event || !d->name) + return -EINVAL; + + h =3D devm_kzalloc(dev, sizeof(*h), GFP_KERNEL); + if (!h) + return -ENOMEM; + + h->pcdev =3D pcdev; + h->desc =3D *d; + + /* IRQ name len is pcdev dev name + 5 char + irq desc name + 1 */ + irq_name_len =3D strlen(dev_name(pcdev->dev)) + 5 + strlen(d->name) + 1; + irq_name =3D devm_kzalloc(dev, irq_name_len, GFP_KERNEL); + if (!irq_name) + return -ENOMEM; + + snprintf(irq_name, irq_name_len, "pse-%s:%s", dev_name(pcdev->dev), + d->name); + + h->notifs =3D devm_kcalloc(dev, pcdev->nr_lines, + sizeof(*h->notifs), GFP_KERNEL); + if (!h->notifs) + return -ENOMEM; + + ret =3D devm_request_threaded_irq(dev, irq, NULL, pse_isr, + IRQF_ONESHOT | irq_flags, + irq_name, h); + if (ret) + dev_err(pcdev->dev, "Failed to request IRQ %d\n", irq); + + pcdev->irq =3D irq; + return ret; +} +EXPORT_SYMBOL_GPL(devm_pse_irq_helper); + /* PSE control section */ =20 static void __pse_control_release(struct kref *kref) diff --git a/include/linux/ethtool_netlink.h b/include/linux/ethtool_netlin= k.h index aba91335273a..bd65a478140a 100644 --- a/include/linux/ethtool_netlink.h +++ b/include/linux/ethtool_netlink.h @@ -43,6 +43,9 @@ void ethtool_aggregate_rmon_stats(struct net_device *dev, struct ethtool_rmon_stats *rmon_stats); bool ethtool_dev_mm_supported(struct net_device *dev); =20 +void ethnl_pse_send_ntf(struct net_device *netdev, unsigned long notif, + struct netlink_ext_ack *extack); + #else static inline int ethnl_cable_test_alloc(struct phy_device *phydev, u8 cmd) { @@ -120,6 +123,12 @@ static inline bool ethtool_dev_mm_supported(struct net= _device *dev) return false; } =20 +static inline void ethnl_pse_send_ntf(struct phy_device *phydev, + unsigned long notif, + struct netlink_ext_ack *extack) +{ +} + #endif /* IS_ENABLED(CONFIG_ETHTOOL_NETLINK) */ =20 static inline int ethnl_cable_test_result(struct phy_device *phydev, u8 pa= ir, diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index 8b0866fad2ad..6eb064722aa8 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -7,12 +7,15 @@ =20 #include #include +#include +#include =20 /* Maximum current in uA according to IEEE 802.3-2022 Table 145-1 */ #define MAX_PI_CURRENT 1920000 /* Maximum power in mW according to IEEE 802.3-2022 Table 145-16 */ #define MAX_PI_PW 99900 =20 +struct net_device; struct phy_device; struct pse_controller_dev; struct netlink_ext_ack; @@ -37,6 +40,19 @@ struct ethtool_c33_pse_pw_limit_range { u32 max; }; =20 +/** + * struct pse_irq_desc - notification sender description for IRQ based eve= nts. + * + * @name: the visible name for the IRQ + * @map_event: driver callback to map IRQ status into PSE devices with eve= nts. + */ +struct pse_irq_desc { + const char *name; + int (*map_event)(int irq, struct pse_controller_dev *pcdev, + unsigned long *notifs, + unsigned long *notifs_mask); +}; + /** * struct pse_control_config - PSE control/channel configuration. * @@ -228,6 +244,7 @@ struct pse_pi { * @types: types of the PSE controller * @pi: table of PSE PIs described in this controller device * @no_of_pse_pi: flag set if the pse_pis devicetree node is not used + * @irq: PSE interrupt */ struct pse_controller_dev { const struct pse_controller_ops *ops; @@ -241,6 +258,7 @@ struct pse_controller_dev { enum ethtool_pse_types types; struct pse_pi *pi; bool no_of_pse_pi; + int irq; }; =20 #if IS_ENABLED(CONFIG_PSE_CONTROLLER) @@ -249,6 +267,8 @@ void pse_controller_unregister(struct pse_controller_de= v *pcdev); struct device; int devm_pse_controller_register(struct device *dev, struct pse_controller_dev *pcdev); +int devm_pse_irq_helper(struct pse_controller_dev *pcdev, int irq, + int irq_flags, const struct pse_irq_desc *d); =20 struct pse_control *of_pse_control_get(struct device_node *node, struct phy_device *phydev); diff --git a/include/uapi/linux/ethtool_netlink_generated.h b/include/uapi/= linux/ethtool_netlink_generated.h index 9a02f579de22..3864aa0de8c7 100644 --- a/include/uapi/linux/ethtool_netlink_generated.h +++ b/include/uapi/linux/ethtool_netlink_generated.h @@ -49,6 +49,16 @@ enum hwtstamp_source { HWTSTAMP_SOURCE_PHYLIB, }; =20 +/** + * enum ethtool_pse_event - PSE event list for the PSE controller + * @ETHTOOL_PSE_EVENT_OVER_CURRENT: PSE output current is too high + * @ETHTOOL_PSE_EVENT_OVER_TEMP: PSE in over temperature state + */ +enum ethtool_pse_event { + ETHTOOL_PSE_EVENT_OVER_CURRENT =3D 1, + ETHTOOL_PSE_EVENT_OVER_TEMP =3D 2, +}; + enum { ETHTOOL_A_HEADER_UNSPEC, ETHTOOL_A_HEADER_DEV_INDEX, @@ -718,6 +728,14 @@ enum { ETHTOOL_A_TSCONFIG_MAX =3D (__ETHTOOL_A_TSCONFIG_CNT - 1) }; =20 +enum { + ETHTOOL_A_PSE_NTF_HEADER =3D 1, + ETHTOOL_A_PSE_NTF_EVENTS, + + __ETHTOOL_A_PSE_NTF_CNT, + ETHTOOL_A_PSE_NTF_MAX =3D (__ETHTOOL_A_PSE_NTF_CNT - 1) +}; + enum { ETHTOOL_MSG_USER_NONE =3D 0, ETHTOOL_MSG_STRSET_GET =3D 1, @@ -822,6 +840,7 @@ enum { ETHTOOL_MSG_PHY_NTF, ETHTOOL_MSG_TSCONFIG_GET_REPLY, ETHTOOL_MSG_TSCONFIG_SET_REPLY, + ETHTOOL_MSG_PSE_NTF, =20 __ETHTOOL_MSG_KERNEL_CNT, ETHTOOL_MSG_KERNEL_MAX =3D (__ETHTOOL_MSG_KERNEL_CNT - 1) diff --git a/net/ethtool/pse-pd.c b/net/ethtool/pse-pd.c index 4f6b99eab2a6..0e5d2095eeda 100644 --- a/net/ethtool/pse-pd.c +++ b/net/ethtool/pse-pd.c @@ -315,3 +315,41 @@ const struct ethnl_request_ops ethnl_pse_request_ops = =3D { .set =3D ethnl_set_pse, /* PSE has no notification */ }; + +void ethnl_pse_send_ntf(struct net_device *netdev, unsigned long notifs, + struct netlink_ext_ack *extack) +{ + void *reply_payload; + struct sk_buff *skb; + int reply_len; + int ret; + + if (!netdev || !notifs) + return; + + reply_len =3D ethnl_reply_header_size() + + nla_total_size(sizeof(u32)); /* _PSE_NTF_EVENTS */ + + skb =3D genlmsg_new(reply_len, GFP_KERNEL); + if (!skb) + return; + + reply_payload =3D ethnl_bcastmsg_put(skb, ETHTOOL_MSG_PSE_NTF); + if (!reply_payload) + goto err_skb; + + ret =3D ethnl_fill_reply_header(skb, netdev, ETHTOOL_A_PSE_NTF_HEADER); + if (ret < 0) + goto err_skb; + + if (nla_put_uint(skb, ETHTOOL_A_PSE_NTF_EVENTS, notifs)) + goto err_skb; + + genlmsg_end(skb, reply_payload); + ethnl_multicast(skb, netdev); + return; + +err_skb: + nlmsg_free(skb); +} +EXPORT_SYMBOL_GPL(ethnl_pse_send_ntf); --=20 2.43.0 From nobody Fri Dec 19 16:23:04 2025 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 73C981E1DF8; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250524-feature_poe_port_prio-v12-3-d65fd61df7a7@bootlin.com> References: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> In-Reply-To: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Krzysztof Kozlowski , Conor Dooley Cc: Liam Girdwood , Mark Brown , Thomas Petazzoni , netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, "Kory Maincent (Dent Project)" X-Mailer: b4 0.15-dev-8cb71 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtddtgdduudehgeculddtuddrgeefvddrtddtmdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpefmohhrhicuofgrihhntggvnhhtuceokhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepvefgvdfgkeetgfefgfegkedugffghfdtffeftdeuteehjedtvdelvddvleehtdevnecukfhppedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikeenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepihhnvghtpedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikedphhgvlhhopegluddvjedrtddruddrudgnpdhmrghilhhfrhhomhepkhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepvdejpdhrtghpthhtohepkhihlhgvrdhsfigvnhhsohhnsegvshhtrdhtvggthhdprhgtphhtthhopegurghvvghmsegurghvvghmlhhofhhtrdhnvghtpdhrtghpthhtoheptghonhhorhdoughtsehkvghrnhgvlhdrohhrghdprhgtp hhtthhopehlihhnuhigqdhkvghrnhgvlhesvhhgvghrrdhkvghrnhgvlhdrohhrghdprhgtphhtthhopehkohhrhidrmhgrihhntggvnhhtsegsohhothhlihhnrdgtohhmpdhrtghpthhtoheptghorhgsvghtsehlfihnrdhnvghtpdhrtghpthhtoheprghnughrvgifsehluhhnnhdrtghhpdhrtghpthhtoheprghnughrvgifodhnvghtuggvvheslhhunhhnrdgthh X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) Add support for PSE event reporting through interrupts. Set up the newly introduced devm_pse_irq_helper helper to register the interrupt. Events are reported for over-current and over-temperature conditions. Signed-off-by: Kory Maincent (Dent Project) Reviewed-by: Oleksij Rempel --- Change in v11: - Remove a potential infinite loop spotted by llm in tps23881_irq_handler. Change in v7: - Add a max irq retry limit to avoid infinite loop in the interrupt handler. Change in v4: - Small rename of a function. Change in v3: - Loop over interruption register to be sure the interruption pin is freed before exiting the interrupt handler function. - Add exist variable to not report event for undescribed PIs. - Used helpers to convert the chan number to the PI port number. Change in v2: - Remove support for OSS pin and TPC23881 specific port priority management --- drivers/net/pse-pd/tps23881.c | 189 ++++++++++++++++++++++++++++++++++++++= +++- 1 file changed, 187 insertions(+), 2 deletions(-) diff --git a/drivers/net/pse-pd/tps23881.c b/drivers/net/pse-pd/tps23881.c index 5e9dda2c0eac..7a9a5dbe0cb1 100644 --- a/drivers/net/pse-pd/tps23881.c +++ b/drivers/net/pse-pd/tps23881.c @@ -16,7 +16,15 @@ #include =20 #define TPS23881_MAX_CHANS 8 - +#define TPS23881_MAX_IRQ_RETRIES 10 + +#define TPS23881_REG_IT 0x0 +#define TPS23881_REG_IT_MASK 0x1 +#define TPS23881_REG_IT_IFAULT BIT(5) +#define TPS23881_REG_IT_SUPF BIT(7) +#define TPS23881_REG_FAULT 0x7 +#define TPS23881_REG_SUPF_EVENT 0xb +#define TPS23881_REG_TSD BIT(7) #define TPS23881_REG_PW_STATUS 0x10 #define TPS23881_REG_OP_MODE 0x12 #define TPS23881_OP_MODE_SEMIAUTO 0xaaaa @@ -24,6 +32,7 @@ #define TPS23881_REG_DET_CLA_EN 0x14 #define TPS23881_REG_GEN_MASK 0x17 #define TPS23881_REG_NBITACC BIT(5) +#define TPS23881_REG_INTEN BIT(7) #define TPS23881_REG_PW_EN 0x19 #define TPS23881_REG_2PAIR_POL1 0x1e #define TPS23881_REG_PORT_MAP 0x26 @@ -51,6 +60,7 @@ struct tps23881_port_desc { u8 chan[2]; bool is_4p; int pw_pol; + bool exist; }; =20 struct tps23881_priv { @@ -782,8 +792,10 @@ tps23881_write_port_matrix(struct tps23881_priv *priv, hw_chan =3D port_matrix[i].hw_chan[0] % 4; =20 /* Set software port matrix for existing ports */ - if (port_matrix[i].exist) + if (port_matrix[i].exist) { priv->port[pi_id].chan[0] =3D lgcl_chan; + priv->port[pi_id].exist =3D true; + } =20 /* Initialize power policy internal value */ priv->port[pi_id].pw_pol =3D -1; @@ -1017,6 +1029,173 @@ static int tps23881_flash_sram_fw(struct i2c_client= *client) return 0; } =20 +/* Convert interrupt events to 0xff to be aligned with the chan + * number. + */ +static u8 tps23881_irq_export_chans_helper(u16 reg_val, u8 field_offset) +{ + u8 val; + + val =3D (reg_val >> (4 + field_offset) & 0xf0) | + (reg_val >> field_offset & 0x0f); + + return val; +} + +/* Convert chan number to port number */ +static void tps23881_set_notifs_helper(struct tps23881_priv *priv, + u8 chans, + unsigned long *notifs, + unsigned long *notifs_mask, + enum ethtool_pse_event event) +{ + u8 chan; + int i; + + if (!chans) + return; + + for (i =3D 0; i < TPS23881_MAX_CHANS; i++) { + if (!priv->port[i].exist) + continue; + /* No need to look at the 2nd channel in case of PoE4 as + * both registers are set. + */ + chan =3D priv->port[i].chan[0]; + + if (BIT(chan) & chans) { + *notifs_mask |=3D BIT(i); + notifs[i] |=3D event; + } + } +} + +static void tps23881_irq_event_over_temp(struct tps23881_priv *priv, + u16 reg_val, + unsigned long *notifs, + unsigned long *notifs_mask) +{ + int i; + + if (reg_val & TPS23881_REG_TSD) { + for (i =3D 0; i < TPS23881_MAX_CHANS; i++) { + if (!priv->port[i].exist) + continue; + + *notifs_mask |=3D BIT(i); + notifs[i] |=3D ETHTOOL_PSE_EVENT_OVER_TEMP; + } + } +} + +static void tps23881_irq_event_over_current(struct tps23881_priv *priv, + u16 reg_val, + unsigned long *notifs, + unsigned long *notifs_mask) +{ + u8 chans; + + chans =3D tps23881_irq_export_chans_helper(reg_val, 0); + if (chans) + tps23881_set_notifs_helper(priv, chans, notifs, notifs_mask, + ETHTOOL_PSE_EVENT_OVER_CURRENT); +} + +static int tps23881_irq_event_handler(struct tps23881_priv *priv, u16 reg, + unsigned long *notifs, + unsigned long *notifs_mask) +{ + struct i2c_client *client =3D priv->client; + int ret; + + /* The Supply event bit is repeated twice so we only need to read + * the one from the first byte. + */ + if (reg & TPS23881_REG_IT_SUPF) { + ret =3D i2c_smbus_read_word_data(client, TPS23881_REG_SUPF_EVENT); + if (ret < 0) + return ret; + tps23881_irq_event_over_temp(priv, ret, notifs, notifs_mask); + } + + if (reg & (TPS23881_REG_IT_IFAULT | TPS23881_REG_IT_IFAULT << 8)) { + ret =3D i2c_smbus_read_word_data(client, TPS23881_REG_FAULT); + if (ret < 0) + return ret; + tps23881_irq_event_over_current(priv, ret, notifs, notifs_mask); + } + + return 0; +} + +static int tps23881_irq_handler(int irq, struct pse_controller_dev *pcdev, + unsigned long *notifs, + unsigned long *notifs_mask) +{ + struct tps23881_priv *priv =3D to_tps23881_priv(pcdev); + struct i2c_client *client =3D priv->client; + int ret, it_mask, retry; + + /* Get interruption mask */ + ret =3D i2c_smbus_read_word_data(client, TPS23881_REG_IT_MASK); + if (ret < 0) + return ret; + it_mask =3D ret; + + /* Read interrupt register until it frees the interruption pin. */ + retry =3D 0; + while (true) { + if (retry > TPS23881_MAX_IRQ_RETRIES) { + dev_err(&client->dev, "interrupt never freed"); + return -ETIMEDOUT; + } + + ret =3D i2c_smbus_read_word_data(client, TPS23881_REG_IT); + if (ret < 0) + return ret; + + /* No more relevant interruption */ + if (!(ret & it_mask)) + return 0; + + ret =3D tps23881_irq_event_handler(priv, (u16)ret, notifs, + notifs_mask); + if (ret) + return ret; + + retry++; + } + return 0; +} + +static int tps23881_setup_irq(struct tps23881_priv *priv, int irq) +{ + struct i2c_client *client =3D priv->client; + struct pse_irq_desc irq_desc =3D { + .name =3D "tps23881-irq", + .map_event =3D tps23881_irq_handler, + }; + int ret; + u16 val; + + val =3D TPS23881_REG_IT_IFAULT | TPS23881_REG_IT_SUPF; + val |=3D val << 8; + ret =3D i2c_smbus_write_word_data(client, TPS23881_REG_IT_MASK, val); + if (ret) + return ret; + + ret =3D i2c_smbus_read_word_data(client, TPS23881_REG_GEN_MASK); + if (ret < 0) + return ret; + + val =3D (u16)(ret | TPS23881_REG_INTEN | TPS23881_REG_INTEN << 8); + ret =3D i2c_smbus_write_word_data(client, TPS23881_REG_GEN_MASK, val); + if (ret < 0) + return ret; + + return devm_pse_irq_helper(&priv->pcdev, irq, 0, &irq_desc); +} + static int tps23881_i2c_probe(struct i2c_client *client) { struct device *dev =3D &client->dev; @@ -1097,6 +1276,12 @@ static int tps23881_i2c_probe(struct i2c_client *cli= ent) "failed to register PSE controller\n"); } =20 + if (client->irq) { + ret =3D tps23881_setup_irq(priv, client->irq); + if (ret) + return ret; + } + return ret; } =20 --=20 2.43.0 From nobody Fri Dec 19 16:23:04 2025 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9858C1E3761; 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arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="fIu2Qckm" Received: by mail.gandi.net (Postfix) with ESMTPSA id 7D7504397A; Sat, 24 May 2025 10:56:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1748084219; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=m5bqD7AfBgi/9PG+Awh30U3YlrzxWnVMjIeVPm7Oluo=; b=fIu2QckmsP0LfpFkqM8IOhsDuvp3+Pr+cXXvUsXEdWFmh4QLGbiISSmqB+g6fgPa97jmD6 2y0/fEarv6kD/pWCGSD/QHSKIfjq3v+0chYw1J/PD7D9EQ9Og5z+Qov21RbNZWEV2X5o69 UC7k4pB1irAEZfwQ8b+vBH62S+WiiymWlySD0PkI8935uknuoZmu3pAiQHMsZxC+0pb55R QN9QHXC/PnOKMlyi+DRsIqZhQOzVD8ThxiuDCE/8o00gLdH9VZoMvwSviGwBpJb5gPHAMD NyBYuLDmVscEvuR/gIglk0PGtQlMWUN8BuqKK8EyDzl9DvhnAmgXuZ6YxePAHw== From: Kory Maincent Date: Sat, 24 May 2025 12:56:06 +0200 Subject: [PATCH net-next v12 04/13] net: pse-pd: Add support for PSE power domains Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250524-feature_poe_port_prio-v12-4-d65fd61df7a7@bootlin.com> References: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> In-Reply-To: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Krzysztof Kozlowski , Conor Dooley Cc: Liam Girdwood , Mark Brown , Thomas Petazzoni , netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, "Kory Maincent (Dent Project)" X-Mailer: b4 0.15-dev-8cb71 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtddtgdduudehgeculddtuddrgeefvddrtddtmdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpefmohhrhicuofgrihhntggvnhhtuceokhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepvefgvdfgkeetgfefgfegkedugffghfdtffeftdeuteehjedtvdelvddvleehtdevnecukfhppedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikeenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepihhnvghtpedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikedphhgvlhhopegluddvjedrtddruddrudgnpdhmrghilhhfrhhomhepkhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepvdejpdhrtghpthhtohepkhihlhgvrdhsfigvnhhsohhnsegvshhtrdhtvggthhdprhgtphhtthhopegurghvvghmsegurghvvghmlhhofhhtrdhnvghtpdhrtghpthhtoheptghonhhorhdoughtsehkvghrnhgvlhdrohhrghdprhgtp hhtthhopehlihhnuhigqdhkvghrnhgvlhesvhhgvghrrdhkvghrnhgvlhdrohhrghdprhgtphhtthhopehkohhrhidrmhgrihhntggvnhhtsegsohhothhlihhnrdgtohhmpdhrtghpthhtoheptghorhgsvghtsehlfihnrdhnvghtpdhrtghpthhtoheprghnughrvgifsehluhhnnhdrtghhpdhrtghpthhtoheprghnughrvgifodhnvghtuggvvheslhhunhhnrdgthh X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) Introduce PSE power domain support as groundwork for upcoming port priority features. Multiple PSE PIs can now be grouped under a single PSE power domain, enabling future enhancements like defining available power budgets, port priority modes, and disconnection policies. This setup will allow the system to assess whether activating a port would exceed the available power budget, preventing over-budget states proactively. Signed-off-by: Kory Maincent (Dent Project) Reviewed-by: Oleksij Rempel --- Changes in v8: - Add missing kref_init and an wrong error check condition. Changes in v7: - Add reference count and mutex lock for PSE power domain in case of PSE from different controllers want to register the same PSE power domain. Changes in v6: - nitpick change. Changes in v4: - Add kdoc. - Fix null dereference in pse_flush_pw_ds function. Changes in v3: - Remove pw_budget variable. Changes in v2: - new patch. --- drivers/net/pse-pd/pse_core.c | 139 ++++++++++++++++++++++++++++++++++++++= ++++ include/linux/pse-pd/pse.h | 2 + 2 files changed, 141 insertions(+) diff --git a/drivers/net/pse-pd/pse_core.c b/drivers/net/pse-pd/pse_core.c index a79dcab9c12e..148d75ad7550 100644 --- a/drivers/net/pse-pd/pse_core.c +++ b/drivers/net/pse-pd/pse_core.c @@ -16,8 +16,12 @@ #include #include =20 +#define PSE_PW_D_LIMIT INT_MAX + static DEFINE_MUTEX(pse_list_mutex); static LIST_HEAD(pse_controller_list); +static DEFINE_XARRAY_ALLOC(pse_pw_d_map); +static DEFINE_MUTEX(pse_pw_d_mutex); =20 /** * struct pse_control - a PSE control @@ -38,6 +42,18 @@ struct pse_control { struct phy_device *attached_phydev; }; =20 +/** + * struct pse_power_domain - a PSE power domain + * @id: ID of the power domain + * @supply: Power supply the Power Domain + * @refcnt: Number of gets of this pse_power_domain + */ +struct pse_power_domain { + int id; + struct regulator *supply; + struct kref refcnt; +}; + static int of_load_single_pse_pi_pairset(struct device_node *node, struct pse_pi *pi, int pairset_num) @@ -489,6 +505,124 @@ devm_pse_pi_regulator_register(struct pse_controller_= dev *pcdev, return 0; } =20 +static void __pse_pw_d_release(struct kref *kref) +{ + struct pse_power_domain *pw_d =3D container_of(kref, + struct pse_power_domain, + refcnt); + + regulator_put(pw_d->supply); + xa_erase(&pse_pw_d_map, pw_d->id); +} + +/** + * pse_flush_pw_ds - flush all PSE power domains of a PSE + * @pcdev: a pointer to the initialized PSE controller device + */ +static void pse_flush_pw_ds(struct pse_controller_dev *pcdev) +{ + struct pse_power_domain *pw_d; + int i; + + for (i =3D 0; i < pcdev->nr_lines; i++) { + if (!pcdev->pi[i].pw_d) + continue; + + pw_d =3D xa_load(&pse_pw_d_map, pcdev->pi[i].pw_d->id); + if (!pw_d) + continue; + + kref_put_mutex(&pw_d->refcnt, __pse_pw_d_release, + &pse_pw_d_mutex); + } +} + +/** + * devm_pse_alloc_pw_d - allocate a new PSE power domain for a device + * @dev: device that is registering this PSE power domain + * + * Return: Pointer to the newly allocated PSE power domain or error pointe= rs + */ +static struct pse_power_domain *devm_pse_alloc_pw_d(struct device *dev) +{ + struct pse_power_domain *pw_d; + int index, ret; + + pw_d =3D devm_kzalloc(dev, sizeof(*pw_d), GFP_KERNEL); + if (!pw_d) + return ERR_PTR(-ENOMEM); + + ret =3D xa_alloc(&pse_pw_d_map, &index, pw_d, XA_LIMIT(1, PSE_PW_D_LIMIT), + GFP_KERNEL); + if (ret) + return ERR_PTR(ret); + + kref_init(&pw_d->refcnt); + pw_d->id =3D index; + return pw_d; +} + +/** + * pse_register_pw_ds - register the PSE power domains for a PSE + * @pcdev: a pointer to the PSE controller device + * + * Return: 0 on success and failure value on error + */ +static int pse_register_pw_ds(struct pse_controller_dev *pcdev) +{ + int i, ret =3D 0; + + mutex_lock(&pse_pw_d_mutex); + for (i =3D 0; i < pcdev->nr_lines; i++) { + struct regulator_dev *rdev =3D pcdev->pi[i].rdev; + struct pse_power_domain *pw_d; + struct regulator *supply; + bool present =3D false; + unsigned long index; + + /* No regulator or regulator parent supply registered. + * We need a regulator parent to register a PSE power domain + */ + if (!rdev || !rdev->supply) + continue; + + xa_for_each(&pse_pw_d_map, index, pw_d) { + /* Power supply already registered as a PSE power + * domain. + */ + if (regulator_is_equal(pw_d->supply, rdev->supply)) { + present =3D true; + pcdev->pi[i].pw_d =3D pw_d; + break; + } + } + if (present) { + kref_get(&pw_d->refcnt); + continue; + } + + pw_d =3D devm_pse_alloc_pw_d(pcdev->dev); + if (IS_ERR(pw_d)) { + ret =3D PTR_ERR(pw_d); + goto out; + } + + supply =3D regulator_get(&rdev->dev, rdev->supply_name); + if (IS_ERR(supply)) { + xa_erase(&pse_pw_d_map, pw_d->id); + ret =3D PTR_ERR(supply); + goto out; + } + + pw_d->supply =3D supply; + pcdev->pi[i].pw_d =3D pw_d; + } + +out: + mutex_unlock(&pse_pw_d_mutex); + return ret; +} + /** * pse_controller_register - register a PSE controller device * @pcdev: a pointer to the initialized PSE controller device @@ -548,6 +682,10 @@ int pse_controller_register(struct pse_controller_dev = *pcdev) return ret; } =20 + ret =3D pse_register_pw_ds(pcdev); + if (ret) + return ret; + mutex_lock(&pse_list_mutex); list_add(&pcdev->list, &pse_controller_list); mutex_unlock(&pse_list_mutex); @@ -562,6 +700,7 @@ EXPORT_SYMBOL_GPL(pse_controller_register); */ void pse_controller_unregister(struct pse_controller_dev *pcdev) { + pse_flush_pw_ds(pcdev); pse_release_pis(pcdev); mutex_lock(&pse_list_mutex); list_del(&pcdev->list); diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index 6eb064722aa8..f736b1677ea5 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -222,12 +222,14 @@ struct pse_pi_pairset { * @np: device node pointer of the PSE PI node * @rdev: regulator represented by the PSE PI * @admin_state_enabled: PI enabled state + * @pw_d: Power domain of the PSE PI */ struct pse_pi { struct pse_pi_pairset pairset[2]; struct device_node *np; struct regulator_dev *rdev; bool admin_state_enabled; + struct pse_power_domain *pw_d; }; =20 /** --=20 2.43.0 From nobody Fri Dec 19 16:23:04 2025 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CDCC01E5018; Sat, 24 May 2025 10:57:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Kb5XXz4k" Received: by mail.gandi.net (Postfix) with ESMTPSA id 0674D4397E; Sat, 24 May 2025 10:56:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1748084221; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5T36LvKd9dlSxfQ9ddVnLdaWGkfpoV7quXQXHs6/Ivw=; b=Kb5XXz4ko6neQFIEhDU+73+x1iotr+V0XO3MvC9VOvZz4RxbXGADLthNgFqfT+krWTCkbC bHKd6xgF/non8XFybjhhM9Gw61We/jm2x0ix4Nm5gfy4z7Y5g8RJBaBA1Av7U60SRfpT9l On+okqLuj/EfG0ttgOHlwasDjYp6hROdGmbS/xWvwpOHckvEQNGcTWWO1Ms2Tf3U6bm2FA WXSPka6IUucerZivYoV3tJ3ODhaTPNYfwKVIuFUW2w+nPWpJrHc+AD58x031ZYyTQgIbxg NEOOS6l6IcruvyXeeCWEmlv5P8cPJ+RDO6jwGagPkRRcyoKn7P/G1c0p8RvAbQ== From: Kory Maincent Date: Sat, 24 May 2025 12:56:07 +0200 Subject: [PATCH net-next v12 05/13] net: ethtool: Add support for new power domains index description Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250524-feature_poe_port_prio-v12-5-d65fd61df7a7@bootlin.com> References: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> In-Reply-To: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Krzysztof Kozlowski , Conor Dooley Cc: Liam Girdwood , Mark Brown , Thomas Petazzoni , netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, "Kory Maincent (Dent Project)" X-Mailer: b4 0.15-dev-8cb71 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtddtgdduudehgeculddtuddrgeefvddrtddtmdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpefmohhrhicuofgrihhntggvnhhtuceokhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepvefgvdfgkeetgfefgfegkedugffghfdtffeftdeuteehjedtvdelvddvleehtdevnecukfhppedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikeenucevlhhushhtvghrufhiiigvpeegnecurfgrrhgrmhepihhnvghtpedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikedphhgvlhhopegluddvjedrtddruddrudgnpdhmrghilhhfrhhomhepkhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepvdejpdhrtghpthhtohepkhihlhgvrdhsfigvnhhsohhnsegvshhtrdhtvggthhdprhgtphhtthhopegurghvvghmsegurghvvghmlhhofhhtrdhnvghtpdhrtghpthhtoheptghonhhorhdoughtsehkvghrnhgvlhdrohhrghdprhgtp hhtthhopehlihhnuhigqdhkvghrnhgvlhesvhhgvghrrdhkvghrnhgvlhdrohhrghdprhgtphhtthhopehkohhrhidrmhgrihhntggvnhhtsegsohhothhlihhnrdgtohhmpdhrtghpthhtoheptghorhgsvghtsehlfihnrdhnvghtpdhrtghpthhtoheprghnughrvgifsehluhhnnhdrtghhpdhrtghpthhtoheprghnughrvgifodhnvghtuggvvheslhhunhhnrdgthh X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) Report the index of the newly introduced PSE power domain to the user, enabling improved management of the power budget for PSE devices. Signed-off-by: Kory Maincent (Dent Project) Reviewed-by: Oleksij Rempel --- Changes in v3: - Do not support power domain id =3D 0 because we can't differentiate with no PSE power domain. Changes in v2: - new patch. --- Documentation/netlink/specs/ethtool.yaml | 5 +++++ Documentation/networking/ethtool-netlink.rst | 4 ++++ drivers/net/pse-pd/pse_core.c | 3 +++ include/linux/pse-pd/pse.h | 2 ++ include/uapi/linux/ethtool_netlink_generated.h | 1 + net/ethtool/pse-pd.c | 7 +++++++ 6 files changed, 22 insertions(+) diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netli= nk/specs/ethtool.yaml index 09da7702ce5b..357775ab0038 100644 --- a/Documentation/netlink/specs/ethtool.yaml +++ b/Documentation/netlink/specs/ethtool.yaml @@ -1404,6 +1404,10 @@ attribute-sets: type: nest multi-attr: true nested-attributes: c33-pse-pw-limit + - + name: pse-pw-d-id + type: u32 + name-prefix: ethtool-a- - name: rss attr-cnt-name: __ethtool-a-rss-cnt @@ -2227,6 +2231,7 @@ operations: - c33-pse-ext-substate - c33-pse-avail-pw-limit - c33-pse-pw-limit-ranges + - pse-pw-d-id dump: *pse-get-op - name: pse-set diff --git a/Documentation/networking/ethtool-netlink.rst b/Documentation/n= etworking/ethtool-netlink.rst index 433737865bc2..e9af8e58564c 100644 --- a/Documentation/networking/ethtool-netlink.rst +++ b/Documentation/networking/ethtool-netlink.rst @@ -1789,6 +1789,7 @@ Kernel response contents: limit of the PoE PSE. ``ETHTOOL_A_C33_PSE_PW_LIMIT_RANGES`` nested Supported power limit configuration ranges. + ``ETHTOOL_A_PSE_PW_D_ID`` u32 Index of the PSE pow= er domain =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D = =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D =20 When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_STATE`` attribute identi= fies @@ -1862,6 +1863,9 @@ identifies the C33 PSE power limit ranges through If the controller works with fixed classes, the min and max values will be equal. =20 +The ``ETHTOOL_A_PSE_PW_D_ID`` attribute identifies the index of PSE power +domain. + PSE_SET =3D=3D=3D=3D=3D=3D=3D =20 diff --git a/drivers/net/pse-pd/pse_core.c b/drivers/net/pse-pd/pse_core.c index 148d75ad7550..debd9a721867 100644 --- a/drivers/net/pse-pd/pse_core.c +++ b/drivers/net/pse-pd/pse_core.c @@ -1098,6 +1098,9 @@ int pse_ethtool_get_status(struct pse_control *psec, pcdev =3D psec->pcdev; ops =3D pcdev->ops; mutex_lock(&pcdev->lock); + if (pcdev->pi[psec->id].pw_d) + status->pw_d_id =3D pcdev->pi[psec->id].pw_d->id; + ret =3D ops->pi_get_admin_state(pcdev, psec->id, &admin_state); if (ret) goto out; diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index f736b1677ea5..2f8ecfd87d43 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -114,6 +114,7 @@ struct pse_pw_limit_ranges { /** * struct ethtool_pse_control_status - PSE control/channel status. * + * @pw_d_id: PSE power domain index. * @podl_admin_state: operational state of the PoDL PSE * functions. IEEE 802.3-2018 30.15.1.1.2 aPoDLPSEAdminState * @podl_pw_status: power detection status of the PoDL PSE. @@ -135,6 +136,7 @@ struct pse_pw_limit_ranges { * ranges */ struct ethtool_pse_control_status { + u32 pw_d_id; enum ethtool_podl_pse_admin_state podl_admin_state; enum ethtool_podl_pse_pw_d_status podl_pw_status; enum ethtool_c33_pse_admin_state c33_admin_state; diff --git a/include/uapi/linux/ethtool_netlink_generated.h b/include/uapi/= linux/ethtool_netlink_generated.h index 3864aa0de8c7..ed344c8533eb 100644 --- a/include/uapi/linux/ethtool_netlink_generated.h +++ b/include/uapi/linux/ethtool_netlink_generated.h @@ -652,6 +652,7 @@ enum { ETHTOOL_A_C33_PSE_EXT_SUBSTATE, ETHTOOL_A_C33_PSE_AVAIL_PW_LIMIT, ETHTOOL_A_C33_PSE_PW_LIMIT_RANGES, + ETHTOOL_A_PSE_PW_D_ID, =20 __ETHTOOL_A_PSE_CNT, ETHTOOL_A_PSE_MAX =3D (__ETHTOOL_A_PSE_CNT - 1) diff --git a/net/ethtool/pse-pd.c b/net/ethtool/pse-pd.c index 0e5d2095eeda..6cc0beee2882 100644 --- a/net/ethtool/pse-pd.c +++ b/net/ethtool/pse-pd.c @@ -83,6 +83,8 @@ static int pse_reply_size(const struct ethnl_req_info *re= q_base, const struct ethtool_pse_control_status *st =3D &data->status; int len =3D 0; =20 + if (st->pw_d_id > 0) + len +=3D nla_total_size(sizeof(u32)); /* _PSE_PW_D_ID */ if (st->podl_admin_state > 0) len +=3D nla_total_size(sizeof(u32)); /* _PODL_PSE_ADMIN_STATE */ if (st->podl_pw_status > 0) @@ -148,6 +150,11 @@ static int pse_fill_reply(struct sk_buff *skb, const struct pse_reply_data *data =3D PSE_REPDATA(reply_base); const struct ethtool_pse_control_status *st =3D &data->status; =20 + if (st->pw_d_id > 0 && + nla_put_u32(skb, ETHTOOL_A_PSE_PW_D_ID, + st->pw_d_id)) + return -EMSGSIZE; + if (st->podl_admin_state > 0 && nla_put_u32(skb, ETHTOOL_A_PODL_PSE_ADMIN_STATE, st->podl_admin_state)) --=20 2.43.0 From nobody Fri Dec 19 16:23:04 2025 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5764E1E633C; Sat, 24 May 2025 10:57:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748084226; cv=none; b=CpdDw3AB7XdMnnBZyjgOU3PMOzSwl5r6ZfgD377HcotCuPXtR0OCnfiCBKAnYqXr+XoMs/UjvZKsF8JqCh0oHKXAYowNSIuLW0quC32LkvLEJN6i6p35Bk4/rm4LO5n4dI2oGs6pdZ5S7itwjp8B11Gx6slBV+cuNRu0OgSPd5E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748084226; c=relaxed/simple; bh=kztBcCKP++nS2yia/PSAQqzvVVtGSqwmKkwez2U9lps=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gr2Hoy2nSRfwT9tSdbMjywv/nYJNYf2Jjg5MzI9q1940LueRrOVAs7SQYD0JiOl/4+PnafKGm+1FRJ9w1O5Tme3ZcqmOrlmcYr2shqVImLqTBWCOIdpKaP1ftv5v7CAHKzSZR892LPDxuL5Eoes94oa7CN/g4/nZKqZESrntEng= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Q4k3+LKh; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Q4k3+LKh" Received: by mail.gandi.net (Postfix) with ESMTPSA id 7CB334397F; Sat, 24 May 2025 10:57:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1748084222; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bw04+GiVJhAeIUIY2gUKiUUnf9gGdpiBlBKtP6ID3I8=; b=Q4k3+LKhEhXTnedCwS4jCmmfPWzRoOYpnDEeL2nM0VtEm1/lADaocFK69CZM9gh0a0ZRhb f9tyZJhDy6RrIcSWXpg9BmnmT/MixSjzy5joqeFTC1JKR7Bz5K2f62lHW7dXv97Bk6YPBi 6VfrbjAMb7RlGWQUXDGq6C5z/XkBknOdmSmNssVcXh8dBd9QDi1YNrBzCQrKn9qZq2ro2U Wcc/1ojn2EVBTSBzRsS7sNrUP1m3aaIKX02P6ynEaikQiSuB1ivvh2EJPeCMaiLt4jwzq6 LADYTsvyoQhIcobdn2MVJI5pp/HsEQlOrkRfjJYJeXHUHjOTIKwSAL9rWw5s1g== From: Kory Maincent Date: Sat, 24 May 2025 12:56:08 +0200 Subject: [PATCH net-next v12 06/13] net: pse-pd: Add helper to report hardware enable status of the PI Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250524-feature_poe_port_prio-v12-6-d65fd61df7a7@bootlin.com> References: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> In-Reply-To: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Krzysztof Kozlowski , Conor Dooley Cc: Liam Girdwood , Mark Brown , Thomas Petazzoni , netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, "Kory Maincent (Dent Project)" X-Mailer: b4 0.15-dev-8cb71 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtddtgdduudehgeculddtuddrgeefvddrtddtmdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpefmohhrhicuofgrihhntggvnhhtuceokhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepvefgvdfgkeetgfefgfegkedugffghfdtffeftdeuteehjedtvdelvddvleehtdevnecukfhppedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikeenucevlhhushhtvghrufhiiigvpeegnecurfgrrhgrmhepihhnvghtpedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikedphhgvlhhopegluddvjedrtddruddrudgnpdhmrghilhhfrhhomhepkhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepvdejpdhrtghpthhtohepkhihlhgvrdhsfigvnhhsohhnsegvshhtrdhtvggthhdprhgtphhtthhopegurghvvghmsegurghvvghmlhhofhhtrdhnvghtpdhrtghpthhtoheptghonhhorhdoughtsehkvghrnhgvlhdrohhrghdprhgtp hhtthhopehlihhnuhigqdhkvghrnhgvlhesvhhgvghrrdhkvghrnhgvlhdrohhrghdprhgtphhtthhopehkohhrhidrmhgrihhntggvnhhtsegsohhothhlihhnrdgtohhmpdhrtghpthhtoheptghorhgsvghtsehlfihnrdhnvghtpdhrtghpthhtoheprghnughrvgifsehluhhnnhdrtghhpdhrtghpthhtoheprghnughrvgifodhnvghtuggvvheslhhunhhnrdgthh X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) Refactor code by introducing a helper function to retrieve the hardware enabled state of the PI, avoiding redundant implementations in the future. Signed-off-by: Kory Maincent (Dent Project) Reviewed-by: Oleksij Rempel --- Change in v7: - New patch. --- drivers/net/pse-pd/pse_core.c | 36 ++++++++++++++++++++++++++---------- 1 file changed, 26 insertions(+), 10 deletions(-) diff --git a/drivers/net/pse-pd/pse_core.c b/drivers/net/pse-pd/pse_core.c index debd9a721867..dd6775b9816a 100644 --- a/drivers/net/pse-pd/pse_core.c +++ b/drivers/net/pse-pd/pse_core.c @@ -276,10 +276,34 @@ pse_control_find_net_by_id(struct pse_controller_dev = *pcdev, int id, return NULL; } =20 +/** + * pse_pi_is_hw_enabled - Is PI enabled at the hardware level + * @pcdev: a pointer to the PSE controller device + * @id: Index of the PI + * + * Return: 1 if the PI is enabled at the hardware level, 0 if not, and + * a failure value on error + */ +static int pse_pi_is_hw_enabled(struct pse_controller_dev *pcdev, int id) +{ + struct pse_admin_state admin_state =3D {0}; + int ret; + + ret =3D pcdev->ops->pi_get_admin_state(pcdev, id, &admin_state); + if (ret < 0) + return ret; + + /* PI is well enabled at the hardware level */ + if (admin_state.podl_admin_state =3D=3D ETHTOOL_PODL_PSE_ADMIN_STATE_ENAB= LED || + admin_state.c33_admin_state =3D=3D ETHTOOL_C33_PSE_ADMIN_STATE_ENABLE= D) + return 1; + + return 0; +} + static int pse_pi_is_enabled(struct regulator_dev *rdev) { struct pse_controller_dev *pcdev =3D rdev_get_drvdata(rdev); - struct pse_admin_state admin_state =3D {0}; const struct pse_controller_ops *ops; int id, ret; =20 @@ -289,15 +313,7 @@ static int pse_pi_is_enabled(struct regulator_dev *rde= v) =20 id =3D rdev_get_id(rdev); mutex_lock(&pcdev->lock); - ret =3D ops->pi_get_admin_state(pcdev, id, &admin_state); - if (ret) - goto out; - - if (admin_state.podl_admin_state =3D=3D ETHTOOL_PODL_PSE_ADMIN_STATE_ENAB= LED || - admin_state.c33_admin_state =3D=3D ETHTOOL_C33_PSE_ADMIN_STATE_ENABLE= D) - ret =3D 1; - -out: + ret =3D pse_pi_is_hw_enabled(pcdev, id); mutex_unlock(&pcdev->lock); =20 return ret; --=20 2.43.0 From nobody Fri Dec 19 16:23:04 2025 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C9B0D1E9917; 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arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="OzU+1dds" Received: by mail.gandi.net (Postfix) with ESMTPSA id D37DF43978; Sat, 24 May 2025 10:57:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1748084224; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hauf7e8tkdX+jlF1zRF8h/vgkasO6bRJ/iZZqjcrSEw=; b=OzU+1ddshBIWB+7/2SYQghMLOqJjRJOzbU3qoGBVIUCZm3WIh3X+aXJ7K89vy1yHadKo/z ccYMZY3Y9ZXIOxVx2fv5AIXVV0jkh22dRNpyxcCkqdEYvBartViGD4c66HxWeTJ2FfvttX yd+0I0I6frFKtbpOY92b9Y0j2I5St3L6cyMXGJOVPNbc2xO4lBJZbtol35YC7i5ucohygt 4fkufj0NukCTXhlaPRGFUo6g50sIIvrysLxyPqQtCS9u0LDjPUxsEcdIrhlfNfHGGtQFf6 awJvDlze3eSpqrq+vT8uZy0Uk+ZEPVHqKTvUdMHPcqexjbmakCAiXLYqgJT0rw== From: Kory Maincent Date: Sat, 24 May 2025 12:56:09 +0200 Subject: [PATCH net-next v12 07/13] net: pse-pd: Add support for budget evaluation strategies Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250524-feature_poe_port_prio-v12-7-d65fd61df7a7@bootlin.com> References: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> In-Reply-To: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Krzysztof Kozlowski , Conor Dooley Cc: Liam Girdwood , Mark Brown , Thomas Petazzoni , netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, "Kory Maincent (Dent Project)" X-Mailer: b4 0.15-dev-8cb71 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtddtgdduudehgeculddtuddrgeefvddrtddtmdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephfffufggtgfgkfhfjgfvvefosehtkeertdertdejnecuhfhrohhmpefmohhrhicuofgrihhntggvnhhtuceokhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepieekgfejvdekudfgieehffegfeelgfetudeluedviedtgfdtvdelteeikeffffeknecukfhppedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikeenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepihhnvghtpedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikedphhgvlhhopegluddvjedrtddruddrudgnpdhmrghilhhfrhhomhepkhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepvdejpdhrtghpthhtohepkhihlhgvrdhsfigvnhhsohhnsegvshhtrdhtvggthhdprhgtphhtthhopegurghvvghmsegurghvvghmlhhofhhtrdhnvghtpdhrtghpthhtoheptghonhhorhdoughtsehkvghrnhgvlhdrohhrghdprhgtp hhtthhopehlihhnuhigqdhkvghrnhgvlhesvhhgvghrrdhkvghrnhgvlhdrohhrghdprhgtphhtthhopehkohhrhidrmhgrihhntggvnhhtsegsohhothhlihhnrdgtohhmpdhrtghpthhtoheptghorhgsvghtsehlfihnrdhnvghtpdhrtghpthhtoheprghnughrvgifsehluhhnnhdrtghhpdhrtghpthhtoheprghnughrvgifodhnvghtuggvvheslhhunhhnrdgthh X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) This patch introduces the ability to configure the PSE PI budget evaluation strategies. Budget evaluation strategies is utilized by PSE controllers to determine which ports to turn off first in scenarios such as power budget exceedance. The pis_prio_max value is used to define the maximum priority level supported by the controller. Both the current priority and the maximum priority are exposed to the user through the pse_ethtool_get_status call. This patch add support for two mode of budget evaluation strategies. 1. Static Method: This method involves distributing power based on PD classification. It=E2=80=99s straightforward and stable, the PSE core keeping track of t= he budget and subtracting the power requested by each PD=E2=80=99s class. Advantages: Every PD gets its promised power at any time, which guarantees reliability. Disadvantages: PD classification steps are large, meaning devices request much more power than they actually need. As a result, the power supply may only operate at, say, 50% capacity, which is inefficient and wastes money. Priority max value is matching the number of PSE PIs within the PSE. 2. Dynamic Method: To address the inefficiencies of the static method, vendors like Microchip have introduced dynamic power budgeting, as seen in the PD692x0 firmware. This method monitors the current consumption per port and subtracts it from the available power budget. When the budget is exceeded, lower-priority ports are shut down. Advantages: This method optimizes resource utilization, saving costs. Disadvantages: Low-priority devices may experience instability. Priority max value is set by the PSE controller driver. For now, budget evaluation methods are not configurable and cannot be mixed. They are hardcoded in the PSE driver itself, as no current PSE controller supports both methods. Signed-off-by: Kory Maincent (Dent Project) Acked-by: Oleksij Rempel --- Change in v11: - Add function documentation for better clarity. Change in v10: - Remove Olkesij Reviewed-by due to patch change. - Move the PSE notification report in a workqueue to avoid a deadlock between pcdev_lock and pse_list_mutex. Indeed the pse_isr is now fully running with pcdev_lock acquired as we are now doing actions in case of events like disconnection. The pse_list_mutex is acquired to match between the pse_control and the network interface. On an other hand pse_control_get_internal is holding pse_list_mutex and call devm_regulator_get_exclusive which acquire pcdev_lock. That is how we could face a deadlock. Using workqueue creates asynchronous PSE notification but I don't think it is a problem. - Remove _isr_counter_mismatch unused variable. - Fixed a return value in case of enabling a port in over budget state. Change in v8: - Rename a few functions for better clarity following Oleksij proposals. Change in v7: - Move Budget evaluation strategy enum definition out of uAPI, and remove ethtool prefix. - Add support to retry enabling port that failed to be powered in case of port disconnection or priority change. - Update the events name in ethtool specs to match the ones described in the UAPI. Change in v6: - Remove Budget evaluation strategy from ethtool_pse_control_status struct. Change in v5: - Save PI previous power allocated in set current limit to be able to restore the power allocated in case of error. Change in v4: - Remove disconnection policy features. - Rename port priority to budget evaluation strategy. - Add kdoc Change in v3: - Add disconnection policy. - Add management of disabled port priority in the interrupt handler. - Move port prio mode in the power domain instead of the PSE. Change in v2: - Rethink the port priority support. --- Documentation/netlink/specs/ethtool.yaml | 30 +- drivers/net/pse-pd/pse_core.c | 729 +++++++++++++++++++++= ++-- include/linux/pse-pd/pse.h | 78 +++ include/uapi/linux/ethtool_netlink_generated.h | 18 + 4 files changed, 817 insertions(+), 38 deletions(-) diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netli= nk/specs/ethtool.yaml index 357775ab0038..bb09aa4ed1ba 100644 --- a/Documentation/netlink/specs/ethtool.yaml +++ b/Documentation/netlink/specs/ethtool.yaml @@ -120,13 +120,39 @@ definitions: name: pse-event doc: PSE event list for the PSE controller type: flags + name-prefix: ethtool- entries: - - name: over-current + name: pse-event-over-current doc: PSE output current is too high - - name: over-temp + name: pse-event-over-temp doc: PSE in over temperature state + - + name: c33-pse-event-detection + doc: | + detection process occur on the PSE. IEEE 802.3-2022 33.2.5 and + 145.2.6 PSE detection of PDs. IEEE 802.3-202 30.9.1.1.5 + aPSEPowerDetectionStatus + - + name: c33-pse-event-classification + doc: | + classification process occur on the PSE. IEEE 802.3-2022 33.2.6 + and 145.2.8 classification of PDs mutual identification. + IEEE 802.3-2022 30.9.1.1.8 aPSEPowerClassification. + - + name: c33-pse-event-disconnection + doc: | + PD has been disconnected on the PSE. IEEE 802.3-2022 33.3.8 + and 145.3.9 PD Maintain Power Signature. IEEE 802.3-2022 + 33.5.1.2.9 MPS Absent. IEEE 802.3-2022 30.9.1.1.20 + aPSEMPSAbsentCounter. + - + name: pse-event-over-budget + doc: PSE turned off due to over budget situation + - + name: pse-event-sw-pw-control-error + doc: PSE faced an error managing the power control from software =20 attribute-sets: - diff --git a/drivers/net/pse-pd/pse_core.c b/drivers/net/pse-pd/pse_core.c index dd6775b9816a..c88e626a791d 100644 --- a/drivers/net/pse-pd/pse_core.c +++ b/drivers/net/pse-pd/pse_core.c @@ -47,11 +47,14 @@ struct pse_control { * @id: ID of the power domain * @supply: Power supply the Power Domain * @refcnt: Number of gets of this pse_power_domain + * @budget_eval_strategy: Current power budget evaluation strategy of the + * power domain */ struct pse_power_domain { int id; struct regulator *supply; struct kref refcnt; + u32 budget_eval_strategy; }; =20 static int of_load_single_pse_pi_pairset(struct device_node *node, @@ -301,6 +304,115 @@ static int pse_pi_is_hw_enabled(struct pse_controller= _dev *pcdev, int id) return 0; } =20 +/** + * pse_pi_is_admin_enable_not_applied - Check if PI power is not yet being + * delivered + * @pcdev: a pointer to the PSE controller device + * @id: Index of the PI + * + * Detects if a PI is enabled in software with a PD detected, but the hard= ware + * admin state hasn't been applied yet. + * + * This function is used in the power delivery and retry mechanisms to det= ermine + * which PIs need to have power delivery attempted again. + * + * Return: true if the PI has admin enable flag set in software but not yet + * reflected in the hardware admin state, false otherwise. + */ +static bool +pse_pi_is_admin_enable_not_applied(struct pse_controller_dev *pcdev, + int id) +{ + int ret; + + /* PI not enabled or nothing is plugged */ + if (!pcdev->pi[id].admin_state_enabled || + !pcdev->pi[id].isr_pd_detected) + return false; + + ret =3D pse_pi_is_hw_enabled(pcdev, id); + /* PSE PI is already enabled at hardware level */ + if (ret =3D=3D 1) + return false; + + return true; +} + +static int _pse_pi_delivery_power_sw_pw_ctrl(struct pse_controller_dev *pc= dev, + int id, + struct netlink_ext_ack *extack); + +/** + * pse_pw_d_retry_power_delivery - Retry power delivery for pending ports = in a + * PSE power domain + * @pcdev: a pointer to the PSE controller device + * @pw_d: a pointer to the PSE power domain + * + * Scans all ports in the specified power domain and attempts to enable po= wer + * delivery to any ports that have admin enable state set but don't yet ha= ve + * hardware power enabled. Used when there are changes in connection statu= s, + * admin state, or priority that might allow previously unpowered ports to + * receive power, especially in over-budget conditions. + */ +static void pse_pw_d_retry_power_delivery(struct pse_controller_dev *pcdev, + struct pse_power_domain *pw_d) +{ + int i, ret =3D 0; + + for (i =3D 0; i < pcdev->nr_lines; i++) { + int prio_max =3D pcdev->nr_lines; + struct netlink_ext_ack extack; + + if (pcdev->pi[i].pw_d !=3D pw_d) + continue; + + if (!pse_pi_is_admin_enable_not_applied(pcdev, i)) + continue; + + /* Do not try to enable PI with a lower prio (higher value) + * than one which already can't be enabled. + */ + if (pcdev->pi[i].prio > prio_max) + continue; + + ret =3D _pse_pi_delivery_power_sw_pw_ctrl(pcdev, i, &extack); + if (ret =3D=3D -ERANGE) + prio_max =3D pcdev->pi[i].prio; + } +} + +/** + * pse_pw_d_is_sw_pw_control - Determine if power control is software mana= ged + * @pcdev: a pointer to the PSE controller device + * @pw_d: a pointer to the PSE power domain + * + * This function determines whether the power control for a specific power + * domain is managed by software in the interrupt handler rather than dire= ctly + * by hardware. + * + * Software power control is active in the following cases: + * - When the budget evaluation strategy is set to static + * - When the budget evaluation strategy is disabled but the PSE controller + * has an interrupt handler that can report if a Powered Device is conne= cted + * + * Return: true if the power control of the power domain is managed by sof= tware, + * false otherwise + */ +static bool pse_pw_d_is_sw_pw_control(struct pse_controller_dev *pcdev, + struct pse_power_domain *pw_d) +{ + if (!pw_d) + return false; + + if (pw_d->budget_eval_strategy =3D=3D PSE_BUDGET_EVAL_STRAT_STATIC) + return true; + if (pw_d->budget_eval_strategy =3D=3D PSE_BUDGET_EVAL_STRAT_DISABLED && + pcdev->ops->pi_enable && pcdev->irq) + return true; + + return false; +} + static int pse_pi_is_enabled(struct regulator_dev *rdev) { struct pse_controller_dev *pcdev =3D rdev_get_drvdata(rdev); @@ -313,17 +425,255 @@ static int pse_pi_is_enabled(struct regulator_dev *r= dev) =20 id =3D rdev_get_id(rdev); mutex_lock(&pcdev->lock); + if (pse_pw_d_is_sw_pw_control(pcdev, pcdev->pi[id].pw_d)) { + ret =3D pcdev->pi[id].admin_state_enabled; + goto out; + } + ret =3D pse_pi_is_hw_enabled(pcdev, id); + +out: mutex_unlock(&pcdev->lock); =20 return ret; } =20 +/** + * pse_pi_deallocate_pw_budget - Deallocate power budget of the PI + * @pi: a pointer to the PSE PI + */ +static void pse_pi_deallocate_pw_budget(struct pse_pi *pi) +{ + if (!pi->pw_d || !pi->pw_allocated_mW) + return; + + regulator_free_power_budget(pi->pw_d->supply, pi->pw_allocated_mW); + pi->pw_allocated_mW =3D 0; +} + +/** + * _pse_pi_disable - Call disable operation. Assumes the PSE lock has been + * acquired. + * @pcdev: a pointer to the PSE + * @id: index of the PSE control + * + * Return: 0 on success and failure value on error + */ +static int _pse_pi_disable(struct pse_controller_dev *pcdev, int id) +{ + const struct pse_controller_ops *ops =3D pcdev->ops; + int ret; + + if (!ops->pi_disable) + return -EOPNOTSUPP; + + ret =3D ops->pi_disable(pcdev, id); + if (ret) + return ret; + + pse_pi_deallocate_pw_budget(&pcdev->pi[id]); + + if (pse_pw_d_is_sw_pw_control(pcdev, pcdev->pi[id].pw_d)) + pse_pw_d_retry_power_delivery(pcdev, pcdev->pi[id].pw_d); + + return 0; +} + +/** + * pse_disable_pi_pol - Disable a PI on a power budget policy + * @pcdev: a pointer to the PSE + * @id: index of the PSE PI + * + * Return: 0 on success and failure value on error + */ +static int pse_disable_pi_pol(struct pse_controller_dev *pcdev, int id) +{ + unsigned long notifs =3D ETHTOOL_PSE_EVENT_OVER_BUDGET; + struct pse_ntf ntf =3D {}; + int ret; + + dev_dbg(pcdev->dev, "Disabling PI %d to free power budget\n", id); + + NL_SET_ERR_MSG_FMT(&ntf.extack, + "Disabling PI %d to free power budget", id); + + ret =3D _pse_pi_disable(pcdev, id); + if (ret) + notifs |=3D ETHTOOL_PSE_EVENT_SW_PW_CONTROL_ERROR; + + ntf.notifs =3D notifs; + ntf.id =3D id; + kfifo_in_spinlocked(&pcdev->ntf_fifo, &ntf, 1, &pcdev->ntf_fifo_lock); + schedule_work(&pcdev->ntf_work); + + return ret; +} + +/** + * pse_disable_pi_prio - Disable all PIs of a given priority inside a PSE + * power domain + * @pcdev: a pointer to the PSE + * @pw_d: a pointer to the PSE power domain + * @prio: priority + * + * Return: 0 on success and failure value on error + */ +static int pse_disable_pi_prio(struct pse_controller_dev *pcdev, + struct pse_power_domain *pw_d, + int prio) +{ + int i; + + for (i =3D 0; i < pcdev->nr_lines; i++) { + int ret; + + if (pcdev->pi[i].prio !=3D prio || + pcdev->pi[i].pw_d !=3D pw_d || + pse_pi_is_hw_enabled(pcdev, i) <=3D 0) + continue; + + ret =3D pse_disable_pi_pol(pcdev, i); + if (ret) + return ret; + } + + return 0; +} + +/** + * pse_pi_allocate_pw_budget_static_prio - Allocate power budget for the PI + * when the budget eval strategy is + * static + * @pcdev: a pointer to the PSE + * @id: index of the PSE control + * @pw_req: power requested in mW + * @extack: extack for error reporting + * + * Allocates power using static budget evaluation strategy, where allocati= on + * is based on PD classification. When insufficient budget is available, + * lower-priority ports (higher priority numbers) are turned off first. + * + * Return: 0 on success and failure value on error + */ +static int +pse_pi_allocate_pw_budget_static_prio(struct pse_controller_dev *pcdev, in= t id, + int pw_req, struct netlink_ext_ack *extack) +{ + struct pse_pi *pi =3D &pcdev->pi[id]; + int ret, _prio; + + _prio =3D pcdev->nr_lines; + while (regulator_request_power_budget(pi->pw_d->supply, pw_req) =3D=3D -E= RANGE) { + if (_prio <=3D pi->prio) { + NL_SET_ERR_MSG_FMT(extack, + "PI %d: not enough power budget available", + id); + return -ERANGE; + } + + ret =3D pse_disable_pi_prio(pcdev, pi->pw_d, _prio); + if (ret < 0) + return ret; + + _prio--; + } + + pi->pw_allocated_mW =3D pw_req; + return 0; +} + +/** + * pse_pi_allocate_pw_budget - Allocate power budget for the PI + * @pcdev: a pointer to the PSE + * @id: index of the PSE control + * @pw_req: power requested in mW + * @extack: extack for error reporting + * + * Return: 0 on success and failure value on error + */ +static int pse_pi_allocate_pw_budget(struct pse_controller_dev *pcdev, int= id, + int pw_req, struct netlink_ext_ack *extack) +{ + struct pse_pi *pi =3D &pcdev->pi[id]; + + if (!pi->pw_d) + return 0; + + /* PSE_BUDGET_EVAL_STRAT_STATIC */ + if (pi->pw_d->budget_eval_strategy =3D=3D PSE_BUDGET_EVAL_STRAT_STATIC) + return pse_pi_allocate_pw_budget_static_prio(pcdev, id, pw_req, + extack); + + return 0; +} + +/** + * _pse_pi_delivery_power_sw_pw_ctrl - Enable PSE PI in case of software p= ower + * control. Assumes the PSE lock has been + * acquired. + * @pcdev: a pointer to the PSE + * @id: index of the PSE control + * @extack: extack for error reporting + * + * Return: 0 on success and failure value on error + */ +static int _pse_pi_delivery_power_sw_pw_ctrl(struct pse_controller_dev *pc= dev, + int id, + struct netlink_ext_ack *extack) +{ + const struct pse_controller_ops *ops =3D pcdev->ops; + struct pse_pi *pi =3D &pcdev->pi[id]; + int ret, pw_req; + + if (!ops->pi_get_pw_req) { + /* No power allocation management */ + ret =3D ops->pi_enable(pcdev, id); + if (ret) + NL_SET_ERR_MSG_FMT(extack, + "PI %d: enable error %d", + id, ret); + return ret; + } + + ret =3D ops->pi_get_pw_req(pcdev, id); + if (ret < 0) + return ret; + + pw_req =3D ret; + + /* Compare requested power with port power limit and use the lowest + * one. + */ + if (ops->pi_get_pw_limit) { + ret =3D ops->pi_get_pw_limit(pcdev, id); + if (ret < 0) + return ret; + + if (ret < pw_req) + pw_req =3D ret; + } + + ret =3D pse_pi_allocate_pw_budget(pcdev, id, pw_req, extack); + if (ret) + return ret; + + ret =3D ops->pi_enable(pcdev, id); + if (ret) { + pse_pi_deallocate_pw_budget(pi); + NL_SET_ERR_MSG_FMT(extack, + "PI %d: enable error %d", + id, ret); + return ret; + } + + return 0; +} + static int pse_pi_enable(struct regulator_dev *rdev) { struct pse_controller_dev *pcdev =3D rdev_get_drvdata(rdev); const struct pse_controller_ops *ops; - int id, ret; + int id, ret =3D 0; =20 ops =3D pcdev->ops; if (!ops->pi_enable) @@ -331,6 +681,23 @@ static int pse_pi_enable(struct regulator_dev *rdev) =20 id =3D rdev_get_id(rdev); mutex_lock(&pcdev->lock); + if (pse_pw_d_is_sw_pw_control(pcdev, pcdev->pi[id].pw_d)) { + /* Manage enabled status by software. + * Real enable process will happen if a port is connected. + */ + if (pcdev->pi[id].isr_pd_detected) { + struct netlink_ext_ack extack; + + ret =3D _pse_pi_delivery_power_sw_pw_ctrl(pcdev, id, &extack); + } + if (!ret || ret =3D=3D -ERANGE) { + pcdev->pi[id].admin_state_enabled =3D 1; + ret =3D 0; + } + mutex_unlock(&pcdev->lock); + return ret; + } + ret =3D ops->pi_enable(pcdev, id); if (!ret) pcdev->pi[id].admin_state_enabled =3D 1; @@ -342,21 +709,18 @@ static int pse_pi_enable(struct regulator_dev *rdev) static int pse_pi_disable(struct regulator_dev *rdev) { struct pse_controller_dev *pcdev =3D rdev_get_drvdata(rdev); - const struct pse_controller_ops *ops; + struct pse_pi *pi; int id, ret; =20 - ops =3D pcdev->ops; - if (!ops->pi_disable) - return -EOPNOTSUPP; - id =3D rdev_get_id(rdev); + pi =3D &pcdev->pi[id]; mutex_lock(&pcdev->lock); - ret =3D ops->pi_disable(pcdev, id); + ret =3D _pse_pi_disable(pcdev, id); if (!ret) - pcdev->pi[id].admin_state_enabled =3D 0; - mutex_unlock(&pcdev->lock); + pi->admin_state_enabled =3D 0; =20 - return ret; + mutex_unlock(&pcdev->lock); + return 0; } =20 static int _pse_pi_get_voltage(struct regulator_dev *rdev) @@ -631,6 +995,11 @@ static int pse_register_pw_ds(struct pse_controller_de= v *pcdev) } =20 pw_d->supply =3D supply; + if (pcdev->supp_budget_eval_strategies) + pw_d->budget_eval_strategy =3D pcdev->supp_budget_eval_strategies; + else + pw_d->budget_eval_strategy =3D PSE_BUDGET_EVAL_STRAT_DISABLED; + kref_init(&pw_d->refcnt); pcdev->pi[i].pw_d =3D pw_d; } =20 @@ -639,6 +1008,31 @@ static int pse_register_pw_ds(struct pse_controller_d= ev *pcdev) return ret; } =20 +/** + * pse_send_ntf_worker - Worker to send PSE notifications + * @work: work object + * + * Manage and send PSE netlink notifications using a workqueue to avoid + * deadlock between pcdev_lock and pse_list_mutex. + */ +static void pse_send_ntf_worker(struct work_struct *work) +{ + struct pse_controller_dev *pcdev; + struct pse_ntf ntf; + + pcdev =3D container_of(work, struct pse_controller_dev, ntf_work); + + while (kfifo_out(&pcdev->ntf_fifo, &ntf, 1)) { + struct net_device *netdev; + netdevice_tracker tracker; + + netdev =3D pse_control_find_net_by_id(pcdev, ntf.id, &tracker); + if (netdev) + ethnl_pse_send_ntf(netdev, ntf.notifs, &ntf.extack); + netdev_put(netdev, &tracker); + } +} + /** * pse_controller_register - register a PSE controller device * @pcdev: a pointer to the initialized PSE controller device @@ -652,6 +1046,13 @@ int pse_controller_register(struct pse_controller_dev= *pcdev) =20 mutex_init(&pcdev->lock); INIT_LIST_HEAD(&pcdev->pse_control_head); + spin_lock_init(&pcdev->ntf_fifo_lock); + ret =3D kfifo_alloc(&pcdev->ntf_fifo, pcdev->nr_lines, GFP_KERNEL); + if (ret) { + dev_err(pcdev->dev, "failed to allocate kfifo notifications\n"); + return ret; + } + INIT_WORK(&pcdev->ntf_work, pse_send_ntf_worker); =20 if (!pcdev->nr_lines) pcdev->nr_lines =3D 1; @@ -718,6 +1119,10 @@ void pse_controller_unregister(struct pse_controller_= dev *pcdev) { pse_flush_pw_ds(pcdev); pse_release_pis(pcdev); + if (pcdev->irq) + disable_irq(pcdev->irq); + cancel_work_sync(&pcdev->ntf_work); + kfifo_free(&pcdev->ntf_fifo); mutex_lock(&pse_list_mutex); list_del(&pcdev->list); mutex_unlock(&pse_list_mutex); @@ -789,6 +1194,52 @@ static unsigned long pse_to_regulator_notifs(unsigned= long notifs) return rnotifs; } =20 +/** + * pse_set_config_isr - Set PSE control config according to the PSE + * notifications + * @pcdev: a pointer to the PSE + * @id: index of the PSE control + * @notifs: PSE event notifications + * @extack: extack for error reporting + * + * Return: 0 on success and failure value on error + */ +static int pse_set_config_isr(struct pse_controller_dev *pcdev, int id, + unsigned long notifs, + struct netlink_ext_ack *extack) +{ + int ret =3D 0; + + if (notifs & PSE_BUDGET_EVAL_STRAT_DYNAMIC) + return 0; + + if ((notifs & ETHTOOL_C33_PSE_EVENT_DISCONNECTION) && + ((notifs & ETHTOOL_C33_PSE_EVENT_DETECTION) || + (notifs & ETHTOOL_C33_PSE_EVENT_CLASSIFICATION))) { + NL_SET_ERR_MSG_FMT(extack, + "PI %d: error, connection and disconnection reported simultaneously= ", + id); + return -EINVAL; + } + + if (notifs & ETHTOOL_C33_PSE_EVENT_CLASSIFICATION) { + pcdev->pi[id].isr_pd_detected =3D true; + if (pcdev->pi[id].admin_state_enabled) { + ret =3D _pse_pi_delivery_power_sw_pw_ctrl(pcdev, id, + extack); + if (ret =3D=3D -ERANGE) + ret =3D 0; + } + } else if (notifs & ETHTOOL_C33_PSE_EVENT_DISCONNECTION) { + if (pcdev->pi[id].admin_state_enabled && + pcdev->pi[id].isr_pd_detected) + ret =3D _pse_pi_disable(pcdev, id); + pcdev->pi[id].isr_pd_detected =3D false; + } + + return ret; +} + /** * pse_isr - IRQ handler for PSE * @irq: irq number @@ -798,7 +1249,6 @@ static unsigned long pse_to_regulator_notifs(unsigned = long notifs) */ static irqreturn_t pse_isr(int irq, void *data) { - struct netlink_ext_ack extack =3D {}; struct pse_controller_dev *pcdev; unsigned long notifs_mask =3D 0; struct pse_irq_desc *desc; @@ -812,32 +1262,41 @@ static irqreturn_t pse_isr(int irq, void *data) memset(h->notifs, 0, pcdev->nr_lines * sizeof(*h->notifs)); mutex_lock(&pcdev->lock); ret =3D desc->map_event(irq, pcdev, h->notifs, ¬ifs_mask); - mutex_unlock(&pcdev->lock); - if (ret || !notifs_mask) + if (ret || !notifs_mask) { + mutex_unlock(&pcdev->lock); return IRQ_NONE; + } =20 for_each_set_bit(i, ¬ifs_mask, pcdev->nr_lines) { unsigned long notifs, rnotifs; - struct net_device *netdev; - netdevice_tracker tracker; + struct pse_ntf ntf =3D {}; =20 /* Do nothing PI not described */ if (!pcdev->pi[i].rdev) continue; =20 notifs =3D h->notifs[i]; + if (pse_pw_d_is_sw_pw_control(pcdev, pcdev->pi[i].pw_d)) { + ret =3D pse_set_config_isr(pcdev, i, notifs, &ntf.extack); + if (ret) + notifs |=3D ETHTOOL_PSE_EVENT_SW_PW_CONTROL_ERROR; + } + dev_dbg(h->pcdev->dev, "Sending PSE notification EVT 0x%lx\n", notifs); =20 - netdev =3D pse_control_find_net_by_id(pcdev, i, &tracker); - if (netdev) - ethnl_pse_send_ntf(netdev, notifs, &extack); - netdev_put(netdev, &tracker); + ntf.notifs =3D notifs; + ntf.id =3D i; + kfifo_in_spinlocked(&pcdev->ntf_fifo, &ntf, 1, + &pcdev->ntf_fifo_lock); + schedule_work(&pcdev->ntf_work); rnotifs =3D pse_to_regulator_notifs(notifs); regulator_notifier_call_chain(pcdev->pi[i].rdev, rnotifs, NULL); } =20 + mutex_unlock(&pcdev->lock); + return IRQ_HANDLED; } =20 @@ -960,6 +1419,20 @@ pse_control_get_internal(struct pse_controller_dev *p= cdev, unsigned int index, goto free_psec; } =20 + if (!pcdev->ops->pi_get_admin_state) { + ret =3D -EOPNOTSUPP; + goto free_psec; + } + + /* Initialize admin_state_enabled before the regulator_get. This + * aims to have the right value reported in the first is_enabled + * call in case of control managed by software. + */ + ret =3D pse_pi_is_hw_enabled(pcdev, index); + if (ret < 0) + goto free_psec; + + pcdev->pi[index].admin_state_enabled =3D ret; psec->ps =3D devm_regulator_get_exclusive(pcdev->dev, rdev_get_name(pcdev->pi[index].rdev)); if (IS_ERR(psec->ps)) { @@ -967,12 +1440,6 @@ pse_control_get_internal(struct pse_controller_dev *p= cdev, unsigned int index, goto put_module; } =20 - ret =3D regulator_is_enabled(psec->ps); - if (ret < 0) - goto regulator_put; - - pcdev->pi[index].admin_state_enabled =3D ret; - psec->pcdev =3D pcdev; list_add(&psec->list, &pcdev->pse_control_head); psec->id =3D index; @@ -981,8 +1448,6 @@ pse_control_get_internal(struct pse_controller_dev *pc= dev, unsigned int index, =20 return psec; =20 -regulator_put: - devm_regulator_put(psec->ps); put_module: module_put(pcdev->owner); free_psec: @@ -1093,6 +1558,35 @@ struct pse_control *of_pse_control_get(struct device= _node *node, } EXPORT_SYMBOL_GPL(of_pse_control_get); =20 +/** + * pse_get_sw_admin_state - Convert the software admin state to c33 or podl + * admin state value used in the standard + * @psec: PSE control pointer + * @admin_state: a pointer to the admin_state structure + */ +static void pse_get_sw_admin_state(struct pse_control *psec, + struct pse_admin_state *admin_state) +{ + struct pse_pi *pi =3D &psec->pcdev->pi[psec->id]; + + if (pse_has_podl(psec)) { + if (pi->admin_state_enabled) + admin_state->podl_admin_state =3D + ETHTOOL_PODL_PSE_ADMIN_STATE_ENABLED; + else + admin_state->podl_admin_state =3D + ETHTOOL_PODL_PSE_ADMIN_STATE_DISABLED; + } + if (pse_has_c33(psec)) { + if (pi->admin_state_enabled) + admin_state->c33_admin_state =3D + ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED; + else + admin_state->c33_admin_state =3D + ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED; + } +} + /** * pse_ethtool_get_status - get status of PSE control * @psec: PSE control pointer @@ -1109,19 +1603,46 @@ int pse_ethtool_get_status(struct pse_control *psec, struct pse_pw_status pw_status =3D {0}; const struct pse_controller_ops *ops; struct pse_controller_dev *pcdev; + struct pse_pi *pi; int ret; =20 pcdev =3D psec->pcdev; ops =3D pcdev->ops; + + pi =3D &pcdev->pi[psec->id]; mutex_lock(&pcdev->lock); - if (pcdev->pi[psec->id].pw_d) - status->pw_d_id =3D pcdev->pi[psec->id].pw_d->id; + if (pi->pw_d) { + status->pw_d_id =3D pi->pw_d->id; + if (pse_pw_d_is_sw_pw_control(pcdev, pi->pw_d)) { + pse_get_sw_admin_state(psec, &admin_state); + } else { + ret =3D ops->pi_get_admin_state(pcdev, psec->id, + &admin_state); + if (ret) + goto out; + } + status->podl_admin_state =3D admin_state.podl_admin_state; + status->c33_admin_state =3D admin_state.c33_admin_state; =20 - ret =3D ops->pi_get_admin_state(pcdev, psec->id, &admin_state); - if (ret) - goto out; - status->podl_admin_state =3D admin_state.podl_admin_state; - status->c33_admin_state =3D admin_state.c33_admin_state; + switch (pi->pw_d->budget_eval_strategy) { + case PSE_BUDGET_EVAL_STRAT_STATIC: + status->prio_max =3D pcdev->nr_lines - 1; + status->prio =3D pi->prio; + break; + case PSE_BUDGET_EVAL_STRAT_DYNAMIC: + status->prio_max =3D pcdev->pis_prio_max; + if (ops->pi_get_prio) { + ret =3D ops->pi_get_prio(pcdev, psec->id); + if (ret < 0) + goto out; + + status->prio =3D ret; + } + break; + default: + break; + } + } =20 ret =3D ops->pi_get_pw_status(pcdev, psec->id, &pw_status); if (ret) @@ -1270,6 +1791,52 @@ int pse_ethtool_set_config(struct pse_control *psec, } EXPORT_SYMBOL_GPL(pse_ethtool_set_config); =20 +/** + * pse_pi_update_pw_budget - Update PSE power budget allocated with new + * power in mW + * @pcdev: a pointer to the PSE controller device + * @id: index of the PSE PI + * @pw_req: power requested + * @extack: extack for reporting useful error messages + * + * Return: Previous power allocated on success and failure value on error + */ +static int pse_pi_update_pw_budget(struct pse_controller_dev *pcdev, int i= d, + const unsigned int pw_req, + struct netlink_ext_ack *extack) +{ + struct pse_pi *pi =3D &pcdev->pi[id]; + int previous_pw_allocated; + int pw_diff, ret =3D 0; + + /* We don't want pw_allocated_mW value change in the middle of an + * power budget update + */ + mutex_lock(&pcdev->lock); + previous_pw_allocated =3D pi->pw_allocated_mW; + pw_diff =3D pw_req - previous_pw_allocated; + if (!pw_diff) { + goto out; + } else if (pw_diff > 0) { + ret =3D regulator_request_power_budget(pi->pw_d->supply, pw_diff); + if (ret) { + NL_SET_ERR_MSG_FMT(extack, + "PI %d: not enough power budget available", + id); + goto out; + } + + } else { + regulator_free_power_budget(pi->pw_d->supply, -pw_diff); + } + pi->pw_allocated_mW =3D pw_req; + ret =3D previous_pw_allocated; + +out: + mutex_unlock(&pcdev->lock); + return ret; +} + /** * pse_ethtool_set_pw_limit - set PSE control power limit * @psec: PSE control pointer @@ -1282,7 +1849,7 @@ int pse_ethtool_set_pw_limit(struct pse_control *psec, struct netlink_ext_ack *extack, const unsigned int pw_limit) { - int uV, uA, ret; + int uV, uA, ret, previous_pw_allocated =3D 0; s64 tmp_64; =20 if (pw_limit > MAX_PI_PW) @@ -1306,10 +1873,100 @@ int pse_ethtool_set_pw_limit(struct pse_control *p= sec, /* uA =3D mW * 1000000000 / uV */ uA =3D DIV_ROUND_CLOSEST_ULL(tmp_64, uV); =20 - return regulator_set_current_limit(psec->ps, 0, uA); + /* Update power budget only in software power control case and + * if a Power Device is powered. + */ + if (pse_pw_d_is_sw_pw_control(psec->pcdev, + psec->pcdev->pi[psec->id].pw_d) && + psec->pcdev->pi[psec->id].admin_state_enabled && + psec->pcdev->pi[psec->id].isr_pd_detected) { + ret =3D pse_pi_update_pw_budget(psec->pcdev, psec->id, + pw_limit, extack); + if (ret < 0) + return ret; + previous_pw_allocated =3D ret; + } + + ret =3D regulator_set_current_limit(psec->ps, 0, uA); + if (ret < 0 && previous_pw_allocated) { + pse_pi_update_pw_budget(psec->pcdev, psec->id, + previous_pw_allocated, extack); + } + + return ret; } EXPORT_SYMBOL_GPL(pse_ethtool_set_pw_limit); =20 +/** + * pse_ethtool_set_prio - Set PSE PI priority according to the budget + * evaluation strategy + * @psec: PSE control pointer + * @extack: extack for reporting useful error messages + * @prio: priovity value + * + * Return: 0 on success and failure value on error + */ +int pse_ethtool_set_prio(struct pse_control *psec, + struct netlink_ext_ack *extack, + unsigned int prio) +{ + struct pse_controller_dev *pcdev =3D psec->pcdev; + const struct pse_controller_ops *ops; + int ret =3D 0; + + if (!pcdev->pi[psec->id].pw_d) { + NL_SET_ERR_MSG(extack, "no power domain attached"); + return -EOPNOTSUPP; + } + + /* We don't want priority change in the middle of an + * enable/disable call or a priority mode change + */ + mutex_lock(&pcdev->lock); + switch (pcdev->pi[psec->id].pw_d->budget_eval_strategy) { + case PSE_BUDGET_EVAL_STRAT_STATIC: + if (prio >=3D pcdev->nr_lines) { + NL_SET_ERR_MSG_FMT(extack, + "priority %d exceed priority max %d", + prio, pcdev->nr_lines); + ret =3D -ERANGE; + goto out; + } + + pcdev->pi[psec->id].prio =3D prio; + pse_pw_d_retry_power_delivery(pcdev, pcdev->pi[psec->id].pw_d); + break; + + case PSE_BUDGET_EVAL_STRAT_DYNAMIC: + ops =3D psec->pcdev->ops; + if (!ops->pi_set_prio) { + NL_SET_ERR_MSG(extack, + "pse driver does not support setting port priority"); + ret =3D -EOPNOTSUPP; + goto out; + } + + if (prio > pcdev->pis_prio_max) { + NL_SET_ERR_MSG_FMT(extack, + "priority %d exceed priority max %d", + prio, pcdev->pis_prio_max); + ret =3D -ERANGE; + goto out; + } + + ret =3D ops->pi_set_prio(pcdev, psec->id, prio); + break; + + default: + ret =3D -EOPNOTSUPP; + } + +out: + mutex_unlock(&pcdev->lock); + return ret; +} +EXPORT_SYMBOL_GPL(pse_ethtool_set_prio); + bool pse_has_podl(struct pse_control *psec) { return psec->pcdev->types & ETHTOOL_PSE_PODL; diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index 2f8ecfd87d43..b678f4d77505 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -6,6 +6,8 @@ #define _LINUX_PSE_CONTROLLER_H =20 #include +#include +#include #include #include #include @@ -134,6 +136,9 @@ struct pse_pw_limit_ranges { * is in charge of the memory allocation * @c33_pw_limit_nb_ranges: number of supported power limit configuration * ranges + * @prio_max: max priority allowed for the c33_prio variable value. + * @prio: priority of the PSE. Managed by PSE core in case of static budget + * evaluation strategy. */ struct ethtool_pse_control_status { u32 pw_d_id; @@ -147,6 +152,8 @@ struct ethtool_pse_control_status { u32 c33_avail_pw_limit; struct ethtool_c33_pse_pw_limit_range *c33_pw_limit_ranges; u32 c33_pw_limit_nb_ranges; + u32 prio_max; + u32 prio; }; =20 /** @@ -170,6 +177,11 @@ struct ethtool_pse_control_status { * range. The driver is in charge of the memory * allocation and should return the number of * ranges. + * @pi_get_prio: Get the PSE PI priority. + * @pi_set_prio: Configure the PSE PI priority. + * @pi_get_pw_req: Get the power requested by a PD before enabling the PSE= PI. + * This is only relevant when an interrupt is registered using + * devm_pse_irq_helper helper. */ struct pse_controller_ops { int (*setup_pi_matrix)(struct pse_controller_dev *pcdev); @@ -190,6 +202,10 @@ struct pse_controller_ops { int id, int max_mW); int (*pi_get_pw_limit_ranges)(struct pse_controller_dev *pcdev, int id, struct pse_pw_limit_ranges *pw_limit_ranges); + int (*pi_get_prio)(struct pse_controller_dev *pcdev, int id); + int (*pi_set_prio)(struct pse_controller_dev *pcdev, int id, + unsigned int prio); + int (*pi_get_pw_req)(struct pse_controller_dev *pcdev, int id); }; =20 struct module; @@ -225,6 +241,13 @@ struct pse_pi_pairset { * @rdev: regulator represented by the PSE PI * @admin_state_enabled: PI enabled state * @pw_d: Power domain of the PSE PI + * @prio: Priority of the PSE PI. Used in static budget evaluation strategy + * @isr_pd_detected: PSE PI detection status managed by the interruption + * handler. This variable is relevant when the power enabled + * management is managed in software like the static + * budget evaluation strategy. + * @pw_allocated_mW: Power allocated to a PSE PI to manage power budget in + * static budget evaluation strategy. */ struct pse_pi { struct pse_pi_pairset pairset[2]; @@ -232,6 +255,22 @@ struct pse_pi { struct regulator_dev *rdev; bool admin_state_enabled; struct pse_power_domain *pw_d; + int prio; + bool isr_pd_detected; + int pw_allocated_mW; +}; + +/** + * struct pse_ntf - PSE notification element + * + * @id: ID of the PSE control + * @notifs: PSE notifications to be reported + * @extack: extack for reporting error messages + */ +struct pse_ntf { + int id; + unsigned long notifs; + struct netlink_ext_ack extack; }; =20 /** @@ -249,6 +288,12 @@ struct pse_pi { * @pi: table of PSE PIs described in this controller device * @no_of_pse_pi: flag set if the pse_pis devicetree node is not used * @irq: PSE interrupt + * @pis_prio_max: Maximum value allowed for the PSE PIs priority + * @supp_budget_eval_strategies: budget evaluation strategies supported + * by the PSE + * @ntf_work: workqueue for PSE notification management + * @ntf_fifo: PSE notifications FIFO + * @ntf_fifo_lock: protect @ntf_fifo writer */ struct pse_controller_dev { const struct pse_controller_ops *ops; @@ -263,6 +308,29 @@ struct pse_controller_dev { struct pse_pi *pi; bool no_of_pse_pi; int irq; + unsigned int pis_prio_max; + u32 supp_budget_eval_strategies; + struct work_struct ntf_work; + DECLARE_KFIFO_PTR(ntf_fifo, struct pse_ntf); + spinlock_t ntf_fifo_lock; /* Protect @ntf_fifo writer */ +}; + +/** + * enum pse_budget_eval_strategies - PSE budget evaluation strategies. + * @PSE_BUDGET_EVAL_STRAT_DISABLED: Budget evaluation strategy disabled. + * @PSE_BUDGET_EVAL_STRAT_STATIC: PSE static budget evaluation strategy. + * Budget evaluation strategy based on the power requested during PD + * classification. This strategy is managed by the PSE core. + * @PSE_BUDGET_EVAL_STRAT_DYNAMIC: PSE dynamic budget evaluation + * strategy. Budget evaluation strategy based on the current consumption + * per ports compared to the total power budget. This mode is managed by + * the PSE controller. + */ + +enum pse_budget_eval_strategies { + PSE_BUDGET_EVAL_STRAT_DISABLED =3D 1 << 0, + PSE_BUDGET_EVAL_STRAT_STATIC =3D 1 << 1, + PSE_BUDGET_EVAL_STRAT_DYNAMIC =3D 1 << 2, }; =20 #if IS_ENABLED(CONFIG_PSE_CONTROLLER) @@ -287,6 +355,9 @@ int pse_ethtool_set_config(struct pse_control *psec, int pse_ethtool_set_pw_limit(struct pse_control *psec, struct netlink_ext_ack *extack, const unsigned int pw_limit); +int pse_ethtool_set_prio(struct pse_control *psec, + struct netlink_ext_ack *extack, + unsigned int prio); =20 bool pse_has_podl(struct pse_control *psec); bool pse_has_c33(struct pse_control *psec); @@ -324,6 +395,13 @@ static inline int pse_ethtool_set_pw_limit(struct pse_= control *psec, return -EOPNOTSUPP; } =20 +static inline int pse_ethtool_set_prio(struct pse_control *psec, + struct netlink_ext_ack *extack, + unsigned int prio) +{ + return -EOPNOTSUPP; +} + static inline bool pse_has_podl(struct pse_control *psec) { return false; diff --git a/include/uapi/linux/ethtool_netlink_generated.h b/include/uapi/= linux/ethtool_netlink_generated.h index ed344c8533eb..c6a95224be25 100644 --- a/include/uapi/linux/ethtool_netlink_generated.h +++ b/include/uapi/linux/ethtool_netlink_generated.h @@ -53,10 +53,28 @@ enum hwtstamp_source { * enum ethtool_pse_event - PSE event list for the PSE controller * @ETHTOOL_PSE_EVENT_OVER_CURRENT: PSE output current is too high * @ETHTOOL_PSE_EVENT_OVER_TEMP: PSE in over temperature state + * @ETHTOOL_C33_PSE_EVENT_DETECTION: detection process occur on the PSE. I= EEE + * 802.3-2022 33.2.5 and 145.2.6 PSE detection of PDs. IEEE 802.3-202 + * 30.9.1.1.5 aPSEPowerDetectionStatus + * @ETHTOOL_C33_PSE_EVENT_CLASSIFICATION: classification process occur on = the + * PSE. IEEE 802.3-2022 33.2.6 and 145.2.8 classification of PDs mutual + * identification. IEEE 802.3-2022 30.9.1.1.8 aPSEPowerClassification. + * @ETHTOOL_C33_PSE_EVENT_DISCONNECTION: PD has been disconnected on the P= SE. + * IEEE 802.3-2022 33.3.8 and 145.3.9 PD Maintain Power Signature. IEEE + * 802.3-2022 33.5.1.2.9 MPS Absent. IEEE 802.3-2022 30.9.1.1.20 + * aPSEMPSAbsentCounter. + * @ETHTOOL_PSE_EVENT_OVER_BUDGET: PSE turned off due to over budget situa= tion + * @ETHTOOL_PSE_EVENT_SW_PW_CONTROL_ERROR: PSE faced an error managing the + * power control from software */ enum ethtool_pse_event { ETHTOOL_PSE_EVENT_OVER_CURRENT =3D 1, ETHTOOL_PSE_EVENT_OVER_TEMP =3D 2, + ETHTOOL_C33_PSE_EVENT_DETECTION =3D 4, + ETHTOOL_C33_PSE_EVENT_CLASSIFICATION =3D 8, + ETHTOOL_C33_PSE_EVENT_DISCONNECTION =3D 16, + ETHTOOL_PSE_EVENT_OVER_BUDGET =3D 32, + ETHTOOL_PSE_EVENT_SW_PW_CONTROL_ERROR =3D 64, }; =20 enum { --=20 2.43.0 From nobody Fri Dec 19 16:23:04 2025 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E6A2B1EA7EB; Sat, 24 May 2025 10:57:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748084229; cv=none; b=uXQTss7uv+X6TrpQ42wx9UC5VflRGfGQ7/TkITjxBdKRIaTbl5EHboTB63osZ9RghqUGhQluQU8Q/8jU7vOWg2GcvEkaKXiTS+s/p+OAw36VzBnRewO1+HSXsjCXE2cChiITHQvMYsiD3pXAg5C2CEWx83Sijy0rXCUrFl/DvV0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748084229; c=relaxed/simple; bh=u4pCWT73D02B84xdcDalM6ByuETyn08cPnEzf+l8USw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=k9hARBaKvHB1jS+tMFfl4DRd9JEPYkCeGJWvlsfqQ1ooOGW/2nH0A5XtH2wi5tkJbNhTif6qvEM2aBw6sC8765n1KXbnJnvzwPnj4Mphw81heo0FoT7kmG/7mjmN5saQjWZWzRRj09PgO4GgpAxM0E7Aw93F/gNZaVhYbY0uImE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=anf/Z1e3; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="anf/Z1e3" Received: by mail.gandi.net (Postfix) with ESMTPSA id 4CA984397A; Sat, 24 May 2025 10:57:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1748084225; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yYaJke8lt2hkKTSKnlPQPC0yT0kZjHMNjxfd0bzFsKU=; b=anf/Z1e3D/X4SrS00skO7ZRRr4PWbkI8QT2SYvxl7rzHTJcWFW/UGncJSQ1DTCU63JLVht 4GKSiZjoHkA9mMIONsPW6PInEtXDe9pgHcy20TJplTtOVVfbUyOQsnpP6m2kwQaoTSXBu4 9DSSxUJgoOCH0wN40TLzW/TQRfjVjkYxECLnxnlni67VZrmGJ+4RKIac/vTPH2cu4BRddc 4O2J2GDUzyRlY3/J0LmiDxvMk+fLQwdYpbgfTBDegAJNcLQTZEg+/KkDAd3lv6nWsQgBHx eduIy5/AHwHbbkPgctgAk9IGTn2eVTsy/EYI3w+Vw27/zZMMokjTIu2i4vQesw== From: Kory Maincent Date: Sat, 24 May 2025 12:56:10 +0200 Subject: [PATCH net-next v12 08/13] net: ethtool: Add PSE port priority support feature Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250524-feature_poe_port_prio-v12-8-d65fd61df7a7@bootlin.com> References: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> In-Reply-To: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Krzysztof Kozlowski , Conor Dooley Cc: Liam Girdwood , Mark Brown , Thomas Petazzoni , netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, "Kory Maincent (Dent Project)" X-Mailer: b4 0.15-dev-8cb71 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtddtgdduudehgeculddtuddrgeefvddrtddtmdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpefmohhrhicuofgrihhntggvnhhtuceokhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepvefgvdfgkeetgfefgfegkedugffghfdtffeftdeuteehjedtvdelvddvleehtdevnecukfhppedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikeenucevlhhushhtvghrufhiiigvpeegnecurfgrrhgrmhepihhnvghtpedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikedphhgvlhhopegluddvjedrtddruddrudgnpdhmrghilhhfrhhomhepkhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepvdejpdhrtghpthhtohepkhihlhgvrdhsfigvnhhsohhnsegvshhtrdhtvggthhdprhgtphhtthhopegurghvvghmsegurghvvghmlhhofhhtrdhnvghtpdhrtghpthhtoheptghonhhorhdoughtsehkvghrnhgvlhdrohhrghdprhgtp hhtthhopehlihhnuhigqdhkvghrnhgvlhesvhhgvghrrdhkvghrnhgvlhdrohhrghdprhgtphhtthhopehkohhrhidrmhgrihhntggvnhhtsegsohhothhlihhnrdgtohhmpdhrtghpthhtoheptghorhgsvghtsehlfihnrdhnvghtpdhrtghpthhtoheprghnughrvgifsehluhhnnhdrtghhpdhrtghpthhtoheprghnughrvgifodhnvghtuggvvheslhhunhhnrdgthh X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) This patch expands the status information provided by ethtool for PSE c33 with current port priority and max port priority. It also adds a call to pse_ethtool_set_prio() to configure the PSE port priority. Signed-off-by: Kory Maincent (Dent Project) Reviewed-by: Oleksij Rempel --- Change in v6: - Remove c33 standard reference from new netlink field in documentation. - Remove report of budget evaluation strategy. Change in v4: - Remove disconnection policy features. - Rename port priority to budget evaluation strategy. Change in v3: - Add disconnection policy. Change in v2: - Improve port priority documentation. - Add port priority modes. --- Documentation/netlink/specs/ethtool.yaml | 11 +++++++++++ Documentation/networking/ethtool-netlink.rst | 26 ++++++++++++++++++++++= ++++ include/uapi/linux/ethtool_netlink_generated.h | 2 ++ net/ethtool/pse-pd.c | 18 ++++++++++++++++++ 4 files changed, 57 insertions(+) diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netli= nk/specs/ethtool.yaml index bb09aa4ed1ba..baf71541521e 100644 --- a/Documentation/netlink/specs/ethtool.yaml +++ b/Documentation/netlink/specs/ethtool.yaml @@ -1434,6 +1434,14 @@ attribute-sets: name: pse-pw-d-id type: u32 name-prefix: ethtool-a- + - + name: pse-prio-max + type: u32 + name-prefix: ethtool-a- + - + name: pse-prio + type: u32 + name-prefix: ethtool-a- - name: rss attr-cnt-name: __ethtool-a-rss-cnt @@ -2258,6 +2266,8 @@ operations: - c33-pse-avail-pw-limit - c33-pse-pw-limit-ranges - pse-pw-d-id + - pse-prio-max + - pse-prio dump: *pse-get-op - name: pse-set @@ -2272,6 +2282,7 @@ operations: - podl-pse-admin-control - c33-pse-admin-control - c33-pse-avail-pw-limit + - pse-prio - name: rss-get doc: Get RSS params. diff --git a/Documentation/networking/ethtool-netlink.rst b/Documentation/n= etworking/ethtool-netlink.rst index e9af8e58564c..e45bb555e909 100644 --- a/Documentation/networking/ethtool-netlink.rst +++ b/Documentation/networking/ethtool-netlink.rst @@ -1790,6 +1790,10 @@ Kernel response contents: ``ETHTOOL_A_C33_PSE_PW_LIMIT_RANGES`` nested Supported power limit configuration ranges. ``ETHTOOL_A_PSE_PW_D_ID`` u32 Index of the PSE pow= er domain + ``ETHTOOL_A_PSE_PRIO_MAX`` u32 Priority maximum con= figurable + on the PoE PSE + ``ETHTOOL_A_PSE_PRIO`` u32 Priority of the PoE = PSE + currently configured =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D = =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D =20 When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_STATE`` attribute identi= fies @@ -1866,6 +1870,12 @@ equal. The ``ETHTOOL_A_PSE_PW_D_ID`` attribute identifies the index of PSE power domain. =20 +When set, the optional ``ETHTOOL_A_PSE_PRIO_MAX`` attribute identifies +the PSE maximum priority value. +When set, the optional ``ETHTOOL_A_PSE_PRIO`` attributes is used to +identifies the currently configured PSE priority. +For a description of PSE priority attributes, see ``PSE_SET``. + PSE_SET =3D=3D=3D=3D=3D=3D=3D =20 @@ -1879,6 +1889,8 @@ Request contents: ``ETHTOOL_A_C33_PSE_ADMIN_CONTROL`` u32 Control PSE Admin state ``ETHTOOL_A_C33_PSE_AVAIL_PWR_LIMIT`` u32 Control PoE PSE available power limit + ``ETHTOOL_A_PSE_PRIO`` u32 Control priority of the + PoE PSE =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D =3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D =20 When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_CONTROL`` attribute is u= sed @@ -1901,6 +1913,20 @@ various existing products that document power consum= ption in watts rather than classes. If power limit configuration based on classes is needed, the conversion can be done in user space, for example by ethtool. =20 +When set, the optional ``ETHTOOL_A_PSE_PRIO`` attributes is used to +control the PSE priority. Allowed priority value are between zero and +the value of ``ETHTOOL_A_PSE_PRIO_MAX`` attribute. + +A lower value indicates a higher priority, meaning that a priority value +of 0 corresponds to the highest port priority. +Port priority serves two functions: + + - Power-up Order: After a reset, ports are powered up in order of their + priority from highest to lowest. Ports with higher priority + (lower values) power up first. + - Shutdown Order: When the power budget is exceeded, ports with lower + priority (higher values) are turned off first. + PSE_NTF =3D=3D=3D=3D=3D=3D=3D =20 diff --git a/include/uapi/linux/ethtool_netlink_generated.h b/include/uapi/= linux/ethtool_netlink_generated.h index c6a95224be25..8e5d067e7ddf 100644 --- a/include/uapi/linux/ethtool_netlink_generated.h +++ b/include/uapi/linux/ethtool_netlink_generated.h @@ -671,6 +671,8 @@ enum { ETHTOOL_A_C33_PSE_AVAIL_PW_LIMIT, ETHTOOL_A_C33_PSE_PW_LIMIT_RANGES, ETHTOOL_A_PSE_PW_D_ID, + ETHTOOL_A_PSE_PRIO_MAX, + ETHTOOL_A_PSE_PRIO, =20 __ETHTOOL_A_PSE_CNT, ETHTOOL_A_PSE_MAX =3D (__ETHTOOL_A_PSE_CNT - 1) diff --git a/net/ethtool/pse-pd.c b/net/ethtool/pse-pd.c index 6cc0beee2882..7f57963797f1 100644 --- a/net/ethtool/pse-pd.c +++ b/net/ethtool/pse-pd.c @@ -111,6 +111,9 @@ static int pse_reply_size(const struct ethnl_req_info *= req_base, len +=3D st->c33_pw_limit_nb_ranges * (nla_total_size(0) + nla_total_size(sizeof(u32)) * 2); + if (st->prio_max) + /* _PSE_PRIO_MAX + _PSE_PRIO */ + len +=3D nla_total_size(sizeof(u32)) * 2; =20 return len; } @@ -205,6 +208,11 @@ static int pse_fill_reply(struct sk_buff *skb, pse_put_pw_limit_ranges(skb, st)) return -EMSGSIZE; =20 + if (st->prio_max > 0 && + (nla_put_u32(skb, ETHTOOL_A_PSE_PRIO_MAX, st->prio_max) || + nla_put_u32(skb, ETHTOOL_A_PSE_PRIO, st->prio))) + return -EMSGSIZE; + return 0; } =20 @@ -226,6 +234,7 @@ const struct nla_policy ethnl_pse_set_policy[ETHTOOL_A_= PSE_MAX + 1] =3D { NLA_POLICY_RANGE(NLA_U32, ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED, ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED), [ETHTOOL_A_C33_PSE_AVAIL_PW_LIMIT] =3D { .type =3D NLA_U32 }, + [ETHTOOL_A_PSE_PRIO] =3D { .type =3D NLA_U32 }, }; =20 static int @@ -274,6 +283,15 @@ ethnl_set_pse(struct ethnl_req_info *req_info, struct = genl_info *info) if (ret) return ret; =20 + if (tb[ETHTOOL_A_PSE_PRIO]) { + unsigned int prio; + + prio =3D nla_get_u32(tb[ETHTOOL_A_PSE_PRIO]); + ret =3D pse_ethtool_set_prio(phydev->psec, info->extack, prio); + if (ret) + return ret; + } + if (tb[ETHTOOL_A_C33_PSE_AVAIL_PW_LIMIT]) { unsigned int pw_limit; =20 --=20 2.43.0 From nobody Fri Dec 19 16:23:04 2025 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9BF241EC01D; Sat, 24 May 2025 10:57:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748084231; cv=none; b=r8V0nMui4RIqZuI2psM0SxORbwSHcjXS2JopU5TimH3tTnYxwP8yW6NMAOnHIP9KR6t/+UCODjecw7NT9KcrLeEBS8RxiaRlXrkK2oqZ/PgY7ejtCRbv0ARB5cfdtbpyxB0/ygUbyXbpPPB4lwgA3jjONC58BuhO9S8w88r+R6o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748084231; c=relaxed/simple; bh=6CgKAAUo2JHD7yFHhbo+1T4kIagvIlgRJCvhKYrQlbU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BGnqVD/3efeZkILvsbVwLHW2CLXYoshZfdhDSAhMJBGKIva/UTlYXbYMZePiIAdtTdpcHP4vlyGkgz6IX05c4EejmiLRNotqpeY6y7xzWwBxVcTYUg/GaZyRORtAPGpRUW1MW/0+vmzTfkR9utNuSdcrTfw1BikwZwxqcu+QJ7s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=eqNmAIX7; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="eqNmAIX7" Received: by mail.gandi.net (Postfix) with ESMTPSA id B22C84397E; Sat, 24 May 2025 10:57:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1748084227; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ZDG/Y1XmDGe9GkL9daMK3NUZhybT+HAZPX9S1Ul60BE=; b=eqNmAIX7/B2zBRd5dgI8TEescTCQ2c+jlfa9sWzEoQEBEMenVliJsHj1UZ3RbChnXYivsJ RWgxIR3HvC8GHSnsqd/kI6OEWFFGfb3Uvc4JEHISNeh79KScXIddneFd5kX95s+vpnNctE Ng/yXo/8fiofad69NBD9EA7Za4HnWybde5RmVW7s1yjRS1CdzNWO3CygQY+qQUz2ybn1Iy 7W1/C4VWy9dDTxNyKoX4MTwc3geLJP3hbKMx7Rhbp1Y10ip/lNIG1tw4pqkzXRsRe8BlXS eGGfCOPlEbUtgYSiHwMctvaNB7H6ZhkyvWrUQTk97IXJY/mnWcOoCDxDyhaaog== From: Kory Maincent Date: Sat, 24 May 2025 12:56:11 +0200 Subject: [PATCH net-next v12 09/13] net: pse-pd: pd692x0: Add support for PSE PI priority feature Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250524-feature_poe_port_prio-v12-9-d65fd61df7a7@bootlin.com> References: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> In-Reply-To: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Krzysztof Kozlowski , Conor Dooley Cc: Liam Girdwood , Mark Brown , Thomas Petazzoni , netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, "Kory Maincent (Dent Project)" X-Mailer: b4 0.15-dev-8cb71 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtddtgdduudehgeculddtuddrgeefvddrtddtmdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpefmohhrhicuofgrihhntggvnhhtuceokhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepvefgvdfgkeetgfefgfegkedugffghfdtffeftdeuteehjedtvdelvddvleehtdevnecukfhppedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikeenucevlhhushhtvghrufhiiigvpeejnecurfgrrhgrmhepihhnvghtpedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikedphhgvlhhopegluddvjedrtddruddrudgnpdhmrghilhhfrhhomhepkhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepvdejpdhrtghpthhtohepkhihlhgvrdhsfigvnhhsohhnsegvshhtrdhtvggthhdprhgtphhtthhopegurghvvghmsegurghvvghmlhhofhhtrdhnvghtpdhrtghpthhtoheptghonhhorhdoughtsehkvghrnhgvlhdrohhrghdprhgtp hhtthhopehlihhnuhigqdhkvghrnhgvlhesvhhgvghrrdhkvghrnhgvlhdrohhrghdprhgtphhtthhopehkohhrhidrmhgrihhntggvnhhtsegsohhothhlihhnrdgtohhmpdhrtghpthhtoheptghorhgsvghtsehlfihnrdhnvghtpdhrtghpthhtoheprghnughrvgifsehluhhnnhdrtghhpdhrtghpthhtoheprghnughrvgifodhnvghtuggvvheslhhunhhnrdgthh X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) This patch extends the PSE callbacks by adding support for the newly introduced pi_set_prio() callback, enabling the configuration of PSE PI priorities. The current port priority is now also included in the status information returned to users. Signed-off-by: Kory Maincent (Dent Project) Reviewed-by: Oleksij Rempel --- Changes in v7: - Nitpick change. Changes in v3: - New patch --- drivers/net/pse-pd/pd692x0.c | 205 +++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 205 insertions(+) diff --git a/drivers/net/pse-pd/pd692x0.c b/drivers/net/pse-pd/pd692x0.c index 7d60a714ca53..a4766c18f333 100644 --- a/drivers/net/pse-pd/pd692x0.c +++ b/drivers/net/pse-pd/pd692x0.c @@ -12,6 +12,8 @@ #include #include #include +#include +#include =20 #define PD692X0_PSE_NAME "pd692x0_pse" =20 @@ -76,6 +78,8 @@ enum { PD692X0_MSG_GET_PORT_CLASS, PD692X0_MSG_GET_PORT_MEAS, PD692X0_MSG_GET_PORT_PARAM, + PD692X0_MSG_GET_POWER_BANK, + PD692X0_MSG_SET_POWER_BANK, =20 /* add new message above here */ PD692X0_MSG_CNT @@ -95,6 +99,8 @@ struct pd692x0_priv { unsigned long last_cmd_key_time; =20 enum ethtool_c33_pse_admin_state admin_state[PD692X0_MAX_PIS]; + struct regulator_dev *manager_reg[PD692X0_MAX_MANAGERS]; + int manager_pw_budget[PD692X0_MAX_MANAGERS]; }; =20 /* Template list of communication messages. The non-null bytes defined here @@ -170,6 +176,16 @@ static const struct pd692x0_msg pd692x0_msg_template_l= ist[PD692X0_MSG_CNT] =3D { .data =3D {0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e}, }, + [PD692X0_MSG_GET_POWER_BANK] =3D { + .key =3D PD692X0_KEY_REQ, + .sub =3D {0x07, 0x0b, 0x57}, + .data =3D { 0, 0x4e, 0x4e, 0x4e, + 0x4e, 0x4e, 0x4e, 0x4e}, + }, + [PD692X0_MSG_SET_POWER_BANK] =3D { + .key =3D PD692X0_KEY_CMD, + .sub =3D {0x07, 0x0b, 0x57}, + }, }; =20 static u8 pd692x0_build_msg(struct pd692x0_msg *msg, u8 echo) @@ -739,6 +755,29 @@ pd692x0_pi_get_actual_pw(struct pse_controller_dev *pc= dev, int id) return (buf.data[0] << 4 | buf.data[1]) * 100; } =20 +static int +pd692x0_pi_get_prio(struct pse_controller_dev *pcdev, int id) +{ + struct pd692x0_priv *priv =3D to_pd692x0_priv(pcdev); + struct pd692x0_msg msg, buf =3D {0}; + int ret; + + ret =3D pd692x0_fw_unavailable(priv); + if (ret) + return ret; + + msg =3D pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_PARAM]; + msg.sub[2] =3D id; + ret =3D pd692x0_sendrecv_msg(priv, &msg, &buf); + if (ret < 0) + return ret; + if (!buf.data[2] || buf.data[2] > pcdev->pis_prio_max + 1) + return -ERANGE; + + /* PSE core priority start at 0 */ + return buf.data[2] - 1; +} + static struct pd692x0_msg_ver pd692x0_get_sw_version(struct pd692x0_priv *= priv) { struct device *dev =3D &priv->client->dev; @@ -766,6 +805,7 @@ static struct pd692x0_msg_ver pd692x0_get_sw_version(st= ruct pd692x0_priv *priv) =20 struct pd692x0_manager { struct device_node *port_node[PD692X0_MAX_MANAGER_PORTS]; + struct device_node *node; int nports; }; =20 @@ -857,6 +897,8 @@ pd692x0_of_get_managers(struct pd692x0_priv *priv, if (ret) goto out; =20 + of_node_get(node); + manager[manager_id].node =3D node; nmanagers++; } =20 @@ -869,6 +911,8 @@ pd692x0_of_get_managers(struct pd692x0_priv *priv, of_node_put(manager[i].port_node[j]); manager[i].port_node[j] =3D NULL; } + of_node_put(manager[i].node); + manager[i].node =3D NULL; } =20 of_node_put(node); @@ -876,6 +920,130 @@ pd692x0_of_get_managers(struct pd692x0_priv *priv, return ret; } =20 +static const struct regulator_ops dummy_ops; + +static struct regulator_dev * +pd692x0_register_manager_regulator(struct device *dev, char *reg_name, + struct device_node *node) +{ + struct regulator_init_data *rinit_data; + struct regulator_config rconfig =3D {0}; + struct regulator_desc *rdesc; + struct regulator_dev *rdev; + + rinit_data =3D devm_kzalloc(dev, sizeof(*rinit_data), + GFP_KERNEL); + if (!rinit_data) + return ERR_PTR(-ENOMEM); + + rdesc =3D devm_kzalloc(dev, sizeof(*rdesc), GFP_KERNEL); + if (!rdesc) + return ERR_PTR(-ENOMEM); + + rdesc->name =3D reg_name; + rdesc->type =3D REGULATOR_VOLTAGE; + rdesc->ops =3D &dummy_ops; + rdesc->owner =3D THIS_MODULE; + + rinit_data->supply_regulator =3D "vmain"; + + rconfig.dev =3D dev; + rconfig.init_data =3D rinit_data; + rconfig.of_node =3D node; + + rdev =3D devm_regulator_register(dev, rdesc, &rconfig); + if (IS_ERR(rdev)) { + dev_err_probe(dev, PTR_ERR(rdev), + "Failed to register regulator\n"); + return rdev; + } + + return rdev; +} + +static int +pd692x0_register_managers_regulator(struct pd692x0_priv *priv, + const struct pd692x0_manager *manager, + int nmanagers) +{ + struct device *dev =3D &priv->client->dev; + size_t reg_name_len; + int i; + + /* Each regulator name len is dev name + 12 char + + * int max digit number (10) + 1 + */ + reg_name_len =3D strlen(dev_name(dev)) + 23; + + for (i =3D 0; i < nmanagers; i++) { + struct regulator_dev *rdev; + char *reg_name; + + reg_name =3D devm_kzalloc(dev, reg_name_len, GFP_KERNEL); + if (!reg_name) + return -ENOMEM; + snprintf(reg_name, 26, "pse-%s-manager%d", dev_name(dev), i); + rdev =3D pd692x0_register_manager_regulator(dev, reg_name, + manager[i].node); + if (IS_ERR(rdev)) + return PTR_ERR(rdev); + + priv->manager_reg[i] =3D rdev; + } + + return 0; +} + +static int +pd692x0_conf_manager_power_budget(struct pd692x0_priv *priv, int id, int p= w) +{ + struct pd692x0_msg msg, buf; + int ret, pw_mW =3D pw / 1000; + + msg =3D pd692x0_msg_template_list[PD692X0_MSG_GET_POWER_BANK]; + msg.data[0] =3D id; + ret =3D pd692x0_sendrecv_msg(priv, &msg, &buf); + if (ret < 0) + return ret; + + msg =3D pd692x0_msg_template_list[PD692X0_MSG_SET_POWER_BANK]; + msg.data[0] =3D id; + msg.data[1] =3D pw_mW >> 8; + msg.data[2] =3D pw_mW & 0xff; + msg.data[3] =3D buf.sub[2]; + msg.data[4] =3D buf.data[0]; + msg.data[5] =3D buf.data[1]; + msg.data[6] =3D buf.data[2]; + msg.data[7] =3D buf.data[3]; + return pd692x0_sendrecv_msg(priv, &msg, &buf); +} + +static int +pd692x0_configure_managers(struct pd692x0_priv *priv, int nmanagers) +{ + int i, ret; + + for (i =3D 0; i < nmanagers; i++) { + struct regulator *supply =3D priv->manager_reg[i]->supply; + int pw_budget; + + pw_budget =3D regulator_get_unclaimed_power_budget(supply); + /* Max power budget per manager */ + if (pw_budget > 6000000) + pw_budget =3D 6000000; + ret =3D regulator_request_power_budget(supply, pw_budget); + if (ret < 0) + return ret; + + priv->manager_pw_budget[i] =3D pw_budget; + ret =3D pd692x0_conf_manager_power_budget(priv, i, pw_budget); + if (ret < 0) + return ret; + } + + return 0; +} + static int pd692x0_set_port_matrix(const struct pse_pi_pairset *pairset, const struct pd692x0_manager *manager, @@ -998,6 +1166,14 @@ static int pd692x0_setup_pi_matrix(struct pse_control= ler_dev *pcdev) return ret; =20 nmanagers =3D ret; + ret =3D pd692x0_register_managers_regulator(priv, manager, nmanagers); + if (ret) + goto out; + + ret =3D pd692x0_configure_managers(priv, nmanagers); + if (ret) + goto out; + ret =3D pd692x0_set_ports_matrix(priv, manager, nmanagers, port_matrix); if (ret) goto out; @@ -1008,8 +1184,14 @@ static int pd692x0_setup_pi_matrix(struct pse_contro= ller_dev *pcdev) =20 out: for (i =3D 0; i < nmanagers; i++) { + struct regulator *supply =3D priv->manager_reg[i]->supply; + + regulator_free_power_budget(supply, + priv->manager_pw_budget[i]); + for (j =3D 0; j < manager[i].nports; j++) of_node_put(manager[i].port_node[j]); + of_node_put(manager[i].node); } return ret; } @@ -1071,6 +1253,25 @@ static int pd692x0_pi_set_pw_limit(struct pse_contro= ller_dev *pcdev, return pd692x0_sendrecv_msg(priv, &msg, &buf); } =20 +static int pd692x0_pi_set_prio(struct pse_controller_dev *pcdev, int id, + unsigned int prio) +{ + struct pd692x0_priv *priv =3D to_pd692x0_priv(pcdev); + struct pd692x0_msg msg, buf =3D {0}; + int ret; + + ret =3D pd692x0_fw_unavailable(priv); + if (ret) + return ret; + + msg =3D pd692x0_msg_template_list[PD692X0_MSG_SET_PORT_PARAM]; + msg.sub[2] =3D id; + /* Controller priority from 1 to 3 */ + msg.data[4] =3D prio + 1; + + return pd692x0_sendrecv_msg(priv, &msg, &buf); +} + static const struct pse_controller_ops pd692x0_ops =3D { .setup_pi_matrix =3D pd692x0_setup_pi_matrix, .pi_get_admin_state =3D pd692x0_pi_get_admin_state, @@ -1084,6 +1285,8 @@ static const struct pse_controller_ops pd692x0_ops = =3D { .pi_get_pw_limit =3D pd692x0_pi_get_pw_limit, .pi_set_pw_limit =3D pd692x0_pi_set_pw_limit, .pi_get_pw_limit_ranges =3D pd692x0_pi_get_pw_limit_ranges, + .pi_get_prio =3D pd692x0_pi_get_prio, + .pi_set_prio =3D pd692x0_pi_set_prio, }; =20 #define PD692X0_FW_LINE_MAX_SZ 0xff @@ -1500,6 +1703,8 @@ static int pd692x0_i2c_probe(struct i2c_client *clien= t) priv->pcdev.ops =3D &pd692x0_ops; priv->pcdev.dev =3D dev; priv->pcdev.types =3D ETHTOOL_PSE_C33; + priv->pcdev.supp_budget_eval_strategies =3D PSE_BUDGET_EVAL_STRAT_DYNAMIC; + priv->pcdev.pis_prio_max =3D 2; ret =3D devm_pse_controller_register(dev, &priv->pcdev); if (ret) return dev_err_probe(dev, ret, --=20 2.43.0 From nobody Fri Dec 19 16:23:04 2025 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4BA4E1EF36C; Sat, 24 May 2025 10:57:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748084232; cv=none; b=DUx+dMSmbwTyLaH32RPrZ/fRIo1dMORdmXENNQPltDQDiR/uommchW1I/Obj/mZYOTZ09naU/D7IwQqDYxuipS8kmPDD9+Fyu0oNyNCAPT7IovusW4/eDh1GFPIy6v8QKTrg/91PPfSjyE/1zuokI3to8Mo5ufABWV6SGGAJIh8= ARC-Message-Signature: i=1; a=rsa-sha256; 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Sat, 24 May 2025 10:57:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1748084228; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5P5SQRp0aYM5+GAfF0EKQ/JsT3eA7lVFRyPCmOvEtGc=; b=VF7ZreyYzNRHcbZO9jIciBK/TVOjQvPieZuVOq476vuKuSVeXcn6wew9DyM9bqTI3BGbyI /xxpjCPZUCluwVEu2Bn3MB2T7830+KstX2qWJRUbQXiGD2rroGtykQP546+MOjeHFWFOq8 13Xz3tAyl6/xTcBg2HjfHkZ6O/I8b+jYzpxkNs1Ns1WJ6C2TID0F7cRbNtxwSlsYn28kv/ sZnhMuJ2TQMn2AYZ0ZC5JzNhI3dC69oZiZ6Yxk61zWMpe2X3SV8kmsXgfnrYORSG4zWxRD ++Gg9oDZ+8yJYhkdf6mBtcoBBlUtmULS5D/ziYLOl6H68p2LiZ6twb+QI1NlWg== From: Kory Maincent Date: Sat, 24 May 2025 12:56:12 +0200 Subject: [PATCH net-next v12 10/13] net: pse-pd: pd692x0: Add support for controller and manager power supplies Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250524-feature_poe_port_prio-v12-10-d65fd61df7a7@bootlin.com> References: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> In-Reply-To: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Krzysztof Kozlowski , Conor Dooley Cc: Liam Girdwood , Mark Brown , Thomas Petazzoni , netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, "Kory Maincent (Dent Project)" X-Mailer: b4 0.15-dev-8cb71 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtddtgdduudehgeculddtuddrgeefvddrtddtmdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpefmohhrhicuofgrihhntggvnhhtuceokhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepvefgvdfgkeetgfefgfegkedugffghfdtffeftdeuteehjedtvdelvddvleehtdevnecukfhppedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikeenucevlhhushhtvghrufhiiigvpeejnecurfgrrhgrmhepihhnvghtpedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikedphhgvlhhopegluddvjedrtddruddrudgnpdhmrghilhhfrhhomhepkhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepvdejpdhrtghpthhtohepkhihlhgvrdhsfigvnhhsohhnsegvshhtrdhtvggthhdprhgtphhtthhopegurghvvghmsegurghvvghmlhhofhhtrdhnvghtpdhrtghpthhtoheptghonhhorhdoughtsehkvghrnhgvlhdrohhrghdprhgtp hhtthhopehlihhnuhigqdhkvghrnhgvlhesvhhgvghrrdhkvghrnhgvlhdrohhrghdprhgtphhtthhopehkohhrhidrmhgrihhntggvnhhtsegsohhothhlihhnrdgtohhmpdhrtghpthhtoheptghorhgsvghtsehlfihnrdhnvghtpdhrtghpthhtoheprghnughrvgifsehluhhnnhdrtghhpdhrtghpthhtoheprghnughrvgifodhnvghtuggvvheslhhunhhnrdgthh X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) Add support for managing the VDD and VDDA power supplies for the PD692x0 PSE controller, as well as the VAUX5 and VAUX3P3 power supplies for the PD6920x PSE managers. Signed-off-by: Kory Maincent (Dent Project) Reviewed-by: Oleksij Rempel --- Changes in v5: - New patch --- drivers/net/pse-pd/pd692x0.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/net/pse-pd/pd692x0.c b/drivers/net/pse-pd/pd692x0.c index a4766c18f333..4de004813560 100644 --- a/drivers/net/pse-pd/pd692x0.c +++ b/drivers/net/pse-pd/pd692x0.c @@ -976,8 +976,10 @@ pd692x0_register_managers_regulator(struct pd692x0_pri= v *priv, reg_name_len =3D strlen(dev_name(dev)) + 23; =20 for (i =3D 0; i < nmanagers; i++) { + static const char * const regulators[] =3D { "vaux5", "vaux3p3" }; struct regulator_dev *rdev; char *reg_name; + int ret; =20 reg_name =3D devm_kzalloc(dev, reg_name_len, GFP_KERNEL); if (!reg_name) @@ -988,6 +990,17 @@ pd692x0_register_managers_regulator(struct pd692x0_pri= v *priv, if (IS_ERR(rdev)) return PTR_ERR(rdev); =20 + /* VMAIN is described as main supply for the manager. + * Add other VAUX power supplies and link them to the + * virtual device rdev->dev. + */ + ret =3D devm_regulator_bulk_get_enable(&rdev->dev, + ARRAY_SIZE(regulators), + regulators); + if (ret) + return dev_err_probe(&rdev->dev, ret, + "Failed to enable regulators\n"); + priv->manager_reg[i] =3D rdev; } =20 @@ -1640,6 +1653,7 @@ static const struct fw_upload_ops pd692x0_fw_ops =3D { =20 static int pd692x0_i2c_probe(struct i2c_client *client) { + static const char * const regulators[] =3D { "vdd", "vdda" }; struct pd692x0_msg msg, buf =3D {0}, zero =3D {0}; struct device *dev =3D &client->dev; struct pd692x0_msg_ver ver; @@ -1647,6 +1661,12 @@ static int pd692x0_i2c_probe(struct i2c_client *clie= nt) struct fw_upload *fwl; int ret; =20 + ret =3D devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators), + regulators); + if (ret) + return dev_err_probe(dev, ret, + "Failed to enable regulators\n"); + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { dev_err(dev, "i2c check functionality failed\n"); return -ENXIO; --=20 2.43.0 From nobody Fri Dec 19 16:23:04 2025 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BC8931EFF9B; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250524-feature_poe_port_prio-v12-11-d65fd61df7a7@bootlin.com> References: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> In-Reply-To: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Krzysztof Kozlowski , Conor Dooley Cc: Liam Girdwood , Mark Brown , Thomas Petazzoni , netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, "Kory Maincent (Dent Project)" , Krzysztof Kozlowski X-Mailer: b4 0.15-dev-8cb71 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtddtgdduudehgeculddtuddrgeefvddrtddtmdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpefmohhrhicuofgrihhntggvnhhtuceokhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepvefgvdfgkeetgfefgfegkedugffghfdtffeftdeuteehjedtvdelvddvleehtdevnecukfhppedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikeenucevlhhushhtvghrufhiiigvpeejnecurfgrrhgrmhepihhnvghtpedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikedphhgvlhhopegluddvjedrtddruddrudgnpdhmrghilhhfrhhomhepkhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepvdekpdhrtghpthhtohepkhihlhgvrdhsfigvnhhsohhnsegvshhtrdhtvggthhdprhgtphhtthhopegurghvvghmsegurghvvghmlhhofhhtrdhnvghtpdhrtghpthhtoheptghonhhorhdoughtsehkvghrnhgvlhdrohhrghdprhgtp hhtthhopehlihhnuhigqdhkvghrnhgvlhesvhhgvghrrdhkvghrnhgvlhdrohhrghdprhgtphhtthhopehkohhrhidrmhgrihhntggvnhhtsegsohhothhlihhnrdgtohhmpdhrtghpthhtoheptghorhgsvghtsehlfihnrdhnvghtpdhrtghpthhtoheprghnughrvgifsehluhhnnhdrtghhpdhrtghpthhtoheprghnughrvgifodhnvghtuggvvheslhhunhhnrdgthh X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) Adds the regulator supply parameter of the managers. Update also the example as the regulator supply of the PSE PIs should be the managers itself and not an external regulator. Signed-off-by: Kory Maincent (Dent Project) Reviewed-by: Krzysztof Kozlowski --- Changes in v5: - Add description of others power supplies. Changes in v3: - New patch --- .../bindings/net/pse-pd/microchip,pd692x0.yaml | 22 ++++++++++++++++++= +--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0= .yaml b/Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml index fd4244fceced..ca61cc37a790 100644 --- a/Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml +++ b/Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml @@ -22,6 +22,12 @@ properties: reg: maxItems: 1 =20 + vdd-supply: + description: Regulator that provides 3.3V VDD power supply. + + vdda-supply: + description: Regulator that provides 3.3V VDDA power supply. + managers: type: object additionalProperties: false @@ -68,6 +74,15 @@ properties: "#size-cells": const: 0 =20 + vmain-supply: + description: Regulator that provides 44-57V VMAIN power supply. + + vaux5-supply: + description: Regulator that provides 5V VAUX5 power supply. + + vaux3p3-supply: + description: Regulator that provides 3.3V VAUX3P3 power supply. + patternProperties: '^port@[0-7]$': type: object @@ -106,10 +121,11 @@ examples: #address-cells =3D <1>; #size-cells =3D <0>; =20 - manager@0 { + manager0: manager@0 { reg =3D <0>; #address-cells =3D <1>; #size-cells =3D <0>; + vmain-supply =3D <&pse1_supply>; =20 phys0: port@0 { reg =3D <0>; @@ -161,7 +177,7 @@ examples: pairset-names =3D "alternative-a", "alternative-b"; pairsets =3D <&phys0>, <&phys1>; polarity-supported =3D "MDI", "S"; - vpwr-supply =3D <&vpwr1>; + vpwr-supply =3D <&manager0>; }; pse_pi1: pse-pi@1 { reg =3D <1>; @@ -169,7 +185,7 @@ examples: pairset-names =3D "alternative-a"; pairsets =3D <&phys2>; polarity-supported =3D "MDI"; - vpwr-supply =3D <&vpwr2>; + vpwr-supply =3D <&manager0>; }; }; }; --=20 2.43.0 From nobody Fri Dec 19 16:23:04 2025 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F1AB01F0E50; Sat, 24 May 2025 10:57:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748084235; cv=none; b=TiCm6ndaMpqAkqf8sym6LpHcYk7u+BUIsU6CZm8oCrbadEAYX7g3lq5vWpGnnmwxRb+99ND35cxrNzI4w6lFY9FCzJCNRkeNSPgES+PZTmu54f0wwRCMrnJ9FoWzDFFS1dJrcC9zPnFdipKBGCSnUdqOR4BHCLnqF8EfnXurVQU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748084235; c=relaxed/simple; bh=HFQWAfZvvOVviJYU4nJ3AIIjhLUSvteSwDQkYZUucVo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Rly/fHma3g8/zWa5j1uROl9Tq/M4Px6XkZ+eay3lZcAz13VZZGNVfKZaoZcDKfiRpxTYwn25K7Th8buXbWvppQVLd5NYiISKKsMIaGrJQb0n0t59wDmFq1CrfrqxzvNJRevGhuXI34ze7+07IEZVtOD4ePLNPE/uBx5Kkgu5uUY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Dgy2pcR+; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Dgy2pcR+" Received: by mail.gandi.net (Postfix) with ESMTPSA id 267214397A; Sat, 24 May 2025 10:57:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1748084231; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=t4eclzSe50+bbHVxcyvpL552HOn3zu2XAeniKUWOrVg=; b=Dgy2pcR+cJ69ObgOJBJ7bx1uculOn8pYoF6Nl8K76dBfdjOnhNHu3rUT7VNyltgKf37ZXB zypG+NPRwoNJZ1N88paguus8fK9uA4+nySgqjf943V7P4yoCdt/rwm9adaIzylxsrK/kwV 1h5f5a+mvc0TBXVfHff8OPH7kfpD/dq324IplMv+n6l04Fd5atC3k0h6sczokVCWP5QpbN nggrZQcAJnxNEFXODqpNUgDm2eJEa6sdNuY0RCU2srsFiUBoB7Y+gDrkXw6Qv/ALddlM/k U2UaK4/lNTql36iHc0D1nRPxxombsyOKXibFWl5Rr8jtO8Dr3HU0rBrNm0ieig== From: Kory Maincent Date: Sat, 24 May 2025 12:56:14 +0200 Subject: [PATCH net-next v12 12/13] net: pse-pd: tps23881: Add support for static port priority feature Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250524-feature_poe_port_prio-v12-12-d65fd61df7a7@bootlin.com> References: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> In-Reply-To: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Krzysztof Kozlowski , Conor Dooley Cc: Liam Girdwood , Mark Brown , Thomas Petazzoni , netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, "Kory Maincent (Dent Project)" X-Mailer: b4 0.15-dev-8cb71 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtddtgdduudehgeculddtuddrgeefvddrtddtmdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpefmohhrhicuofgrihhntggvnhhtuceokhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepvefgvdfgkeetgfefgfegkedugffghfdtffeftdeuteehjedtvdelvddvleehtdevnecukfhppedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikeenucevlhhushhtvghrufhiiigvpeejnecurfgrrhgrmhepihhnvghtpedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikedphhgvlhhopegluddvjedrtddruddrudgnpdhmrghilhhfrhhomhepkhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepvdejpdhrtghpthhtohepkhihlhgvrdhsfigvnhhsohhnsegvshhtrdhtvggthhdprhgtphhtthhopegurghvvghmsegurghvvghmlhhofhhtrdhnvghtpdhrtghpthhtoheptghonhhorhdoughtsehkvghrnhgvlhdrohhrghdprhgtp hhtthhopehlihhnuhigqdhkvghrnhgvlhesvhhgvghrrdhkvghrnhgvlhdrohhrghdprhgtphhtthhopehkohhrhidrmhgrihhntggvnhhtsegsohhothhlihhnrdgtohhmpdhrtghpthhtoheptghorhgsvghtsehlfihnrdhnvghtpdhrtghpthhtoheprghnughrvgifsehluhhnnhdrtghhpdhrtghpthhtoheprghnughrvgifodhnvghtuggvvheslhhunhhnrdgthh X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) This patch enhances PSE callbacks by introducing support for the static port priority feature. It extends interrupt management to handle and report detection, classification, and disconnection events. Additionally, it introduces the pi_get_pw_req() callback, which provides information about the power requested by the Powered Devices. Interrupt support is essential for the proper functioning of the TPS23881 controller. Without it, after a power-on (PWON), the controller will no longer perform detection and classification. This could lead to potential hazards, such as connecting a non-PoE device after a PoE device, which might result in magic smoke. Signed-off-by: Kory Maincent (Dent Project) Reviewed-by: Oleksij Rempel --- Change in v7: - Add configuration of the power limit back after an over current event. Change in v4: - Fix variable type nit. Change in v3: - New patch --- drivers/net/pse-pd/tps23881.c | 244 ++++++++++++++++++++++++++++++++++++++= +--- 1 file changed, 228 insertions(+), 16 deletions(-) diff --git a/drivers/net/pse-pd/tps23881.c b/drivers/net/pse-pd/tps23881.c index 7a9a5dbe0cb1..63f8f43062bc 100644 --- a/drivers/net/pse-pd/tps23881.c +++ b/drivers/net/pse-pd/tps23881.c @@ -20,20 +20,30 @@ =20 #define TPS23881_REG_IT 0x0 #define TPS23881_REG_IT_MASK 0x1 +#define TPS23881_REG_IT_DISF BIT(2) +#define TPS23881_REG_IT_DETC BIT(3) +#define TPS23881_REG_IT_CLASC BIT(4) #define TPS23881_REG_IT_IFAULT BIT(5) #define TPS23881_REG_IT_SUPF BIT(7) +#define TPS23881_REG_DET_EVENT 0x5 #define TPS23881_REG_FAULT 0x7 #define TPS23881_REG_SUPF_EVENT 0xb #define TPS23881_REG_TSD BIT(7) +#define TPS23881_REG_DISC 0xc #define TPS23881_REG_PW_STATUS 0x10 #define TPS23881_REG_OP_MODE 0x12 +#define TPS23881_REG_DISC_EN 0x13 #define TPS23881_OP_MODE_SEMIAUTO 0xaaaa #define TPS23881_REG_DIS_EN 0x13 #define TPS23881_REG_DET_CLA_EN 0x14 #define TPS23881_REG_GEN_MASK 0x17 +#define TPS23881_REG_CLCHE BIT(2) +#define TPS23881_REG_DECHE BIT(3) #define TPS23881_REG_NBITACC BIT(5) #define TPS23881_REG_INTEN BIT(7) #define TPS23881_REG_PW_EN 0x19 +#define TPS23881_REG_RESET 0x1a +#define TPS23881_REG_CLRAIN BIT(7) #define TPS23881_REG_2PAIR_POL1 0x1e #define TPS23881_REG_PORT_MAP 0x26 #define TPS23881_REG_PORT_POWER 0x29 @@ -178,6 +188,7 @@ static int tps23881_pi_enable(struct pse_controller_dev= *pcdev, int id) struct i2c_client *client =3D priv->client; u8 chan; u16 val; + int ret; =20 if (id >=3D TPS23881_MAX_CHANS) return -ERANGE; @@ -191,7 +202,22 @@ static int tps23881_pi_enable(struct pse_controller_de= v *pcdev, int id) BIT(chan % 4)); } =20 - return i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val); + ret =3D i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val); + if (ret) + return ret; + + /* Enable DC disconnect*/ + chan =3D priv->port[id].chan[0]; + ret =3D i2c_smbus_read_word_data(client, TPS23881_REG_DISC_EN); + if (ret < 0) + return ret; + + val =3D tps23881_set_val(ret, chan, 0, BIT(chan % 4), BIT(chan % 4)); + ret =3D i2c_smbus_write_word_data(client, TPS23881_REG_DISC_EN, val); + if (ret) + return ret; + + return 0; } =20 static int tps23881_pi_disable(struct pse_controller_dev *pcdev, int id) @@ -224,6 +250,17 @@ static int tps23881_pi_disable(struct pse_controller_d= ev *pcdev, int id) */ mdelay(5); =20 + /* Disable DC disconnect*/ + chan =3D priv->port[id].chan[0]; + ret =3D i2c_smbus_read_word_data(client, TPS23881_REG_DISC_EN); + if (ret < 0) + return ret; + + val =3D tps23881_set_val(ret, chan, 0, 0, BIT(chan % 4)); + ret =3D i2c_smbus_write_word_data(client, TPS23881_REG_DISC_EN, val); + if (ret) + return ret; + /* Enable detection and classification */ ret =3D i2c_smbus_read_word_data(client, TPS23881_REG_DET_CLA_EN); if (ret < 0) @@ -919,6 +956,47 @@ static int tps23881_setup_pi_matrix(struct pse_control= ler_dev *pcdev) return ret; } =20 +static int tps23881_power_class_table[] =3D { + -ERANGE, + 4000, + 7000, + 15500, + 30000, + 15500, + 15500, + -ERANGE, + 45000, + 60000, + 75000, + 90000, + 15500, + 45000, + -ERANGE, + -ERANGE, +}; + +static int tps23881_pi_get_pw_req(struct pse_controller_dev *pcdev, int id) +{ + struct tps23881_priv *priv =3D to_tps23881_priv(pcdev); + struct i2c_client *client =3D priv->client; + u8 reg, chan; + int ret; + u16 val; + + /* For a 4-pair the classification need 5ms to be completed */ + if (priv->port[id].is_4p) + mdelay(5); + + chan =3D priv->port[id].chan[0]; + reg =3D TPS23881_REG_DISC + (chan % 4); + ret =3D i2c_smbus_read_word_data(client, reg); + if (ret < 0) + return ret; + + val =3D tps23881_calc_val(ret, chan, 4, 0xf); + return tps23881_power_class_table[val]; +} + static const struct pse_controller_ops tps23881_ops =3D { .setup_pi_matrix =3D tps23881_setup_pi_matrix, .pi_enable =3D tps23881_pi_enable, @@ -931,6 +1009,7 @@ static const struct pse_controller_ops tps23881_ops = =3D { .pi_get_pw_limit =3D tps23881_pi_get_pw_limit, .pi_set_pw_limit =3D tps23881_pi_set_pw_limit, .pi_get_pw_limit_ranges =3D tps23881_pi_get_pw_limit_ranges, + .pi_get_pw_req =3D tps23881_pi_get_pw_req, }; =20 static const char fw_parity_name[] =3D "ti/tps23881/tps23881-parity-14.bin= "; @@ -1088,17 +1167,113 @@ static void tps23881_irq_event_over_temp(struct tp= s23881_priv *priv, } } =20 -static void tps23881_irq_event_over_current(struct tps23881_priv *priv, - u16 reg_val, - unsigned long *notifs, - unsigned long *notifs_mask) +static int tps23881_irq_event_over_current(struct tps23881_priv *priv, + u16 reg_val, + unsigned long *notifs, + unsigned long *notifs_mask) { + int i, ret; u8 chans; =20 chans =3D tps23881_irq_export_chans_helper(reg_val, 0); + if (!chans) + return 0; + + tps23881_set_notifs_helper(priv, chans, notifs, notifs_mask, + ETHTOOL_PSE_EVENT_OVER_CURRENT | + ETHTOOL_C33_PSE_EVENT_DISCONNECTION); + + /* Over Current event resets the power limit registers so we need + * to configured it again. + */ + for_each_set_bit(i, notifs_mask, priv->pcdev.nr_lines) { + if (priv->port[i].pw_pol < 0) + continue; + + ret =3D tps23881_pi_enable_manual_pol(priv, i); + if (ret < 0) + return ret; + + /* Set power policy */ + ret =3D tps23881_pi_set_pw_pol_limit(priv, i, + priv->port[i].pw_pol, + priv->port[i].is_4p); + if (ret < 0) + return ret; + } + + return 0; +} + +static void tps23881_irq_event_disconnection(struct tps23881_priv *priv, + u16 reg_val, + unsigned long *notifs, + unsigned long *notifs_mask) +{ + u8 chans; + + chans =3D tps23881_irq_export_chans_helper(reg_val, 4); if (chans) tps23881_set_notifs_helper(priv, chans, notifs, notifs_mask, - ETHTOOL_PSE_EVENT_OVER_CURRENT); + ETHTOOL_C33_PSE_EVENT_DISCONNECTION); +} + +static int tps23881_irq_event_detection(struct tps23881_priv *priv, + u16 reg_val, + unsigned long *notifs, + unsigned long *notifs_mask) +{ + enum ethtool_pse_event event; + int reg, ret, i, val; + unsigned long chans; + + chans =3D tps23881_irq_export_chans_helper(reg_val, 0); + for_each_set_bit(i, &chans, TPS23881_MAX_CHANS) { + reg =3D TPS23881_REG_DISC + (i % 4); + ret =3D i2c_smbus_read_word_data(priv->client, reg); + if (ret < 0) + return ret; + + val =3D tps23881_calc_val(ret, i, 0, 0xf); + /* If detection valid */ + if (val =3D=3D 0x4) + event =3D ETHTOOL_C33_PSE_EVENT_DETECTION; + else + event =3D ETHTOOL_C33_PSE_EVENT_DISCONNECTION; + + tps23881_set_notifs_helper(priv, BIT(i), notifs, + notifs_mask, event); + } + + return 0; +} + +static int tps23881_irq_event_classification(struct tps23881_priv *priv, + u16 reg_val, + unsigned long *notifs, + unsigned long *notifs_mask) +{ + int reg, ret, val, i; + unsigned long chans; + + chans =3D tps23881_irq_export_chans_helper(reg_val, 4); + for_each_set_bit(i, &chans, TPS23881_MAX_CHANS) { + reg =3D TPS23881_REG_DISC + (i % 4); + ret =3D i2c_smbus_read_word_data(priv->client, reg); + if (ret < 0) + return ret; + + val =3D tps23881_calc_val(ret, i, 4, 0xf); + /* Do not report classification event for unknown class */ + if (!val || val =3D=3D 0x8 || val =3D=3D 0xf) + continue; + + tps23881_set_notifs_helper(priv, BIT(i), notifs, + notifs_mask, + ETHTOOL_C33_PSE_EVENT_CLASSIFICATION); + } + + return 0; } =20 static int tps23881_irq_event_handler(struct tps23881_priv *priv, u16 reg, @@ -1106,7 +1281,7 @@ static int tps23881_irq_event_handler(struct tps23881= _priv *priv, u16 reg, unsigned long *notifs_mask) { struct i2c_client *client =3D priv->client; - int ret; + int ret, val; =20 /* The Supply event bit is repeated twice so we only need to read * the one from the first byte. @@ -1118,13 +1293,36 @@ static int tps23881_irq_event_handler(struct tps238= 81_priv *priv, u16 reg, tps23881_irq_event_over_temp(priv, ret, notifs, notifs_mask); } =20 - if (reg & (TPS23881_REG_IT_IFAULT | TPS23881_REG_IT_IFAULT << 8)) { + if (reg & (TPS23881_REG_IT_IFAULT | TPS23881_REG_IT_IFAULT << 8 | + TPS23881_REG_IT_DISF | TPS23881_REG_IT_DISF << 8)) { ret =3D i2c_smbus_read_word_data(client, TPS23881_REG_FAULT); if (ret < 0) return ret; - tps23881_irq_event_over_current(priv, ret, notifs, notifs_mask); + ret =3D tps23881_irq_event_over_current(priv, ret, notifs, + notifs_mask); + if (ret) + return ret; + + tps23881_irq_event_disconnection(priv, ret, notifs, notifs_mask); } =20 + if (reg & (TPS23881_REG_IT_DETC | TPS23881_REG_IT_DETC << 8 | + TPS23881_REG_IT_CLASC | TPS23881_REG_IT_CLASC << 8)) { + ret =3D i2c_smbus_read_word_data(client, TPS23881_REG_DET_EVENT); + if (ret < 0) + return ret; + + val =3D ret; + ret =3D tps23881_irq_event_detection(priv, val, notifs, + notifs_mask); + if (ret) + return ret; + + ret =3D tps23881_irq_event_classification(priv, val, notifs, + notifs_mask); + if (ret) + return ret; + } return 0; } =20 @@ -1178,7 +1376,14 @@ static int tps23881_setup_irq(struct tps23881_priv *= priv, int irq) int ret; u16 val; =20 - val =3D TPS23881_REG_IT_IFAULT | TPS23881_REG_IT_SUPF; + if (!irq) { + dev_err(&client->dev, "interrupt is missing"); + return -EINVAL; + } + + val =3D TPS23881_REG_IT_IFAULT | TPS23881_REG_IT_SUPF | + TPS23881_REG_IT_DETC | TPS23881_REG_IT_CLASC | + TPS23881_REG_IT_DISF; val |=3D val << 8; ret =3D i2c_smbus_write_word_data(client, TPS23881_REG_IT_MASK, val); if (ret) @@ -1188,11 +1393,19 @@ static int tps23881_setup_irq(struct tps23881_priv = *priv, int irq) if (ret < 0) return ret; =20 - val =3D (u16)(ret | TPS23881_REG_INTEN | TPS23881_REG_INTEN << 8); + val =3D TPS23881_REG_INTEN | TPS23881_REG_CLCHE | TPS23881_REG_DECHE; + val |=3D val << 8; + val |=3D (u16)ret; ret =3D i2c_smbus_write_word_data(client, TPS23881_REG_GEN_MASK, val); if (ret < 0) return ret; =20 + /* Reset interrupts registers */ + ret =3D i2c_smbus_write_word_data(client, TPS23881_REG_RESET, + TPS23881_REG_CLRAIN); + if (ret < 0) + return ret; + return devm_pse_irq_helper(&priv->pcdev, irq, 0, &irq_desc); } =20 @@ -1270,17 +1483,16 @@ static int tps23881_i2c_probe(struct i2c_client *cl= ient) priv->pcdev.dev =3D dev; priv->pcdev.types =3D ETHTOOL_PSE_C33; priv->pcdev.nr_lines =3D TPS23881_MAX_CHANS; + priv->pcdev.supp_budget_eval_strategies =3D PSE_BUDGET_EVAL_STRAT_STATIC; ret =3D devm_pse_controller_register(dev, &priv->pcdev); if (ret) { return dev_err_probe(dev, ret, "failed to register PSE controller\n"); } =20 - if (client->irq) { - ret =3D tps23881_setup_irq(priv, client->irq); - if (ret) - return ret; - } + ret =3D tps23881_setup_irq(priv, client->irq); + if (ret) + return ret; =20 return ret; } --=20 2.43.0 From nobody Fri Dec 19 16:23:04 2025 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A754F1F4725; Sat, 24 May 2025 10:57:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="NCl1SNMN" Received: by mail.gandi.net (Postfix) with ESMTPSA id 9005D43980; Sat, 24 May 2025 10:57:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1748084232; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Ywh2RgVGTSPBCH7D9W/NIFmHWpb1iZOWNtwG6KvDLXs=; b=NCl1SNMNCVcreVHilGvova8IR5oPcMVeudW3uMy6aNucv32d0WJRMi1KXqs4J8FWia498A ri0O8uO8/ysjl7DevMlEwnIBlC4mEg6pTAcg8RxZ1lpjo9UrlAdtVo8FVJikGjl8Fgw353 U4lmGgSsZ8eJ5hoO4sYrrtsxA5nLmShSNkdw46uGqZCCchc3+aZkOZXTT2QhAAM9gxoNIV M/kJQq+z72w9lmz0nlSzhmyx04b6BwsxMwWAhtqCNho4CrRHFllkir/dguAwvORX+Ar0h8 TDYvQZ0yofhBV812dXSAW1ATy/JlSy86yxZqxtaTx27m5BtOSk7arXFA/kYZeA== From: Kory Maincent Date: Sat, 24 May 2025 12:56:15 +0200 Subject: [PATCH net-next v12 13/13] dt-bindings: net: pse-pd: ti,tps23881: Add interrupt description Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250524-feature_poe_port_prio-v12-13-d65fd61df7a7@bootlin.com> References: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> In-Reply-To: <20250524-feature_poe_port_prio-v12-0-d65fd61df7a7@bootlin.com> To: Andrew Lunn , Oleksij Rempel , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Donald Hunter , Rob Herring , Andrew Lunn , Simon Horman , Heiner Kallweit , Russell King , Krzysztof Kozlowski , Conor Dooley Cc: Liam Girdwood , Mark Brown , Thomas Petazzoni , netdev@vger.kernel.org, linux-doc@vger.kernel.org, Kyle Swenson , Dent Project , kernel@pengutronix.de, Maxime Chevallier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, "Kory Maincent (Dent Project)" , Krzysztof Kozlowski X-Mailer: b4 0.15-dev-8cb71 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtddtgdduudehgeculddtuddrgeefvddrtddtmdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpefmohhrhicuofgrihhntggvnhhtuceokhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepvefgvdfgkeetgfefgfegkedugffghfdtffeftdeuteehjedtvdelvddvleehtdevnecukfhppedvrgdtudemtggsudelmeekheekjeemjedutddtmegvieegsgemtgekrggsmegvvgekmeejvgeikeenucevlhhushhtvghrufhiiigvpeduudenucfrrghrrghmpehinhgvthepvdgrtddumegtsgduleemkeehkeejmeejuddttdemvgeigegsmegtkegrsgemvggvkeemjegvieekpdhhvghloheplgduvdejrddtrddurddungdpmhgrihhlfhhrohhmpehkohhrhidrmhgrihhntggvnhhtsegsohhothhlihhnrdgtohhmpdhnsggprhgtphhtthhopedvkedprhgtphhtthhopehkhihlvgdrshifvghnshhonhesvghsthdrthgvtghhpdhrtghpthhtohepuggrvhgvmhesuggrvhgvmhhlohhfthdrnhgvthdprhgtphhtthhopegtohhnohhrodgutheskhgvrhhnvghlrdhorhhgpdhrt ghpthhtoheplhhinhhugidqkhgvrhhnvghlsehvghgvrhdrkhgvrhhnvghlrdhorhhgpdhrtghpthhtohepkhhorhihrdhmrghinhgtvghnthessghoohhtlhhinhdrtghomhdprhgtphhtthhopegtohhrsggvtheslhifnhdrnhgvthdprhgtphhtthhopegrnhgurhgvfieslhhunhhnrdgthhdprhgtphhtthhopegrnhgurhgvfidonhgvthguvghvsehluhhnnhdrtghh X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) Add an interrupt property to the device tree bindings for the TI TPS23881 PSE controller. The interrupt is primarily used to detect classification and disconnection events, which are essential for managing the PSE controller in compliance with the PoE standard. Interrupt support is essential for the proper functioning of the TPS23881 controller. Without it, after a power-on (PWON), the controller will no longer perform detection and classification. This could lead to potential hazards, such as connecting a non-PoE device after a PoE device, which might result in magic smoke. Signed-off-by: Kory Maincent (Dent Project) Reviewed-by: Krzysztof Kozlowski --- Change in v5: - Use standard interrupt flag in the example. Change in v3: - New patch --- Documentation/devicetree/bindings/net/pse-pd/ti,tps23881.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/net/pse-pd/ti,tps23881.yaml = b/Documentation/devicetree/bindings/net/pse-pd/ti,tps23881.yaml index 116c00f6f19c..d0b2515cfba6 100644 --- a/Documentation/devicetree/bindings/net/pse-pd/ti,tps23881.yaml +++ b/Documentation/devicetree/bindings/net/pse-pd/ti,tps23881.yaml @@ -20,6 +20,9 @@ properties: reg: maxItems: 1 =20 + interrupts: + maxItems: 1 + '#pse-cells': const: 1 =20 @@ -64,9 +67,12 @@ unevaluatedProperties: false required: - compatible - reg + - interrupts =20 examples: - | + #include + i2c { #address-cells =3D <1>; #size-cells =3D <0>; @@ -74,6 +80,8 @@ examples: ethernet-pse@20 { compatible =3D "ti,tps23881"; reg =3D <0x20>; + interrupts =3D <8 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent =3D <&gpiog>; =20 channels { #address-cells =3D <1>; --=20 2.43.0